-
Main Changes
+
Main Changes
Maintenance release
-
Contents
+
Contents
Update based on STM32Cube specification
diff --git a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l100xb.s b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l100xb.s
index 91ee87ceec..e461195f9a 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l100xb.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l100xb.s
@@ -13,15 +13,14 @@
* After Reset the Cortex-M3 processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
- *
* @attention
*
- * Copyright (c) 2017 STMicroelectronics. All rights reserved.
+ * Copyright (c) 2017-2021 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -61,6 +60,10 @@ defined in linker script */
.type Reset_Handler, %function
Reset_Handler:
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
ldr r1, =_edata
@@ -92,8 +95,6 @@ LoopFillZerobss:
cmp r2, r4
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
@@ -378,5 +379,4 @@ g_pfnVectors:
.weak TIM7_IRQHandler
.thumb_set TIM7_IRQHandler,Default_Handler
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l100xba.s b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l100xba.s
index 5cf48615c9..5c5992f2b0 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l100xba.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l100xba.s
@@ -13,15 +13,14 @@
* After Reset the Cortex-M3 processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
- *
* @attention
*
- * Copyright (c) 2017 STMicroelectronics. All rights reserved.
+ * Copyright (c) 2017-2021 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -61,6 +60,10 @@ defined in linker script */
.type Reset_Handler, %function
Reset_Handler:
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
ldr r1, =_edata
@@ -92,8 +95,6 @@ LoopFillZerobss:
cmp r2, r4
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
@@ -378,5 +379,4 @@ g_pfnVectors:
.weak TIM7_IRQHandler
.thumb_set TIM7_IRQHandler,Default_Handler
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l100xc.s b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l100xc.s
index b9914addda..3905cc7946 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l100xc.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l100xc.s
@@ -13,15 +13,14 @@
* After Reset the Cortex-M3 processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
- *
* @attention
*
- * Copyright (c) 2017 STMicroelectronics. All rights reserved.
+ * Copyright (c) 2017-2021 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -61,6 +60,9 @@ defined in linker script */
.type Reset_Handler, %function
Reset_Handler:
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
ldr r1, =_edata
@@ -92,8 +94,6 @@ LoopFillZerobss:
cmp r2, r4
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
@@ -399,5 +399,4 @@ g_pfnVectors:
.weak COMP_ACQ_IRQHandler
.thumb_set COMP_ACQ_IRQHandler,Default_Handler
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l151xb.s b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l151xb.s
index 6cbd09765b..fc60944a92 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l151xb.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l151xb.s
@@ -13,15 +13,14 @@
* After Reset the Cortex-M3 processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
- *
* @attention
*
- * Copyright (c) 2017 STMicroelectronics. All rights reserved.
+ * Copyright (c) 2017-2021 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -61,6 +60,10 @@ defined in linker script */
.type Reset_Handler, %function
Reset_Handler:
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
ldr r1, =_edata
@@ -92,8 +95,6 @@ LoopFillZerobss:
cmp r2, r4
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
@@ -375,5 +376,4 @@ g_pfnVectors:
.weak TIM7_IRQHandler
.thumb_set TIM7_IRQHandler,Default_Handler
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l151xba.s b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l151xba.s
index 2dbfbf6c72..3363a79d5e 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l151xba.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l151xba.s
@@ -13,15 +13,14 @@
* After Reset the Cortex-M3 processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
- *
* @attention
*
- * Copyright (c) 2017 STMicroelectronics. All rights reserved.
+ * Copyright (c) 2017-2021 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -61,6 +60,10 @@ defined in linker script */
.type Reset_Handler, %function
Reset_Handler:
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
ldr r1, =_edata
@@ -92,8 +95,6 @@ LoopFillZerobss:
cmp r2, r4
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
@@ -375,5 +376,4 @@ g_pfnVectors:
.weak TIM7_IRQHandler
.thumb_set TIM7_IRQHandler,Default_Handler
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l151xc.s b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l151xc.s
index 75c9b69366..75c01d88c9 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l151xc.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l151xc.s
@@ -13,15 +13,14 @@
* After Reset the Cortex-M3 processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
- *
* @attention
*
- * Copyright (c) 2017 STMicroelectronics. All rights reserved.
+ * Copyright (c) 2017-2021 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -61,6 +60,10 @@ defined in linker script */
.type Reset_Handler, %function
Reset_Handler:
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
ldr r1, =_edata
@@ -92,8 +95,6 @@ LoopFillZerobss:
cmp r2, r4
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
@@ -399,5 +400,4 @@ g_pfnVectors:
.weak COMP_ACQ_IRQHandler
.thumb_set COMP_ACQ_IRQHandler,Default_Handler
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l151xca.s b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l151xca.s
index 5ce171718c..a6cca7a776 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l151xca.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l151xca.s
@@ -13,15 +13,14 @@
* After Reset the Cortex-M3 processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
- *
* @attention
*
- * Copyright (c) 2017 STMicroelectronics. All rights reserved.
+ * Copyright (c) 2017-2021 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -61,6 +60,10 @@ defined in linker script */
.type Reset_Handler, %function
Reset_Handler:
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
ldr r1, =_edata
@@ -92,8 +95,6 @@ LoopFillZerobss:
cmp r2, r4
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
@@ -399,5 +400,4 @@ g_pfnVectors:
.weak COMP_ACQ_IRQHandler
.thumb_set COMP_ACQ_IRQHandler,Default_Handler
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l151xd.s b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l151xd.s
index 9520e6872a..5207c1fe71 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l151xd.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l151xd.s
@@ -13,15 +13,14 @@
* After Reset the Cortex-M3 processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
- *
* @attention
*
- * Copyright (c) 2017 STMicroelectronics. All rights reserved.
+ * Copyright (c) 2017-2021 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -61,6 +60,9 @@ defined in linker script */
.type Reset_Handler, %function
Reset_Handler:
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
ldr r1, =_edata
@@ -92,8 +94,6 @@ LoopFillZerobss:
cmp r2, r4
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
@@ -408,5 +408,4 @@ g_pfnVectors:
.weak COMP_ACQ_IRQHandler
.thumb_set COMP_ACQ_IRQHandler,Default_Handler
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l151xdx.s b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l151xdx.s
index 9e680278bd..2fd94be382 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l151xdx.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l151xdx.s
@@ -13,15 +13,14 @@
* After Reset the Cortex-M3 processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
- *
* @attention
*
- * Copyright (c) 2017 STMicroelectronics. All rights reserved.
+ * Copyright (c) 2017-2021 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -61,6 +60,10 @@ defined in linker script */
.type Reset_Handler, %function
Reset_Handler:
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
ldr r1, =_edata
@@ -92,8 +95,6 @@ LoopFillZerobss:
cmp r2, r4
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
@@ -405,5 +406,4 @@ g_pfnVectors:
.weak COMP_ACQ_IRQHandler
.thumb_set COMP_ACQ_IRQHandler,Default_Handler
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l151xe.s b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l151xe.s
index 2b1553ea73..e54def13b1 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l151xe.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l151xe.s
@@ -13,15 +13,14 @@
* After Reset the Cortex-M3 processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
- *
* @attention
*
- * Copyright (c) 2017 STMicroelectronics. All rights reserved.
+ * Copyright (c) 2017-2021 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -61,6 +60,9 @@ defined in linker script */
.type Reset_Handler, %function
Reset_Handler:
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
ldr r1, =_edata
@@ -92,8 +94,6 @@ LoopFillZerobss:
cmp r2, r4
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
@@ -405,5 +405,4 @@ g_pfnVectors:
.weak COMP_ACQ_IRQHandler
.thumb_set COMP_ACQ_IRQHandler,Default_Handler
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l152xb.s b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l152xb.s
index 5bded5d6c5..ddac491229 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l152xb.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l152xb.s
@@ -13,15 +13,14 @@
* After Reset the Cortex-M3 processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
- *
* @attention
*
- * Copyright (c) 2017 STMicroelectronics. All rights reserved.
+ * Copyright (c) 2017-2021 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -61,6 +60,10 @@ defined in linker script */
.type Reset_Handler, %function
Reset_Handler:
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
ldr r1, =_edata
@@ -92,8 +95,6 @@ LoopFillZerobss:
cmp r2, r4
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
@@ -378,5 +379,4 @@ g_pfnVectors:
.weak TIM7_IRQHandler
.thumb_set TIM7_IRQHandler,Default_Handler
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l152xba.s b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l152xba.s
index aa81fe2d3c..ba7f5245bc 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l152xba.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l152xba.s
@@ -13,15 +13,14 @@
* After Reset the Cortex-M3 processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
- *
* @attention
*
- * Copyright (c) 2017 STMicroelectronics. All rights reserved.
+ * Copyright (c) 2017-2021 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -61,6 +60,10 @@ defined in linker script */
.type Reset_Handler, %function
Reset_Handler:
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
ldr r1, =_edata
@@ -92,8 +95,6 @@ LoopFillZerobss:
cmp r2, r4
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
@@ -378,5 +379,4 @@ g_pfnVectors:
.weak TIM7_IRQHandler
.thumb_set TIM7_IRQHandler,Default_Handler
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l152xc.s b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l152xc.s
index 0769ee9e8c..5c8f0c14cd 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l152xc.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l152xc.s
@@ -13,15 +13,14 @@
* After Reset the Cortex-M3 processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
- *
* @attention
*
- * Copyright (c) 2017 STMicroelectronics. All rights reserved.
+ * Copyright (c) 2017-2021 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -61,6 +60,10 @@ defined in linker script */
.type Reset_Handler, %function
Reset_Handler:
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
ldr r1, =_edata
@@ -92,8 +95,6 @@ LoopFillZerobss:
cmp r2, r4
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
@@ -402,5 +403,4 @@ g_pfnVectors:
.weak COMP_ACQ_IRQHandler
.thumb_set COMP_ACQ_IRQHandler,Default_Handler
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l152xca.s b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l152xca.s
index 7bfd67379a..533ea8cce1 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l152xca.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l152xca.s
@@ -13,15 +13,14 @@
* After Reset the Cortex-M3 processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
- *
* @attention
*
- * Copyright (c) 2017 STMicroelectronics. All rights reserved.
+ * Copyright (c) 2017-2021 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -61,6 +60,10 @@ defined in linker script */
.type Reset_Handler, %function
Reset_Handler:
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
ldr r1, =_edata
@@ -92,8 +95,6 @@ LoopFillZerobss:
cmp r2, r4
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
@@ -402,5 +403,4 @@ g_pfnVectors:
.weak COMP_ACQ_IRQHandler
.thumb_set COMP_ACQ_IRQHandler,Default_Handler
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l152xd.s b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l152xd.s
index 2f953d7391..c29688cfc0 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l152xd.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l152xd.s
@@ -13,15 +13,14 @@
* After Reset the Cortex-M3 processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
- *
* @attention
*
- * Copyright (c) 2017 STMicroelectronics. All rights reserved.
+ * Copyright (c) 2017-2021 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -61,6 +60,10 @@ defined in linker script */
.type Reset_Handler, %function
Reset_Handler:
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
ldr r1, =_edata
@@ -92,8 +95,6 @@ LoopFillZerobss:
cmp r2, r4
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
@@ -411,5 +412,4 @@ g_pfnVectors:
.weak COMP_ACQ_IRQHandler
.thumb_set COMP_ACQ_IRQHandler,Default_Handler
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l152xdx.s b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l152xdx.s
index 61ab72056a..ef3e2f4c5a 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l152xdx.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l152xdx.s
@@ -13,15 +13,14 @@
* After Reset the Cortex-M3 processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
- *
* @attention
*
- * Copyright (c) 2017 STMicroelectronics. All rights reserved.
+ * Copyright (c) 2017-2021 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -61,6 +60,10 @@ defined in linker script */
.type Reset_Handler, %function
Reset_Handler:
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
ldr r1, =_edata
@@ -92,8 +95,6 @@ LoopFillZerobss:
cmp r2, r4
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
@@ -408,5 +409,4 @@ g_pfnVectors:
.weak COMP_ACQ_IRQHandler
.thumb_set COMP_ACQ_IRQHandler,Default_Handler
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l152xe.s b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l152xe.s
index 645514c900..c2f4ed1c9d 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l152xe.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l152xe.s
@@ -13,15 +13,14 @@
* After Reset the Cortex-M3 processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
- *
* @attention
*
- * Copyright (c) 2017 STMicroelectronics. All rights reserved.
+ * Copyright (c) 2017-2021 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -61,6 +60,10 @@ defined in linker script */
.type Reset_Handler, %function
Reset_Handler:
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
ldr r1, =_edata
@@ -92,8 +95,6 @@ LoopFillZerobss:
cmp r2, r4
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
@@ -408,5 +409,4 @@ g_pfnVectors:
.weak COMP_ACQ_IRQHandler
.thumb_set COMP_ACQ_IRQHandler,Default_Handler
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l162xc.s b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l162xc.s
index 1ce28c9871..2d24283d71 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l162xc.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l162xc.s
@@ -13,15 +13,14 @@
* After Reset the Cortex-M3 processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
- *
* @attention
*
- * Copyright (c) 2017 STMicroelectronics. All rights reserved.
+ * Copyright (c) 2017-2021 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -61,6 +60,10 @@ defined in linker script */
.type Reset_Handler, %function
Reset_Handler:
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
ldr r1, =_edata
@@ -92,8 +95,6 @@ LoopFillZerobss:
cmp r2, r4
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
@@ -405,5 +406,4 @@ g_pfnVectors:
.weak COMP_ACQ_IRQHandler
.thumb_set COMP_ACQ_IRQHandler,Default_Handler
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l162xca.s b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l162xca.s
index 021ccd87c1..011f912cad 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l162xca.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l162xca.s
@@ -13,15 +13,14 @@
* After Reset the Cortex-M3 processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
- *
* @attention
*
- * Copyright (c) 2017 STMicroelectronics. All rights reserved.
+ * Copyright (c) 2017-2021 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -61,6 +60,10 @@ defined in linker script */
.type Reset_Handler, %function
Reset_Handler:
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
ldr r1, =_edata
@@ -92,8 +95,6 @@ LoopFillZerobss:
cmp r2, r4
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
@@ -405,5 +406,4 @@ g_pfnVectors:
.weak COMP_ACQ_IRQHandler
.thumb_set COMP_ACQ_IRQHandler,Default_Handler
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l162xd.s b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l162xd.s
index 3d1e32633c..9b8b2a4e82 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l162xd.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l162xd.s
@@ -13,15 +13,14 @@
* After Reset the Cortex-M3 processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
- *
* @attention
*
- * Copyright (c) 2017 STMicroelectronics. All rights reserved.
+ * Copyright (c) 2017-2021 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -61,6 +60,10 @@ defined in linker script */
.type Reset_Handler, %function
Reset_Handler:
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
ldr r1, =_edata
@@ -92,8 +95,6 @@ LoopFillZerobss:
cmp r2, r4
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
@@ -414,5 +415,4 @@ g_pfnVectors:
.weak COMP_ACQ_IRQHandler
.thumb_set COMP_ACQ_IRQHandler,Default_Handler
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l162xdx.s b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l162xdx.s
index c1ec96f0a8..2c2b8ab509 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l162xdx.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l162xdx.s
@@ -13,15 +13,14 @@
* After Reset the Cortex-M3 processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
- *
* @attention
*
- * Copyright (c) 2017 STMicroelectronics. All rights reserved.
+ * Copyright (c) 2017-2021 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -61,6 +60,10 @@ defined in linker script */
.type Reset_Handler, %function
Reset_Handler:
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
ldr r1, =_edata
@@ -92,8 +95,6 @@ LoopFillZerobss:
cmp r2, r4
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
@@ -411,5 +412,4 @@ g_pfnVectors:
.weak COMP_ACQ_IRQHandler
.thumb_set COMP_ACQ_IRQHandler,Default_Handler
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l162xe.s b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l162xe.s
index 6bf160aecf..91f8ce06e8 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l162xe.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/startup_stm32l162xe.s
@@ -13,15 +13,14 @@
* After Reset the Cortex-M3 processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
- *
* @attention
*
- * Copyright (c) 2017 STMicroelectronics. All rights reserved.
+ * Copyright (c) 2017-2021 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -61,6 +60,10 @@ defined in linker script */
.type Reset_Handler, %function
Reset_Handler:
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
ldr r1, =_edata
@@ -92,8 +95,6 @@ LoopFillZerobss:
cmp r2, r4
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
@@ -411,5 +412,4 @@ g_pfnVectors:
.weak COMP_ACQ_IRQHandler
.thumb_set COMP_ACQ_IRQHandler,Default_Handler
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/system_stm32l1xx.c b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/system_stm32l1xx.c
index de5c806d14..89b3457256 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/system_stm32l1xx.c
+++ b/system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/system_stm32l1xx.c
@@ -21,13 +21,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2017-2021 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -67,7 +66,7 @@
#endif /* HSE_VALUE */
#if !defined (HSI_VALUE)
- #define HSI_VALUE ((uint32_t)8000000U) /*!< Default value of the Internal oscillator in Hz.
+ #define HSI_VALUE ((uint32_t)16000000U) /*!< Default value of the Internal oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSI_VALUE */
@@ -424,4 +423,3 @@ void SystemInit_ExtMemCtl(void)
* @}
*/
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/CMSIS/Device/ST/STM32L1xx/_htmresc/favicon.png b/system/Drivers/CMSIS/Device/ST/STM32L1xx/_htmresc/favicon.png
new file mode 100644
index 0000000000..06713eec49
Binary files /dev/null and b/system/Drivers/CMSIS/Device/ST/STM32L1xx/_htmresc/favicon.png differ
diff --git a/system/Drivers/CMSIS/Device/ST/STM32L1xx/_htmresc/mini-st.css b/system/Drivers/CMSIS/Device/ST/STM32L1xx/_htmresc/mini-st_2020.css
similarity index 78%
rename from system/Drivers/CMSIS/Device/ST/STM32L1xx/_htmresc/mini-st.css
rename to system/Drivers/CMSIS/Device/ST/STM32L1xx/_htmresc/mini-st_2020.css
index 71fbc14fc2..c03463bd58 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32L1xx/_htmresc/mini-st.css
+++ b/system/Drivers/CMSIS/Device/ST/STM32L1xx/_htmresc/mini-st_2020.css
@@ -1,39 +1,39 @@
@charset "UTF-8";
/*
- Flavor name: Default (mini-default)
- Author: Angelos Chalaris (chalarangelo@gmail.com)
- Maintainers: Angelos Chalaris
- mini.css version: v3.0.0-alpha.3
+ Flavor name: Custom (mini-custom)
+ Generated online - https://minicss.org/flavors
+ mini.css version: v3.0.1
*/
/*
Browsers resets and base typography.
*/
/* Core module CSS variable definitions */
:root {
- --fore-color: #111;
- --secondary-fore-color: #444;
- --back-color: #f8f8f8;
- --secondary-back-color: #f0f0f0;
- --blockquote-color: #f57c00;
- --pre-color: #1565c0;
- --border-color: #aaa;
- --secondary-border-color: #ddd;
- --heading-ratio: 1.19;
+ --fore-color: #03234b;
+ --secondary-fore-color: #03234b;
+ --back-color: #ffffff;
+ --secondary-back-color: #ffffff;
+ --blockquote-color: #e6007e;
+ --pre-color: #e6007e;
+ --border-color: #3cb4e6;
+ --secondary-border-color: #3cb4e6;
+ --heading-ratio: 1.2;
--universal-margin: 0.5rem;
- --universal-padding: 0.125rem;
- --universal-border-radius: 0.125rem;
- --a-link-color: #0277bd;
- --a-visited-color: #01579b; }
+ --universal-padding: 0.25rem;
+ --universal-border-radius: 0.075rem;
+ --background-margin: 1.5%;
+ --a-link-color: #3cb4e6;
+ --a-visited-color: #8c0078; }
html {
- font-size: 14px; }
+ font-size: 13.5px; }
a, b, del, em, i, ins, q, span, strong, u {
font-size: 1em; }
html, * {
- font-family: -apple-system, BlinkMacSystemFont, "Segoe UI", Roboto, Ubuntu, "Helvetica Neue", Helvetica, sans-serif;
- line-height: 1.4;
+ font-family: -apple-system, BlinkMacSystemFont, Helvetica, arial, sans-serif;
+ line-height: 1.25;
-webkit-text-size-adjust: 100%; }
* {
@@ -42,7 +42,10 @@ html, * {
body {
margin: 0;
color: var(--fore-color);
- background: var(--back-color); }
+ @background: var(--back-color);
+ background: var(--back-color) linear-gradient(#ffd200, #ffd200) repeat-y left top;
+ background-size: var(--background-margin);
+ }
details {
display: block; }
@@ -62,9 +65,9 @@ img {
height: auto; }
h1, h2, h3, h4, h5, h6 {
- line-height: 1.2;
+ line-height: 1.25;
margin: calc(1.5 * var(--universal-margin)) var(--universal-margin);
- font-weight: 500; }
+ font-weight: 400; }
h1 small, h2 small, h3 small, h4 small, h5 small, h6 small {
color: var(--secondary-fore-color);
display: block;
@@ -74,21 +77,15 @@ h1 {
font-size: calc(1rem * var(--heading-ratio) * var(--heading-ratio) * var(--heading-ratio)); }
h2 {
- font-size: calc(1rem * var(--heading-ratio) * var(--heading-ratio); );
- background: var(--mark-back-color);
- font-weight: 600;
- padding: 0.1em 0.5em 0.2em 0.5em;
- color: var(--mark-fore-color); }
-
+ font-size: calc(1rem * var(--heading-ratio) * var(--heading-ratio) );
+ border-style: none none solid none ;
+ border-width: thin;
+ border-color: var(--border-color); }
h3 {
- font-size: calc(1rem * var(--heading-ratio));
- padding-left: calc(2 * var(--universal-margin));
- /* background: var(--border-color); */
- }
+ font-size: calc(1rem * var(--heading-ratio) ); }
h4 {
- font-size: 1rem;);
- padding-left: calc(4 * var(--universal-margin)); }
+ font-size: calc(1rem * var(--heading-ratio)); }
h5 {
font-size: 1rem; }
@@ -101,7 +98,7 @@ p {
ol, ul {
margin: var(--universal-margin);
- padding-left: calc(6 * var(--universal-margin)); }
+ padding-left: calc(3 * var(--universal-margin)); }
b, strong {
font-weight: 700; }
@@ -111,7 +108,7 @@ hr {
border: 0;
line-height: 1.25em;
margin: var(--universal-margin);
- height: 0.0625rem;
+ height: 0.0714285714rem;
background: linear-gradient(to right, transparent, var(--border-color) 20%, var(--border-color) 80%, transparent); }
blockquote {
@@ -121,16 +118,16 @@ blockquote {
color: var(--secondary-fore-color);
margin: var(--universal-margin);
padding: calc(3 * var(--universal-padding));
- border: 0.0625rem solid var(--secondary-border-color);
- border-left: 0.375rem solid var(--blockquote-color);
+ border: 0.0714285714rem solid var(--secondary-border-color);
+ border-left: 0.3rem solid var(--blockquote-color);
border-radius: 0 var(--universal-border-radius) var(--universal-border-radius) 0; }
blockquote:before {
position: absolute;
top: calc(0rem - var(--universal-padding));
left: 0;
font-family: sans-serif;
- font-size: 3rem;
- font-weight: 700;
+ font-size: 2rem;
+ font-weight: 800;
content: "\201c";
color: var(--blockquote-color); }
blockquote[cite]:after {
@@ -160,8 +157,8 @@ pre {
background: var(--secondary-back-color);
padding: calc(1.5 * var(--universal-padding));
margin: var(--universal-margin);
- border: 0.0625rem solid var(--secondary-border-color);
- border-left: 0.25rem solid var(--pre-color);
+ border: 0.0714285714rem solid var(--secondary-border-color);
+ border-left: 0.2857142857rem solid var(--pre-color);
border-radius: 0 var(--universal-border-radius) var(--universal-border-radius) 0; }
sup, sub, code, kbd {
@@ -204,7 +201,8 @@ a {
box-sizing: border-box;
display: flex;
flex: 0 1 auto;
- flex-flow: row wrap; }
+ flex-flow: row wrap;
+ margin: 0 0 0 var(--background-margin); }
.col-sm,
[class^='col-sm-'],
@@ -565,9 +563,9 @@ a {
order: 999; } }
/* Card component CSS variable definitions */
:root {
- --card-back-color: #f8f8f8;
- --card-fore-color: #111;
- --card-border-color: #ddd; }
+ --card-back-color: #3cb4e6;
+ --card-fore-color: #03234b;
+ --card-border-color: #03234b; }
.card {
display: flex;
@@ -578,7 +576,7 @@ a {
width: 100%;
background: var(--card-back-color);
color: var(--card-fore-color);
- border: 0.0625rem solid var(--card-border-color);
+ border: 0.0714285714rem solid var(--card-border-color);
border-radius: var(--universal-border-radius);
margin: var(--universal-margin);
overflow: hidden; }
@@ -592,7 +590,7 @@ a {
margin: 0;
border: 0;
border-radius: 0;
- border-bottom: 0.0625rem solid var(--card-border-color);
+ border-bottom: 0.0714285714rem solid var(--card-border-color);
padding: var(--universal-padding);
width: 100%; }
.card > .sectione.media {
@@ -617,17 +615,18 @@ a {
width: auto; }
.card.warning {
-/* --card-back-color: #ffca28; */
--card-back-color: #e5b8b7;
- --card-border-color: #e8b825; }
+ --card-fore-color: #3b234b;
+ --card-border-color: #8c0078; }
.card.error {
- --card-back-color: #b71c1c;
- --card-fore-color: #f8f8f8;
- --card-border-color: #a71a1a; }
+ --card-back-color: #464650;
+ --card-fore-color: #ffffff;
+ --card-border-color: #8c0078; }
.card > .sectione.dark {
- --card-back-color: #e0e0e0; }
+ --card-back-color: #3b234b;
+ --card-fore-color: #ffffff; }
.card > .sectione.double-padded {
padding: calc(1.5 * var(--universal-padding)); }
@@ -637,12 +636,12 @@ a {
*/
/* Input_control module CSS variable definitions */
:root {
- --form-back-color: #f0f0f0;
- --form-fore-color: #111;
- --form-border-color: #ddd;
- --input-back-color: #f8f8f8;
- --input-fore-color: #111;
- --input-border-color: #ddd;
+ --form-back-color: #ffe97f;
+ --form-fore-color: #03234b;
+ --form-border-color: #3cb4e6;
+ --input-back-color: #ffffff;
+ --input-fore-color: #03234b;
+ --input-border-color: #3cb4e6;
--input-focus-color: #0288d1;
--input-invalid-color: #d32f2f;
--button-back-color: #e2e2e2;
@@ -655,13 +654,13 @@ a {
form {
background: var(--form-back-color);
color: var(--form-fore-color);
- border: 0.0625rem solid var(--form-border-color);
+ border: 0.0714285714rem solid var(--form-border-color);
border-radius: var(--universal-border-radius);
margin: var(--universal-margin);
padding: calc(2 * var(--universal-padding)) var(--universal-padding); }
fieldset {
- border: 0.0625rem solid var(--form-border-color);
+ border: 0.0714285714rem solid var(--form-border-color);
border-radius: var(--universal-border-radius);
margin: calc(var(--universal-margin) / 4);
padding: var(--universal-padding); }
@@ -671,7 +670,7 @@ legend {
display: table;
max-width: 100%;
white-space: normal;
- font-weight: 700;
+ font-weight: 500;
padding: calc(var(--universal-padding) / 2); }
label {
@@ -716,7 +715,7 @@ input:not([type]), [type="text"], [type="email"], [type="number"], [type="search
box-sizing: border-box;
background: var(--input-back-color);
color: var(--input-fore-color);
- border: 0.0625rem solid var(--input-border-color);
+ border: 0.0714285714rem solid var(--input-border-color);
border-radius: var(--universal-border-radius);
margin: calc(var(--universal-margin) / 2);
padding: var(--universal-padding) calc(1.5 * var(--universal-padding)); }
@@ -763,8 +762,8 @@ option {
[type="radio"]:checked:before {
border-radius: 100%;
content: '';
- top: calc(0.0625rem + var(--universal-padding) / 2);
- left: calc(0.0625rem + var(--universal-padding) / 2);
+ top: calc(0.0714285714rem + var(--universal-padding) / 2);
+ left: calc(0.0714285714rem + var(--universal-padding) / 2);
background: var(--input-fore-color);
width: 0.5rem;
height: 0.5rem; }
@@ -793,7 +792,7 @@ a[role="button"], label[role="button"], [role="button"] {
display: inline-block;
background: var(--button-back-color);
color: var(--button-fore-color);
- border: 0.0625rem solid var(--button-border-color);
+ border: 0.0714285714rem solid var(--button-border-color);
border-radius: var(--universal-border-radius);
padding: var(--universal-padding) calc(1.5 * var(--universal-padding));
margin: var(--universal-margin);
@@ -814,7 +813,7 @@ input:disabled, input[disabled], textarea:disabled, textarea[disabled], select:d
.button-group {
display: flex;
- border: 0.0625rem solid var(--button-group-border-color);
+ border: 0.0714285714rem solid var(--button-group-border-color);
border-radius: var(--universal-border-radius);
margin: var(--universal-margin); }
.button-group > button, .button-group [type="button"], .button-group > [type="submit"], .button-group > [type="reset"], .button-group > .button, .button-group > [role="button"] {
@@ -826,13 +825,13 @@ input:disabled, input[disabled], textarea:disabled, textarea[disabled], select:d
border-radius: 0;
box-shadow: none; }
.button-group > :not(:first-child) {
- border-left: 0.0625rem solid var(--button-group-border-color); }
+ border-left: 0.0714285714rem solid var(--button-group-border-color); }
@media screen and (max-width: 499px) {
.button-group {
flex-direction: column; }
.button-group > :not(:first-child) {
border: 0;
- border-top: 0.0625rem solid var(--button-group-border-color); } }
+ border-top: 0.0714285714rem solid var(--button-group-border-color); } }
/*
Custom elements for forms and input elements.
@@ -874,29 +873,29 @@ button.large, [type="button"].large, [type="submit"].large, [type="reset"].large
*/
/* Navigation module CSS variable definitions */
:root {
- --header-back-color: #f8f8f8;
- --header-hover-back-color: #f0f0f0;
- --header-fore-color: #444;
- --header-border-color: #ddd;
- --nav-back-color: #f8f8f8;
- --nav-hover-back-color: #f0f0f0;
- --nav-fore-color: #444;
- --nav-border-color: #ddd;
- --nav-link-color: #0277bd;
- --footer-fore-color: #444;
- --footer-back-color: #f8f8f8;
- --footer-border-color: #ddd;
- --footer-link-color: #0277bd;
- --drawer-back-color: #f8f8f8;
- --drawer-hover-back-color: #f0f0f0;
- --drawer-border-color: #ddd;
- --drawer-close-color: #444; }
+ --header-back-color: #03234b;
+ --header-hover-back-color: #ffd200;
+ --header-fore-color: #ffffff;
+ --header-border-color: #3cb4e6;
+ --nav-back-color: #ffffff;
+ --nav-hover-back-color: #ffe97f;
+ --nav-fore-color: #e6007e;
+ --nav-border-color: #3cb4e6;
+ --nav-link-color: #3cb4e6;
+ --footer-fore-color: #ffffff;
+ --footer-back-color: #03234b;
+ --footer-border-color: #3cb4e6;
+ --footer-link-color: #3cb4e6;
+ --drawer-back-color: #ffffff;
+ --drawer-hover-back-color: #ffe97f;
+ --drawer-border-color: #3cb4e6;
+ --drawer-close-color: #e6007e; }
header {
- height: 3.1875rem;
+ height: 2.75rem;
background: var(--header-back-color);
color: var(--header-fore-color);
- border-bottom: 0.0625rem solid var(--header-border-color);
+ border-bottom: 0.0714285714rem solid var(--header-border-color);
padding: calc(var(--universal-padding) / 4) 0;
white-space: nowrap;
overflow-x: auto;
@@ -927,7 +926,7 @@ header {
nav {
background: var(--nav-back-color);
color: var(--nav-fore-color);
- border: 0.0625rem solid var(--nav-border-color);
+ border: 0.0714285714rem solid var(--nav-border-color);
border-radius: var(--universal-border-radius);
margin: var(--universal-margin); }
nav * {
@@ -946,10 +945,10 @@ nav {
nav .sublink-1:before {
position: absolute;
left: calc(var(--universal-padding) - 1 * var(--universal-padding));
- top: -0.0625rem;
+ top: -0.0714285714rem;
content: '';
height: 100%;
- border: 0.0625rem solid var(--nav-border-color);
+ border: 0.0714285714rem solid var(--nav-border-color);
border-left: 0; }
nav .sublink-2 {
position: relative;
@@ -957,16 +956,16 @@ nav {
nav .sublink-2:before {
position: absolute;
left: calc(var(--universal-padding) - 3 * var(--universal-padding));
- top: -0.0625rem;
+ top: -0.0714285714rem;
content: '';
height: 100%;
- border: 0.0625rem solid var(--nav-border-color);
+ border: 0.0714285714rem solid var(--nav-border-color);
border-left: 0; }
footer {
background: var(--footer-back-color);
color: var(--footer-fore-color);
- border-top: 0.0625rem solid var(--footer-border-color);
+ border-top: 0.0714285714rem solid var(--footer-border-color);
padding: calc(2 * var(--universal-padding)) var(--universal-padding);
font-size: 0.875rem; }
footer a, footer a:visited {
@@ -1013,7 +1012,7 @@ footer.sticky {
height: 100vh;
overflow-y: auto;
background: var(--drawer-back-color);
- border: 0.0625rem solid var(--drawer-border-color);
+ border: 0.0714285714rem solid var(--drawer-border-color);
border-radius: 0;
margin: 0;
z-index: 1110;
@@ -1060,38 +1059,36 @@ footer.sticky {
*/
/* Table module CSS variable definitions. */
:root {
- --table-border-color: #aaa;
- --table-border-separator-color: #666;
- --table-head-back-color: #e6e6e6;
- --table-head-fore-color: #111;
- --table-body-back-color: #f8f8f8;
- --table-body-fore-color: #111;
- --table-body-alt-back-color: #eee; }
+ --table-border-color: #03234b;
+ --table-border-separator-color: #03234b;
+ --table-head-back-color: #03234b;
+ --table-head-fore-color: #ffffff;
+ --table-body-back-color: #ffffff;
+ --table-body-fore-color: #03234b;
+ --table-body-alt-back-color: #f4f4f4; }
table {
border-collapse: separate;
border-spacing: 0;
- : margin: calc(1.5 * var(--universal-margin)) var(--universal-margin);
+ margin: 0;
display: flex;
flex: 0 1 auto;
flex-flow: row wrap;
padding: var(--universal-padding);
- padding-top: 0;
- margin: calc(1.5 * var(--universal-margin)) var(--universal-margin); }
+ padding-top: 0; }
table caption {
- font-size: 1.25 * rem;
+ font-size: 1rem;
margin: calc(2 * var(--universal-margin)) 0;
max-width: 100%;
- flex: 0 0 100%;
- text-align: left;}
+ flex: 0 0 100%; }
table thead, table tbody {
display: flex;
flex-flow: row wrap;
- border: 0.0625rem solid var(--table-border-color); }
+ border: 0.0714285714rem solid var(--table-border-color); }
table thead {
z-index: 999;
border-radius: var(--universal-border-radius) var(--universal-border-radius) 0 0;
- border-bottom: 0.0625rem solid var(--table-border-separator-color); }
+ border-bottom: 0.0714285714rem solid var(--table-border-separator-color); }
table tbody {
border-top: 0;
margin-top: calc(0 - var(--universal-margin));
@@ -1109,11 +1106,11 @@ table {
table td {
background: var(--table-body-back-color);
color: var(--table-body-fore-color);
- border-top: 0.0625rem solid var(--table-border-color); }
+ border-top: 0.0714285714rem solid var(--table-border-color); }
table:not(.horizontal) {
overflow: auto;
- max-height: 850px; }
+ max-height: 100%; }
table:not(.horizontal) thead, table:not(.horizontal) tbody {
max-width: 100%;
flex: 0 0 100%; }
@@ -1134,32 +1131,33 @@ table.horizontal {
border: 0; }
table.horizontal thead, table.horizontal tbody {
border: 0;
+ flex: .2 0 0;
flex-flow: row nowrap; }
table.horizontal tbody {
overflow: auto;
justify-content: space-between;
- flex: 1 0 0;
- margin-left: calc( 4 * var(--universal-margin));
+ flex: .8 0 0;
+ margin-left: 0;
padding-bottom: calc(var(--universal-padding) / 4); }
table.horizontal tr {
flex-direction: column;
flex: 1 0 auto; }
table.horizontal th, table.horizontal td {
- width: 100%;
+ width: auto;
border: 0;
- border-bottom: 0.0625rem solid var(--table-border-color); }
+ border-bottom: 0.0714285714rem solid var(--table-border-color); }
table.horizontal th:not(:first-child), table.horizontal td:not(:first-child) {
border-top: 0; }
table.horizontal th {
text-align: right;
- border-left: 0.0625rem solid var(--table-border-color);
- border-right: 0.0625rem solid var(--table-border-separator-color); }
+ border-left: 0.0714285714rem solid var(--table-border-color);
+ border-right: 0.0714285714rem solid var(--table-border-separator-color); }
table.horizontal thead tr:first-child {
padding-left: 0; }
table.horizontal th:first-child, table.horizontal td:first-child {
- border-top: 0.0625rem solid var(--table-border-color); }
+ border-top: 0.0714285714rem solid var(--table-border-color); }
table.horizontal tbody tr:last-child td {
- border-right: 0.0625rem solid var(--table-border-color); }
+ border-right: 0.0714285714rem solid var(--table-border-color); }
table.horizontal tbody tr:last-child td:first-child {
border-top-right-radius: 0.25rem; }
table.horizontal tbody tr:last-child td:last-child {
@@ -1191,12 +1189,12 @@ table.horizontal {
display: table-row-group; }
table tr, table.horizontal tr {
display: block;
- border: 0.0625rem solid var(--table-border-color);
+ border: 0.0714285714rem solid var(--table-border-color);
border-radius: var(--universal-border-radius);
- background: #fafafa;
+ background: #ffffff;
padding: var(--universal-padding);
margin: var(--universal-margin);
- margin-bottom: calc(2 * var(--universal-margin)); }
+ margin-bottom: calc(1 * var(--universal-margin)); }
table th, table td, table.horizontal th, table.horizontal td {
width: auto; }
table td, table.horizontal td {
@@ -1211,9 +1209,6 @@ table.horizontal {
border-top: 0; }
table tbody tr:last-child td, table.horizontal tbody tr:last-child td {
border-right: 0; } }
-:root {
- --table-body-alt-back-color: #eee; }
-
table tr:nth-of-type(2n) > td {
background: var(--table-body-alt-back-color); }
@@ -1234,8 +1229,8 @@ table.hoverable tr:hover, table.hoverable tr:hover > td, table.hoverable tr:focu
*/
/* Contextual module CSS variable definitions */
:root {
- --mark-back-color: #0277bd;
- --mark-fore-color: #fafafa; }
+ --mark-back-color: #3cb4e6;
+ --mark-fore-color: #ffffff; }
mark {
background: var(--mark-back-color);
@@ -1243,11 +1238,11 @@ mark {
font-size: 0.95em;
line-height: 1em;
border-radius: var(--universal-border-radius);
- padding: calc(var(--universal-padding) / 4) calc(var(--universal-padding) / 2); }
+ padding: calc(var(--universal-padding) / 4) var(--universal-padding); }
mark.inline-block {
display: inline-block;
font-size: 1em;
- line-height: 1.5;
+ line-height: 1.4;
padding: calc(var(--universal-padding) / 2) var(--universal-padding); }
:root {
@@ -1314,8 +1309,8 @@ mark {
:root {
--modal-overlay-color: rgba(0, 0, 0, 0.45);
- --modal-close-color: #444;
- --modal-close-hover-color: #f0f0f0; }
+ --modal-close-color: #e6007e;
+ --modal-close-hover-color: #ffe97f; }
[type="checkbox"].modal {
height: 1px;
@@ -1368,13 +1363,14 @@ mark {
z-index: 1211; }
:root {
- --collapse-label-back-color: #e8e8e8;
- --collapse-label-fore-color: #212121;
- --collapse-label-hover-back-color: #f0f0f0;
- --collapse-selected-label-back-color: #ececec;
- --collapse-border-color: #ddd;
- --collapse-content-back-color: #fafafa;
- --collapse-selected-label-border-color: #0277bd; }
+ --collapse-label-back-color: #03234b;
+ --collapse-label-fore-color: #ffffff;
+ --collapse-label-hover-back-color: #3cb4e6;
+ --collapse-selected-label-back-color: #3cb4e6;
+ --collapse-border-color: var(--collapse-label-back-color);
+ --collapse-selected-border-color: #ceecf8;
+ --collapse-content-back-color: #ffffff;
+ --collapse-selected-label-border-color: #3cb4e6; }
.collapse {
width: calc(100% - 2 * var(--universal-margin));
@@ -1395,13 +1391,13 @@ mark {
.collapse > label {
flex-grow: 1;
display: inline-block;
- height: 1.5rem;
+ height: 1.25rem;
cursor: pointer;
- transition: background 0.3s;
+ transition: background 0.2s;
color: var(--collapse-label-fore-color);
background: var(--collapse-label-back-color);
- border: 0.0625rem solid var(--collapse-border-color);
- padding: calc(1.5 * var(--universal-padding)); }
+ border: 0.0714285714rem solid var(--collapse-selected-border-color);
+ padding: calc(1.25 * var(--universal-padding)); }
.collapse > label:hover, .collapse > label:focus {
background: var(--collapse-label-hover-back-color); }
.collapse > label + div {
@@ -1418,7 +1414,7 @@ mark {
max-height: 1px; }
.collapse > :checked + label {
background: var(--collapse-selected-label-back-color);
- border-bottom-color: var(--collapse-selected-label-border-color); }
+ border-color: var(--collapse-selected-label-border-color); }
.collapse > :checked + label + div {
box-sizing: border-box;
position: relative;
@@ -1427,13 +1423,13 @@ mark {
overflow: auto;
margin: 0;
background: var(--collapse-content-back-color);
- border: 0.0625rem solid var(--collapse-border-color);
+ border: 0.0714285714rem solid var(--collapse-selected-border-color);
border-top: 0;
padding: var(--universal-padding);
clip: auto;
-webkit-clip-path: inset(0%);
clip-path: inset(0%);
- max-height: 850px; }
+ max-height: 100%; }
.collapse > label:not(:first-of-type) {
border-top: 0; }
.collapse > label:first-of-type {
@@ -1450,11 +1446,8 @@ mark {
/*
Custom elements for contextual background elements, toasts and tooltips.
*/
-mark.secondary {
- --mark-back-color: #d32f2f; }
-
mark.tertiary {
- --mark-back-color: #308732; }
+ --mark-back-color: #3cb4e6; }
mark.tag {
padding: calc(var(--universal-padding)/2) var(--universal-padding);
@@ -1463,9 +1456,9 @@ mark.tag {
/*
Definitions for progress elements and spinners.
*/
-/* Progess module CSS variable definitions */
+/* Progress module CSS variable definitions */
:root {
- --progress-back-color: #ddd;
+ --progress-back-color: #3cb4e6;
--progress-fore-color: #555; }
progress {
@@ -1558,45 +1551,45 @@ span[class^='icon-'] {
filter: invert(100%); }
span.icon-alert {
- background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='8' x2='12' y2='12'%3E%3C/line%3E%3Cline x1='12' y1='16' x2='12' y2='16'%3E%3C/line%3E%3C/svg%3E"); }
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='8' x2='12' y2='12'%3E%3C/line%3E%3Cline x1='12' y1='16' x2='12' y2='16'%3E%3C/line%3E%3C/svg%3E"); }
span.icon-bookmark {
- background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M19 21l-7-5-7 5V5a2 2 0 0 1 2-2h10a2 2 0 0 1 2 2z'%3E%3C/path%3E%3C/svg%3E"); }
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M19 21l-7-5-7 5V5a2 2 0 0 1 2-2h10a2 2 0 0 1 2 2z'%3E%3C/path%3E%3C/svg%3E"); }
span.icon-calendar {
- background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='3' y='4' width='18' height='18' rx='2' ry='2'%3E%3C/rect%3E%3Cline x1='16' y1='2' x2='16' y2='6'%3E%3C/line%3E%3Cline x1='8' y1='2' x2='8' y2='6'%3E%3C/line%3E%3Cline x1='3' y1='10' x2='21' y2='10'%3E%3C/line%3E%3C/svg%3E"); }
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='3' y='4' width='18' height='18' rx='2' ry='2'%3E%3C/rect%3E%3Cline x1='16' y1='2' x2='16' y2='6'%3E%3C/line%3E%3Cline x1='8' y1='2' x2='8' y2='6'%3E%3C/line%3E%3Cline x1='3' y1='10' x2='21' y2='10'%3E%3C/line%3E%3C/svg%3E"); }
span.icon-credit {
- background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='1' y='4' width='22' height='16' rx='2' ry='2'%3E%3C/rect%3E%3Cline x1='1' y1='10' x2='23' y2='10'%3E%3C/line%3E%3C/svg%3E"); }
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='1' y='4' width='22' height='16' rx='2' ry='2'%3E%3C/rect%3E%3Cline x1='1' y1='10' x2='23' y2='10'%3E%3C/line%3E%3C/svg%3E"); }
span.icon-edit {
- background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M20 14.66V20a2 2 0 0 1-2 2H4a2 2 0 0 1-2-2V6a2 2 0 0 1 2-2h5.34'%3E%3C/path%3E%3Cpolygon points='18 2 22 6 12 16 8 16 8 12 18 2'%3E%3C/polygon%3E%3C/svg%3E"); }
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M20 14.66V20a2 2 0 0 1-2 2H4a2 2 0 0 1-2-2V6a2 2 0 0 1 2-2h5.34'%3E%3C/path%3E%3Cpolygon points='18 2 22 6 12 16 8 16 8 12 18 2'%3E%3C/polygon%3E%3C/svg%3E"); }
span.icon-link {
- background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M18 13v6a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2V8a2 2 0 0 1 2-2h6'%3E%3C/path%3E%3Cpolyline points='15 3 21 3 21 9'%3E%3C/polyline%3E%3Cline x1='10' y1='14' x2='21' y2='3'%3E%3C/line%3E%3C/svg%3E"); }
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M18 13v6a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2V8a2 2 0 0 1 2-2h6'%3E%3C/path%3E%3Cpolyline points='15 3 21 3 21 9'%3E%3C/polyline%3E%3Cline x1='10' y1='14' x2='21' y2='3'%3E%3C/line%3E%3C/svg%3E"); }
span.icon-help {
- background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M9.09 9a3 3 0 0 1 5.83 1c0 2-3 3-3 3'%3E%3C/path%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='17' x2='12' y2='17'%3E%3C/line%3E%3C/svg%3E"); }
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M9.09 9a3 3 0 0 1 5.83 1c0 2-3 3-3 3'%3E%3C/path%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='17' x2='12' y2='17'%3E%3C/line%3E%3C/svg%3E"); }
span.icon-home {
- background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M3 9l9-7 9 7v11a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2z'%3E%3C/path%3E%3Cpolyline points='9 22 9 12 15 12 15 22'%3E%3C/polyline%3E%3C/svg%3E"); }
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M3 9l9-7 9 7v11a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2z'%3E%3C/path%3E%3Cpolyline points='9 22 9 12 15 12 15 22'%3E%3C/polyline%3E%3C/svg%3E"); }
span.icon-info {
- background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='16' x2='12' y2='12'%3E%3C/line%3E%3Cline x1='12' y1='8' x2='12' y2='8'%3E%3C/line%3E%3C/svg%3E"); }
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='16' x2='12' y2='12'%3E%3C/line%3E%3Cline x1='12' y1='8' x2='12' y2='8'%3E%3C/line%3E%3C/svg%3E"); }
span.icon-lock {
- background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='3' y='11' width='18' height='11' rx='2' ry='2'%3E%3C/rect%3E%3Cpath d='M7 11V7a5 5 0 0 1 10 0v4'%3E%3C/path%3E%3C/svg%3E"); }
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='3' y='11' width='18' height='11' rx='2' ry='2'%3E%3C/rect%3E%3Cpath d='M7 11V7a5 5 0 0 1 10 0v4'%3E%3C/path%3E%3C/svg%3E"); }
span.icon-mail {
- background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M4 4h16c1.1 0 2 .9 2 2v12c0 1.1-.9 2-2 2H4c-1.1 0-2-.9-2-2V6c0-1.1.9-2 2-2z'%3E%3C/path%3E%3Cpolyline points='22,6 12,13 2,6'%3E%3C/polyline%3E%3C/svg%3E"); }
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M4 4h16c1.1 0 2 .9 2 2v12c0 1.1-.9 2-2 2H4c-1.1 0-2-.9-2-2V6c0-1.1.9-2 2-2z'%3E%3C/path%3E%3Cpolyline points='22,6 12,13 2,6'%3E%3C/polyline%3E%3C/svg%3E"); }
span.icon-location {
- background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M21 10c0 7-9 13-9 13s-9-6-9-13a9 9 0 0 1 18 0z'%3E%3C/path%3E%3Ccircle cx='12' cy='10' r='3'%3E%3C/circle%3E%3C/svg%3E"); }
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M21 10c0 7-9 13-9 13s-9-6-9-13a9 9 0 0 1 18 0z'%3E%3C/path%3E%3Ccircle cx='12' cy='10' r='3'%3E%3C/circle%3E%3C/svg%3E"); }
span.icon-phone {
- background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M22 16.92v3a2 2 0 0 1-2.18 2 19.79 19.79 0 0 1-8.63-3.07 19.5 19.5 0 0 1-6-6 19.79 19.79 0 0 1-3.07-8.67A2 2 0 0 1 4.11 2h3a2 2 0 0 1 2 1.72 12.84 12.84 0 0 0 .7 2.81 2 2 0 0 1-.45 2.11L8.09 9.91a16 16 0 0 0 6 6l1.27-1.27a2 2 0 0 1 2.11-.45 12.84 12.84 0 0 0 2.81.7A2 2 0 0 1 22 16.92z'%3E%3C/path%3E%3C/svg%3E"); }
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M22 16.92v3a2 2 0 0 1-2.18 2 19.79 19.79 0 0 1-8.63-3.07 19.5 19.5 0 0 1-6-6 19.79 19.79 0 0 1-3.07-8.67A2 2 0 0 1 4.11 2h3a2 2 0 0 1 2 1.72 12.84 12.84 0 0 0 .7 2.81 2 2 0 0 1-.45 2.11L8.09 9.91a16 16 0 0 0 6 6l1.27-1.27a2 2 0 0 1 2.11-.45 12.84 12.84 0 0 0 2.81.7A2 2 0 0 1 22 16.92z'%3E%3C/path%3E%3C/svg%3E"); }
span.icon-rss {
- background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M4 11a9 9 0 0 1 9 9'%3E%3C/path%3E%3Cpath d='M4 4a16 16 0 0 1 16 16'%3E%3C/path%3E%3Ccircle cx='5' cy='19' r='1'%3E%3C/circle%3E%3C/svg%3E"); }
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M4 11a9 9 0 0 1 9 9'%3E%3C/path%3E%3Cpath d='M4 4a16 16 0 0 1 16 16'%3E%3C/path%3E%3Ccircle cx='5' cy='19' r='1'%3E%3C/circle%3E%3C/svg%3E"); }
span.icon-search {
- background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='11' cy='11' r='8'%3E%3C/circle%3E%3Cline x1='21' y1='21' x2='16.65' y2='16.65'%3E%3C/line%3E%3C/svg%3E"); }
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='11' cy='11' r='8'%3E%3C/circle%3E%3Cline x1='21' y1='21' x2='16.65' y2='16.65'%3E%3C/line%3E%3C/svg%3E"); }
span.icon-settings {
- background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='3'%3E%3C/circle%3E%3Cpath d='M19.4 15a1.65 1.65 0 0 0 .33 1.82l.06.06a2 2 0 0 1 0 2.83 2 2 0 0 1-2.83 0l-.06-.06a1.65 1.65 0 0 0-1.82-.33 1.65 1.65 0 0 0-1 1.51V21a2 2 0 0 1-2 2 2 2 0 0 1-2-2v-.09A1.65 1.65 0 0 0 9 19.4a1.65 1.65 0 0 0-1.82.33l-.06.06a2 2 0 0 1-2.83 0 2 2 0 0 1 0-2.83l.06-.06a1.65 1.65 0 0 0 .33-1.82 1.65 1.65 0 0 0-1.51-1H3a2 2 0 0 1-2-2 2 2 0 0 1 2-2h.09A1.65 1.65 0 0 0 4.6 9a1.65 1.65 0 0 0-.33-1.82l-.06-.06a2 2 0 0 1 0-2.83 2 2 0 0 1 2.83 0l.06.06a1.65 1.65 0 0 0 1.82.33H9a1.65 1.65 0 0 0 1-1.51V3a2 2 0 0 1 2-2 2 2 0 0 1 2 2v.09a1.65 1.65 0 0 0 1 1.51 1.65 1.65 0 0 0 1.82-.33l.06-.06a2 2 0 0 1 2.83 0 2 2 0 0 1 0 2.83l-.06.06a1.65 1.65 0 0 0-.33 1.82V9a1.65 1.65 0 0 0 1.51 1H21a2 2 0 0 1 2 2 2 2 0 0 1-2 2h-.09a1.65 1.65 0 0 0-1.51 1z'%3E%3C/path%3E%3C/svg%3E"); }
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='3'%3E%3C/circle%3E%3Cpath d='M19.4 15a1.65 1.65 0 0 0 .33 1.82l.06.06a2 2 0 0 1 0 2.83 2 2 0 0 1-2.83 0l-.06-.06a1.65 1.65 0 0 0-1.82-.33 1.65 1.65 0 0 0-1 1.51V21a2 2 0 0 1-2 2 2 2 0 0 1-2-2v-.09A1.65 1.65 0 0 0 9 19.4a1.65 1.65 0 0 0-1.82.33l-.06.06a2 2 0 0 1-2.83 0 2 2 0 0 1 0-2.83l.06-.06a1.65 1.65 0 0 0 .33-1.82 1.65 1.65 0 0 0-1.51-1H3a2 2 0 0 1-2-2 2 2 0 0 1 2-2h.09A1.65 1.65 0 0 0 4.6 9a1.65 1.65 0 0 0-.33-1.82l-.06-.06a2 2 0 0 1 0-2.83 2 2 0 0 1 2.83 0l.06.06a1.65 1.65 0 0 0 1.82.33H9a1.65 1.65 0 0 0 1-1.51V3a2 2 0 0 1 2-2 2 2 0 0 1 2 2v.09a1.65 1.65 0 0 0 1 1.51 1.65 1.65 0 0 0 1.82-.33l.06-.06a2 2 0 0 1 2.83 0 2 2 0 0 1 0 2.83l-.06.06a1.65 1.65 0 0 0-.33 1.82V9a1.65 1.65 0 0 0 1.51 1H21a2 2 0 0 1 2 2 2 2 0 0 1-2 2h-.09a1.65 1.65 0 0 0-1.51 1z'%3E%3C/path%3E%3C/svg%3E"); }
span.icon-share {
- background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='18' cy='5' r='3'%3E%3C/circle%3E%3Ccircle cx='6' cy='12' r='3'%3E%3C/circle%3E%3Ccircle cx='18' cy='19' r='3'%3E%3C/circle%3E%3Cline x1='8.59' y1='13.51' x2='15.42' y2='17.49'%3E%3C/line%3E%3Cline x1='15.41' y1='6.51' x2='8.59' y2='10.49'%3E%3C/line%3E%3C/svg%3E"); }
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='18' cy='5' r='3'%3E%3C/circle%3E%3Ccircle cx='6' cy='12' r='3'%3E%3C/circle%3E%3Ccircle cx='18' cy='19' r='3'%3E%3C/circle%3E%3Cline x1='8.59' y1='13.51' x2='15.42' y2='17.49'%3E%3C/line%3E%3Cline x1='15.41' y1='6.51' x2='8.59' y2='10.49'%3E%3C/line%3E%3C/svg%3E"); }
span.icon-cart {
- background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='9' cy='21' r='1'%3E%3C/circle%3E%3Ccircle cx='20' cy='21' r='1'%3E%3C/circle%3E%3Cpath d='M1 1h4l2.68 13.39a2 2 0 0 0 2 1.61h9.72a2 2 0 0 0 2-1.61L23 6H6'%3E%3C/path%3E%3C/svg%3E"); }
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='9' cy='21' r='1'%3E%3C/circle%3E%3Ccircle cx='20' cy='21' r='1'%3E%3C/circle%3E%3Cpath d='M1 1h4l2.68 13.39a2 2 0 0 0 2 1.61h9.72a2 2 0 0 0 2-1.61L23 6H6'%3E%3C/path%3E%3C/svg%3E"); }
span.icon-upload {
- background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M21 15v4a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2v-4'%3E%3C/path%3E%3Cpolyline points='17 8 12 3 7 8'%3E%3C/polyline%3E%3Cline x1='12' y1='3' x2='12' y2='15'%3E%3C/line%3E%3C/svg%3E"); }
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M21 15v4a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2v-4'%3E%3C/path%3E%3Cpolyline points='17 8 12 3 7 8'%3E%3C/polyline%3E%3Cline x1='12' y1='3' x2='12' y2='15'%3E%3C/line%3E%3C/svg%3E"); }
span.icon-user {
- background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M20 21v-2a4 4 0 0 0-4-4H8a4 4 0 0 0-4 4v2'%3E%3C/path%3E%3Ccircle cx='12' cy='7' r='4'%3E%3C/circle%3E%3C/svg%3E"); }
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M20 21v-2a4 4 0 0 0-4-4H8a4 4 0 0 0-4 4v2'%3E%3C/path%3E%3Ccircle cx='12' cy='7' r='4'%3E%3C/circle%3E%3C/svg%3E"); }
/*
Definitions for utilities and helper classes.
@@ -1604,7 +1597,7 @@ span.icon-user {
/* Utility module CSS variable definitions */
:root {
--generic-border-color: rgba(0, 0, 0, 0.3);
- --generic-box-shadow: 0 0.25rem 0.25rem 0 rgba(0, 0, 0, 0.125), 0 0.125rem 0.125rem -0.125rem rgba(0, 0, 0, 0.25); }
+ --generic-box-shadow: 0 0.2857142857rem 0.2857142857rem 0 rgba(0, 0, 0, 0.125), 0 0.1428571429rem 0.1428571429rem -0.1428571429rem rgba(0, 0, 0, 0.125); }
.hidden {
display: none !important; }
@@ -1622,7 +1615,7 @@ span.icon-user {
overflow: hidden !important; }
.bordered {
- border: 0.0625rem solid var(--generic-border-color) !important; }
+ border: 0.0714285714rem solid var(--generic-border-color) !important; }
.rounded {
border-radius: var(--universal-border-radius) !important; }
@@ -1697,4 +1690,14 @@ span.icon-user {
clip-path: inset(100%) !important;
overflow: hidden !important; } }
-/*# sourceMappingURL=mini-default.css.map */
+/*# sourceMappingURL=mini-custom.css.map */
+
+img[alt="ST logo"] { display: block; margin: auto; width: 75%; max-width: 250px; min-width: 71px; }
+img[alt="Cube logo"] { float: right; width: 30%; max-width: 10rem; min-width: 8rem; padding-right: 1rem;}
+
+.figure {
+ display: block;
+ margin-left: auto;
+ margin-right: auto;
+ text-align: center;
+}
\ No newline at end of file
diff --git a/system/Drivers/CMSIS/Device/ST/STM32L1xx/_htmresc/st_logo.png b/system/Drivers/CMSIS/Device/ST/STM32L1xx/_htmresc/st_logo.png
deleted file mode 100644
index 8b80057fd3..0000000000
Binary files a/system/Drivers/CMSIS/Device/ST/STM32L1xx/_htmresc/st_logo.png and /dev/null differ
diff --git a/system/Drivers/CMSIS/Device/ST/STM32L1xx/_htmresc/st_logo_2020.png b/system/Drivers/CMSIS/Device/ST/STM32L1xx/_htmresc/st_logo_2020.png
new file mode 100644
index 0000000000..d6cebb5ac7
Binary files /dev/null and b/system/Drivers/CMSIS/Device/ST/STM32L1xx/_htmresc/st_logo_2020.png differ
diff --git a/system/Drivers/CMSIS/Device/ST/STM32YYxx_CMSIS_version.md b/system/Drivers/CMSIS/Device/ST/STM32YYxx_CMSIS_version.md
index 130b652a78..083796585d 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32YYxx_CMSIS_version.md
+++ b/system/Drivers/CMSIS/Device/ST/STM32YYxx_CMSIS_version.md
@@ -12,7 +12,7 @@
* STM32H5: 1.0.0
* STM32H7: 1.10.3
* STM32L0: 1.9.3
- * STM32L1: 2.3.2
+ * STM32L1: 2.3.3
* STM32L4: 1.7.2
* STM32L5: 1.0.5
* STM32MP1: 1.6.0
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h
index e081204498..620750ee1c 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h
@@ -7,13 +7,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2019 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2021 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -38,6 +37,16 @@ extern "C" {
#define AES_CLEARFLAG_CCF CRYP_CLEARFLAG_CCF
#define AES_CLEARFLAG_RDERR CRYP_CLEARFLAG_RDERR
#define AES_CLEARFLAG_WRERR CRYP_CLEARFLAG_WRERR
+#if defined(STM32U5) || defined(STM32H7) || defined(STM32MP1)
+#define CRYP_DATATYPE_32B CRYP_NO_SWAP
+#define CRYP_DATATYPE_16B CRYP_HALFWORD_SWAP
+#define CRYP_DATATYPE_8B CRYP_BYTE_SWAP
+#define CRYP_DATATYPE_1B CRYP_BIT_SWAP
+#if defined(STM32U5)
+#define CRYP_CCF_CLEAR CRYP_CLEAR_CCF
+#define CRYP_ERR_CLEAR CRYP_CLEAR_RWEIF
+#endif /* STM32U5 */
+#endif /* STM32U5 || STM32H7 || STM32MP1 */
/**
* @}
*/
@@ -97,6 +106,16 @@ extern "C" {
#if defined(STM32H7)
#define ADC_CHANNEL_VBAT_DIV4 ADC_CHANNEL_VBAT
#endif /* STM32H7 */
+
+#if defined(STM32U5)
+#define ADC_SAMPLETIME_5CYCLE ADC_SAMPLETIME_5CYCLES
+#define ADC_SAMPLETIME_391CYCLES_5 ADC_SAMPLETIME_391CYCLES
+#define ADC4_SAMPLETIME_160CYCLES_5 ADC4_SAMPLETIME_814CYCLES_5
+#endif /* STM32U5 */
+
+#if defined(STM32H5)
+#define ADC_CHANNEL_VCORE ADC_CHANNEL_VDDCORE
+#endif /* STM32H5 */
/**
* @}
*/
@@ -124,7 +143,8 @@ extern "C" {
#define COMP_EXTI_LINE_COMP6_EVENT COMP_EXTI_LINE_COMP6
#define COMP_EXTI_LINE_COMP7_EVENT COMP_EXTI_LINE_COMP7
#if defined(STM32L0)
-#define COMP_LPTIMCONNECTION_ENABLED ((uint32_t)0x00000003U) /*!< COMPX output generic naming: connected to LPTIM input 1 for COMP1, LPTIM input 2 for COMP2 */
+#define COMP_LPTIMCONNECTION_ENABLED ((uint32_t)0x00000003U) /*!< COMPX output generic naming: connected to LPTIM
+ input 1 for COMP1, LPTIM input 2 for COMP2 */
#endif
#define COMP_OUTPUT_COMP6TIM2OCREFCLR COMP_OUTPUT_COMP6_TIM2OCREFCLR
#if defined(STM32F373xC) || defined(STM32F378xx)
@@ -198,6 +218,11 @@ extern "C" {
#endif
#endif
+
+#if defined(STM32U5)
+#define __HAL_COMP_COMP1_EXTI_CLEAR_RASING_FLAG __HAL_COMP_COMP1_EXTI_CLEAR_RISING_FLAG
+#endif
+
/**
* @}
*/
@@ -206,6 +231,11 @@ extern "C" {
* @{
*/
#define __HAL_CORTEX_SYSTICKCLK_CONFIG HAL_SYSTICK_CLKSourceConfig
+#if defined(STM32U5)
+#define MPU_DEVICE_nGnRnE MPU_DEVICE_NGNRNE
+#define MPU_DEVICE_nGnRE MPU_DEVICE_NGNRE
+#define MPU_DEVICE_nGRE MPU_DEVICE_NGRE
+#endif /* STM32U5 */
/**
* @}
*/
@@ -213,8 +243,13 @@ extern "C" {
/** @defgroup CRC_Aliases CRC API aliases
* @{
*/
-#define HAL_CRC_Input_Data_Reverse HAL_CRCEx_Input_Data_Reverse /*!< Aliased to HAL_CRCEx_Input_Data_Reverse for inter STM32 series compatibility */
-#define HAL_CRC_Output_Data_Reverse HAL_CRCEx_Output_Data_Reverse /*!< Aliased to HAL_CRCEx_Output_Data_Reverse for inter STM32 series compatibility */
+#if defined(STM32H5) || defined(STM32C0)
+#else
+#define HAL_CRC_Input_Data_Reverse HAL_CRCEx_Input_Data_Reverse /*!< Aliased to HAL_CRCEx_Input_Data_Reverse for
+ inter STM32 series compatibility */
+#define HAL_CRC_Output_Data_Reverse HAL_CRCEx_Output_Data_Reverse /*!< Aliased to HAL_CRCEx_Output_Data_Reverse for
+ inter STM32 series compatibility */
+#endif
/**
* @}
*/
@@ -244,12 +279,25 @@ extern "C" {
#define DAC_WAVEGENERATION_NOISE DAC_WAVE_NOISE
#define DAC_WAVEGENERATION_TRIANGLE DAC_WAVE_TRIANGLE
-#if defined(STM32G4) || defined(STM32H7)
+#if defined(STM32G4) || defined(STM32L5) || defined(STM32H7) || defined (STM32U5)
#define DAC_CHIPCONNECT_DISABLE DAC_CHIPCONNECT_EXTERNAL
#define DAC_CHIPCONNECT_ENABLE DAC_CHIPCONNECT_INTERNAL
#endif
-#if defined(STM32L1) || defined(STM32L4) || defined(STM32G0) || defined(STM32L5) || defined(STM32H7) || defined(STM32F4) || defined(STM32G4)
+#if defined(STM32U5)
+#define DAC_TRIGGER_STOP_LPTIM1_OUT DAC_TRIGGER_STOP_LPTIM1_CH1
+#define DAC_TRIGGER_STOP_LPTIM3_OUT DAC_TRIGGER_STOP_LPTIM3_CH1
+#define DAC_TRIGGER_LPTIM1_OUT DAC_TRIGGER_LPTIM1_CH1
+#define DAC_TRIGGER_LPTIM3_OUT DAC_TRIGGER_LPTIM3_CH1
+#endif
+
+#if defined(STM32H5)
+#define DAC_TRIGGER_LPTIM1_OUT DAC_TRIGGER_LPTIM1_CH1
+#define DAC_TRIGGER_LPTIM2_OUT DAC_TRIGGER_LPTIM2_CH1
+#endif
+
+#if defined(STM32L1) || defined(STM32L4) || defined(STM32G0) || defined(STM32L5) || defined(STM32H7) || \
+ defined(STM32F4) || defined(STM32G4)
#define HAL_DAC_MSP_INIT_CB_ID HAL_DAC_MSPINIT_CB_ID
#define HAL_DAC_MSP_DEINIT_CB_ID HAL_DAC_MSPDEINIT_CB_ID
#endif
@@ -314,7 +362,8 @@ extern "C" {
#define HAL_DMAMUX_REQUEST_GEN_FALLING HAL_DMAMUX_REQ_GEN_FALLING
#define HAL_DMAMUX_REQUEST_GEN_RISING_FALLING HAL_DMAMUX_REQ_GEN_RISING_FALLING
-#if defined(STM32L4R5xx) || defined(STM32L4R9xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
+#if defined(STM32L4R5xx) || defined(STM32L4R9xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || \
+ defined(STM32L4S7xx) || defined(STM32L4S9xx)
#define DMA_REQUEST_DCMI_PSSI DMA_REQUEST_DCMI
#endif
@@ -391,6 +440,10 @@ extern "C" {
#define DAC_TRIGGER_LP2_OUT DAC_TRIGGER_LPTIM2_OUT
#endif /* STM32H7 */
+
+#if defined(STM32U5)
+#define GPDMA1_REQUEST_DCMI GPDMA1_REQUEST_DCMI_PSSI
+#endif /* STM32U5 */
/**
* @}
*/
@@ -470,7 +523,7 @@ extern "C" {
#define OB_RDP_LEVEL0 OB_RDP_LEVEL_0
#define OB_RDP_LEVEL1 OB_RDP_LEVEL_1
#define OB_RDP_LEVEL2 OB_RDP_LEVEL_2
-#if defined(STM32G0)
+#if defined(STM32G0) || defined(STM32C0)
#define OB_BOOT_LOCK_DISABLE OB_BOOT_ENTRY_FORCED_NONE
#define OB_BOOT_LOCK_ENABLE OB_BOOT_ENTRY_FORCED_FLASH
#else
@@ -487,6 +540,18 @@ extern "C" {
#define FLASH_FLAG_WDW FLASH_FLAG_WBNE
#define OB_WRP_SECTOR_All OB_WRP_SECTOR_ALL
#endif /* STM32H7 */
+#if defined(STM32U5)
+#define OB_USER_nRST_STOP OB_USER_NRST_STOP
+#define OB_USER_nRST_STDBY OB_USER_NRST_STDBY
+#define OB_USER_nRST_SHDW OB_USER_NRST_SHDW
+#define OB_USER_nSWBOOT0 OB_USER_NSWBOOT0
+#define OB_USER_nBOOT0 OB_USER_NBOOT0
+#define OB_nBOOT0_RESET OB_NBOOT0_RESET
+#define OB_nBOOT0_SET OB_NBOOT0_SET
+#define OB_USER_SRAM134_RST OB_USER_SRAM_RST
+#define OB_SRAM134_RST_ERASE OB_SRAM_RST_ERASE
+#define OB_SRAM134_RST_NOT_ERASE OB_SRAM_RST_NOT_ERASE
+#endif /* STM32U5 */
/**
* @}
@@ -530,6 +595,106 @@ extern "C" {
#define HAL_SYSCFG_DisableIOAnalogSwitchVDD HAL_SYSCFG_DisableIOSwitchVDD
#endif /* STM32G4 */
+#if defined(STM32H5)
+#define SYSCFG_IT_FPU_IOC SBS_IT_FPU_IOC
+#define SYSCFG_IT_FPU_DZC SBS_IT_FPU_DZC
+#define SYSCFG_IT_FPU_UFC SBS_IT_FPU_UFC
+#define SYSCFG_IT_FPU_OFC SBS_IT_FPU_OFC
+#define SYSCFG_IT_FPU_IDC SBS_IT_FPU_IDC
+#define SYSCFG_IT_FPU_IXC SBS_IT_FPU_IXC
+
+#define SYSCFG_BREAK_FLASH_ECC SBS_BREAK_FLASH_ECC
+#define SYSCFG_BREAK_PVD SBS_BREAK_PVD
+#define SYSCFG_BREAK_SRAM_ECC SBS_BREAK_SRAM_ECC
+#define SYSCFG_BREAK_LOCKUP SBS_BREAK_LOCKUP
+
+#define SYSCFG_VREFBUF_VOLTAGE_SCALE0 VREFBUF_VOLTAGE_SCALE0
+#define SYSCFG_VREFBUF_VOLTAGE_SCALE1 VREFBUF_VOLTAGE_SCALE1
+#define SYSCFG_VREFBUF_VOLTAGE_SCALE2 VREFBUF_VOLTAGE_SCALE2
+#define SYSCFG_VREFBUF_VOLTAGE_SCALE3 VREFBUF_VOLTAGE_SCALE3
+
+#define SYSCFG_VREFBUF_HIGH_IMPEDANCE_DISABLE VREFBUF_HIGH_IMPEDANCE_DISABLE
+#define SYSCFG_VREFBUF_HIGH_IMPEDANCE_ENABLE VREFBUF_HIGH_IMPEDANCE_ENABLE
+
+#define SYSCFG_FASTMODEPLUS_PB6 SBS_FASTMODEPLUS_PB6
+#define SYSCFG_FASTMODEPLUS_PB7 SBS_FASTMODEPLUS_PB7
+#define SYSCFG_FASTMODEPLUS_PB8 SBS_FASTMODEPLUS_PB8
+#define SYSCFG_FASTMODEPLUS_PB9 SBS_FASTMODEPLUS_PB9
+
+#define SYSCFG_ETH_MII SBS_ETH_MII
+#define SYSCFG_ETH_RMII SBS_ETH_RMII
+#define IS_SYSCFG_ETHERNET_CONFIG IS_SBS_ETHERNET_CONFIG
+
+#define SYSCFG_MEMORIES_ERASE_FLAG_IPMEE SBS_MEMORIES_ERASE_FLAG_IPMEE
+#define SYSCFG_MEMORIES_ERASE_FLAG_MCLR SBS_MEMORIES_ERASE_FLAG_MCLR
+#define IS_SYSCFG_MEMORIES_ERASE_FLAG IS_SBS_MEMORIES_ERASE_FLAG
+
+#define IS_SYSCFG_CODE_CONFIG IS_SBS_CODE_CONFIG
+
+#define SYSCFG_MPU_NSEC SBS_MPU_NSEC
+#define SYSCFG_VTOR_NSEC SBS_VTOR_NSEC
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#define SYSCFG_SAU SBS_SAU
+#define SYSCFG_MPU_SEC SBS_MPU_SEC
+#define SYSCFG_VTOR_AIRCR_SEC SBS_VTOR_AIRCR_SEC
+#define SYSCFG_LOCK_ALL SBS_LOCK_ALL
+#else
+#define SYSCFG_LOCK_ALL SBS_LOCK_ALL
+#endif /* __ARM_FEATURE_CMSE */
+
+#define SYSCFG_CLK SBS_CLK
+#define SYSCFG_CLASSB SBS_CLASSB
+#define SYSCFG_FPU SBS_FPU
+#define SYSCFG_ALL SBS_ALL
+
+#define SYSCFG_SEC SBS_SEC
+#define SYSCFG_NSEC SBS_NSEC
+
+#define __HAL_SYSCFG_FPU_INTERRUPT_ENABLE __HAL_SBS_FPU_INTERRUPT_ENABLE
+#define __HAL_SYSCFG_FPU_INTERRUPT_DISABLE __HAL_SBS_FPU_INTERRUPT_DISABLE
+
+#define __HAL_SYSCFG_BREAK_ECC_LOCK __HAL_SBS_BREAK_ECC_LOCK
+#define __HAL_SYSCFG_BREAK_LOCKUP_LOCK __HAL_SBS_BREAK_LOCKUP_LOCK
+#define __HAL_SYSCFG_BREAK_PVD_LOCK __HAL_SBS_BREAK_PVD_LOCK
+#define __HAL_SYSCFG_BREAK_SRAM_ECC_LOCK __HAL_SBS_BREAK_SRAM_ECC_LOCK
+
+#define __HAL_SYSCFG_FASTMODEPLUS_ENABLE __HAL_SBS_FASTMODEPLUS_ENABLE
+#define __HAL_SYSCFG_FASTMODEPLUS_DISABLE __HAL_SBS_FASTMODEPLUS_DISABLE
+
+#define __HAL_SYSCFG_GET_MEMORIES_ERASE_STATUS __HAL_SBS_GET_MEMORIES_ERASE_STATUS
+#define __HAL_SYSCFG_CLEAR_MEMORIES_ERASE_STATUS __HAL_SBS_CLEAR_MEMORIES_ERASE_STATUS
+
+#define IS_SYSCFG_FPU_INTERRUPT IS_SBS_FPU_INTERRUPT
+#define IS_SYSCFG_BREAK_CONFIG IS_SBS_BREAK_CONFIG
+#define IS_SYSCFG_VREFBUF_VOLTAGE_SCALE IS_VREFBUF_VOLTAGE_SCALE
+#define IS_SYSCFG_VREFBUF_HIGH_IMPEDANCE IS_VREFBUF_HIGH_IMPEDANCE
+#define IS_SYSCFG_VREFBUF_TRIMMING IS_VREFBUF_TRIMMING
+#define IS_SYSCFG_FASTMODEPLUS IS_SBS_FASTMODEPLUS
+#define IS_SYSCFG_ITEMS_ATTRIBUTES IS_SBS_ITEMS_ATTRIBUTES
+#define IS_SYSCFG_ATTRIBUTES IS_SBS_ATTRIBUTES
+#define IS_SYSCFG_LOCK_ITEMS IS_SBS_LOCK_ITEMS
+
+#define HAL_SYSCFG_VREFBUF_VoltageScalingConfig HAL_VREFBUF_VoltageScalingConfig
+#define HAL_SYSCFG_VREFBUF_HighImpedanceConfig HAL_VREFBUF_HighImpedanceConfig
+#define HAL_SYSCFG_VREFBUF_TrimmingConfig HAL_VREFBUF_TrimmingConfig
+#define HAL_SYSCFG_EnableVREFBUF HAL_EnableVREFBUF
+#define HAL_SYSCFG_DisableVREFBUF HAL_DisableVREFBUF
+
+#define HAL_SYSCFG_EnableIOAnalogSwitchBooster HAL_SBS_EnableIOAnalogSwitchBooster
+#define HAL_SYSCFG_DisableIOAnalogSwitchBooster HAL_SBS_DisableIOAnalogSwitchBooster
+#define HAL_SYSCFG_ETHInterfaceSelect HAL_SBS_ETHInterfaceSelect
+
+#define HAL_SYSCFG_Lock HAL_SBS_Lock
+#define HAL_SYSCFG_GetLock HAL_SBS_GetLock
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#define HAL_SYSCFG_ConfigAttributes HAL_SBS_ConfigAttributes
+#define HAL_SYSCFG_GetConfigAttributes HAL_SBS_GetConfigAttributes
+#endif /* __ARM_FEATURE_CMSE */
+
+#endif /* STM32H5 */
+
+
/**
* @}
*/
@@ -597,19 +762,21 @@ extern "C" {
#define GPIO_AF10_OTG2_HS GPIO_AF10_OTG2_FS
#define GPIO_AF10_OTG1_FS GPIO_AF10_OTG1_HS
#define GPIO_AF12_OTG2_FS GPIO_AF12_OTG1_FS
-#endif /*STM32H743xx || STM32H753xx || STM32H750xx || STM32H742xx || STM32H745xx || STM32H755xx || STM32H747xx || STM32H757xx */
+#endif /*STM32H743xx || STM32H753xx || STM32H750xx || STM32H742xx || STM32H745xx || STM32H755xx || STM32H747xx || \
+ STM32H757xx */
#endif /* STM32H7 */
#define GPIO_AF0_LPTIM GPIO_AF0_LPTIM1
#define GPIO_AF1_LPTIM GPIO_AF1_LPTIM1
#define GPIO_AF2_LPTIM GPIO_AF2_LPTIM1
-#if defined(STM32L0) || defined(STM32L4) || defined(STM32F4) || defined(STM32F2) || defined(STM32F7) || defined(STM32G4) || defined(STM32H7) || defined(STM32WB)
+#if defined(STM32L0) || defined(STM32L4) || defined(STM32F4) || defined(STM32F2) || defined(STM32F7) || \
+ defined(STM32G4) || defined(STM32H7) || defined(STM32WB) || defined(STM32U5)
#define GPIO_SPEED_LOW GPIO_SPEED_FREQ_LOW
#define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_MEDIUM
#define GPIO_SPEED_FAST GPIO_SPEED_FREQ_HIGH
#define GPIO_SPEED_HIGH GPIO_SPEED_FREQ_VERY_HIGH
-#endif /* STM32L0 || STM32L4 || STM32F4 || STM32F2 || STM32F7 || STM32G4 || STM32H7 || STM32WB*/
+#endif /* STM32L0 || STM32L4 || STM32F4 || STM32F2 || STM32F7 || STM32G4 || STM32H7 || STM32WB || STM32U5*/
#if defined(STM32L1)
#define GPIO_SPEED_VERY_LOW GPIO_SPEED_FREQ_LOW
@@ -625,6 +792,42 @@ extern "C" {
#endif /* STM32F0 || STM32F3 || STM32F1 */
#define GPIO_AF6_DFSDM GPIO_AF6_DFSDM1
+
+#if defined(STM32U5) || defined(STM32H5)
+#define GPIO_AF0_RTC_50Hz GPIO_AF0_RTC_50HZ
+#endif /* STM32U5 || STM32H5 */
+#if defined(STM32U5)
+#define GPIO_AF0_S2DSTOP GPIO_AF0_SRDSTOP
+#define GPIO_AF11_LPGPIO GPIO_AF11_LPGPIO1
+#endif /* STM32U5 */
+/**
+ * @}
+ */
+
+/** @defgroup HAL_GTZC_Aliased_Defines HAL GTZC Aliased Defines maintained for legacy purpose
+ * @{
+ */
+#if defined(STM32U5)
+#define GTZC_PERIPH_DCMI GTZC_PERIPH_DCMI_PSSI
+#define GTZC_PERIPH_LTDC GTZC_PERIPH_LTDCUSB
+#endif /* STM32U5 */
+#if defined(STM32H5)
+#define GTZC_PERIPH_DAC12 GTZC_PERIPH_DAC1
+#define GTZC_PERIPH_ADC12 GTZC_PERIPH_ADC
+#define GTZC_PERIPH_USBFS GTZC_PERIPH_USB
+#endif /* STM32H5 */
+#if defined(STM32H5) || defined(STM32U5)
+#define GTZC_MCPBB_NB_VCTR_REG_MAX GTZC_MPCBB_NB_VCTR_REG_MAX
+#define GTZC_MCPBB_NB_LCK_VCTR_REG_MAX GTZC_MPCBB_NB_LCK_VCTR_REG_MAX
+#define GTZC_MCPBB_SUPERBLOCK_UNLOCKED GTZC_MPCBB_SUPERBLOCK_UNLOCKED
+#define GTZC_MCPBB_SUPERBLOCK_LOCKED GTZC_MPCBB_SUPERBLOCK_LOCKED
+#define GTZC_MCPBB_BLOCK_NSEC GTZC_MPCBB_BLOCK_NSEC
+#define GTZC_MCPBB_BLOCK_SEC GTZC_MPCBB_BLOCK_SEC
+#define GTZC_MCPBB_BLOCK_NPRIV GTZC_MPCBB_BLOCK_NPRIV
+#define GTZC_MCPBB_BLOCK_PRIV GTZC_MPCBB_BLOCK_PRIV
+#define GTZC_MCPBB_LOCK_OFF GTZC_MPCBB_LOCK_OFF
+#define GTZC_MCPBB_LOCK_ON GTZC_MPCBB_LOCK_ON
+#endif /* STM32H5 || STM32U5 */
/**
* @}
*/
@@ -805,7 +1008,8 @@ extern "C" {
#define I2C_NOSTRETCH_ENABLED I2C_NOSTRETCH_ENABLE
#define I2C_ANALOGFILTER_ENABLED I2C_ANALOGFILTER_ENABLE
#define I2C_ANALOGFILTER_DISABLED I2C_ANALOGFILTER_DISABLE
-#if defined(STM32F0) || defined(STM32F1) || defined(STM32F3) || defined(STM32G0) || defined(STM32L4) || defined(STM32L1) || defined(STM32F7)
+#if defined(STM32F0) || defined(STM32F1) || defined(STM32F3) || defined(STM32G0) || defined(STM32L4) || \
+ defined(STM32L1) || defined(STM32F7)
#define HAL_I2C_STATE_MEM_BUSY_TX HAL_I2C_STATE_BUSY_TX
#define HAL_I2C_STATE_MEM_BUSY_RX HAL_I2C_STATE_BUSY_RX
#define HAL_I2C_STATE_MASTER_BUSY_TX HAL_I2C_STATE_BUSY_TX
@@ -862,6 +1066,20 @@ extern "C" {
#define LPTIM_TRIGSAMPLETIME_4TRANSITION LPTIM_TRIGSAMPLETIME_4TRANSITIONS
#define LPTIM_TRIGSAMPLETIME_8TRANSITION LPTIM_TRIGSAMPLETIME_8TRANSITIONS
+
+/** @defgroup HAL_LPTIM_Aliased_Defines HAL LPTIM Aliased Defines maintained for legacy purpose
+ * @{
+ */
+#define HAL_LPTIM_ReadCompare HAL_LPTIM_ReadCapturedValue
+/**
+ * @}
+ */
+
+#if defined(STM32U5)
+#define LPTIM_ISR_CC1 LPTIM_ISR_CC1IF
+#define LPTIM_ISR_CC2 LPTIM_ISR_CC2IF
+#define LPTIM_CHANNEL_ALL 0x00000000U
+#endif /* STM32U5 */
/**
* @}
*/
@@ -929,7 +1147,7 @@ extern "C" {
#define OPAMP_PGACONNECT_VM0 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0
#define OPAMP_PGACONNECT_VM1 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO1
-#if defined(STM32L1) || defined(STM32L4) || defined(STM32L5) || defined(STM32H7) || defined(STM32G4)
+#if defined(STM32L1) || defined(STM32L4) || defined(STM32L5) || defined(STM32H7) || defined(STM32G4) || defined(STM32U5)
#define HAL_OPAMP_MSP_INIT_CB_ID HAL_OPAMP_MSPINIT_CB_ID
#define HAL_OPAMP_MSP_DEINIT_CB_ID HAL_OPAMP_MSPDEINIT_CB_ID
#endif
@@ -1013,8 +1231,8 @@ extern "C" {
#define RTC_TAMPER1_2_3_INTERRUPT RTC_ALL_TAMPER_INTERRUPT
#define RTC_TIMESTAMPPIN_PC13 RTC_TIMESTAMPPIN_DEFAULT
-#define RTC_TIMESTAMPPIN_PA0 RTC_TIMESTAMPPIN_POS1
-#define RTC_TIMESTAMPPIN_PI8 RTC_TIMESTAMPPIN_POS1
+#define RTC_TIMESTAMPPIN_PA0 RTC_TIMESTAMPPIN_POS1
+#define RTC_TIMESTAMPPIN_PI8 RTC_TIMESTAMPPIN_POS1
#define RTC_TIMESTAMPPIN_PC1 RTC_TIMESTAMPPIN_POS2
#define RTC_OUTPUT_REMAP_PC13 RTC_OUTPUT_REMAP_NONE
@@ -1025,15 +1243,42 @@ extern "C" {
#define RTC_TAMPERPIN_PA0 RTC_TAMPERPIN_POS1
#define RTC_TAMPERPIN_PI8 RTC_TAMPERPIN_POS1
+#if defined(STM32H5)
+#define TAMP_SECRETDEVICE_ERASE_NONE TAMP_DEVICESECRETS_ERASE_NONE
+#define TAMP_SECRETDEVICE_ERASE_BKP_SRAM TAMP_DEVICESECRETS_ERASE_BKPSRAM
+#endif /* STM32H5 */
+
+#if defined(STM32WBA)
+#define TAMP_SECRETDEVICE_ERASE_NONE TAMP_DEVICESECRETS_ERASE_NONE
+#define TAMP_SECRETDEVICE_ERASE_SRAM2 TAMP_DEVICESECRETS_ERASE_SRAM2
+#define TAMP_SECRETDEVICE_ERASE_RHUK TAMP_DEVICESECRETS_ERASE_RHUK
+#define TAMP_SECRETDEVICE_ERASE_ICACHE TAMP_DEVICESECRETS_ERASE_ICACHE
+#define TAMP_SECRETDEVICE_ERASE_SAES_AES_HASH TAMP_DEVICESECRETS_ERASE_SAES_AES_HASH
+#define TAMP_SECRETDEVICE_ERASE_PKA_SRAM TAMP_DEVICESECRETS_ERASE_PKA_SRAM
+#define TAMP_SECRETDEVICE_ERASE_ALL TAMP_DEVICESECRETS_ERASE_ALL
+#endif /* STM32WBA */
+
+#if defined(STM32H5) || defined(STM32WBA)
+#define TAMP_SECRETDEVICE_ERASE_DISABLE TAMP_DEVICESECRETS_ERASE_NONE
+#define TAMP_SECRETDEVICE_ERASE_ENABLE TAMP_SECRETDEVICE_ERASE_ALL
+#endif /* STM32H5 || STM32WBA */
+
+#if defined(STM32F7)
+#define RTC_TAMPCR_TAMPXE RTC_TAMPER_ENABLE_BITS_MASK
+#define RTC_TAMPCR_TAMPXIE RTC_TAMPER_IT_ENABLE_BITS_MASK
+#endif /* STM32F7 */
+
#if defined(STM32H7)
#define RTC_TAMPCR_TAMPXE RTC_TAMPER_X
#define RTC_TAMPCR_TAMPXIE RTC_TAMPER_X_INTERRUPT
+#endif /* STM32H7 */
+#if defined(STM32F7) || defined(STM32H7) || defined(STM32L0)
#define RTC_TAMPER1_INTERRUPT RTC_IT_TAMP1
#define RTC_TAMPER2_INTERRUPT RTC_IT_TAMP2
#define RTC_TAMPER3_INTERRUPT RTC_IT_TAMP3
-#define RTC_ALL_TAMPER_INTERRUPT RTC_IT_TAMPALL
-#endif /* STM32H7 */
+#define RTC_ALL_TAMPER_INTERRUPT RTC_IT_TAMP
+#endif /* STM32F7 || STM32H7 || STM32L0 */
/**
* @}
@@ -1200,6 +1445,10 @@ extern "C" {
#define TIM_TIM3_TI1_COMP1COMP2_OUT TIM_TIM3_TI1_COMP1_COMP2
#endif
+#if defined(STM32U5)
+#define OCREF_CLEAR_SELECT_Pos OCREF_CLEAR_SELECT_POS
+#define OCREF_CLEAR_SELECT_Msk OCREF_CLEAR_SELECT_MSK
+#endif
/**
* @}
*/
@@ -1309,30 +1558,40 @@ extern "C" {
#define ETH_MMCRFAECR 0x00000198U
#define ETH_MMCRGUFCR 0x000001C4U
-#define ETH_MAC_TXFIFO_FULL 0x02000000U /* Tx FIFO full */
-#define ETH_MAC_TXFIFONOT_EMPTY 0x01000000U /* Tx FIFO not empty */
-#define ETH_MAC_TXFIFO_WRITE_ACTIVE 0x00400000U /* Tx FIFO write active */
-#define ETH_MAC_TXFIFO_IDLE 0x00000000U /* Tx FIFO read status: Idle */
-#define ETH_MAC_TXFIFO_READ 0x00100000U /* Tx FIFO read status: Read (transferring data to the MAC transmitter) */
-#define ETH_MAC_TXFIFO_WAITING 0x00200000U /* Tx FIFO read status: Waiting for TxStatus from MAC transmitter */
-#define ETH_MAC_TXFIFO_WRITING 0x00300000U /* Tx FIFO read status: Writing the received TxStatus or flushing the TxFIFO */
-#define ETH_MAC_TRANSMISSION_PAUSE 0x00080000U /* MAC transmitter in pause */
-#define ETH_MAC_TRANSMITFRAMECONTROLLER_IDLE 0x00000000U /* MAC transmit frame controller: Idle */
-#define ETH_MAC_TRANSMITFRAMECONTROLLER_WAITING 0x00020000U /* MAC transmit frame controller: Waiting for Status of previous frame or IFG/backoff period to be over */
-#define ETH_MAC_TRANSMITFRAMECONTROLLER_GENRATING_PCF 0x00040000U /* MAC transmit frame controller: Generating and transmitting a Pause control frame (in full duplex mode) */
-#define ETH_MAC_TRANSMITFRAMECONTROLLER_TRANSFERRING 0x00060000U /* MAC transmit frame controller: Transferring input frame for transmission */
+#define ETH_MAC_TXFIFO_FULL 0x02000000U /* Tx FIFO full */
+#define ETH_MAC_TXFIFONOT_EMPTY 0x01000000U /* Tx FIFO not empty */
+#define ETH_MAC_TXFIFO_WRITE_ACTIVE 0x00400000U /* Tx FIFO write active */
+#define ETH_MAC_TXFIFO_IDLE 0x00000000U /* Tx FIFO read status: Idle */
+#define ETH_MAC_TXFIFO_READ 0x00100000U /* Tx FIFO read status: Read (transferring data to
+ the MAC transmitter) */
+#define ETH_MAC_TXFIFO_WAITING 0x00200000U /* Tx FIFO read status: Waiting for TxStatus from
+ MAC transmitter */
+#define ETH_MAC_TXFIFO_WRITING 0x00300000U /* Tx FIFO read status: Writing the received TxStatus
+ or flushing the TxFIFO */
+#define ETH_MAC_TRANSMISSION_PAUSE 0x00080000U /* MAC transmitter in pause */
+#define ETH_MAC_TRANSMITFRAMECONTROLLER_IDLE 0x00000000U /* MAC transmit frame controller: Idle */
+#define ETH_MAC_TRANSMITFRAMECONTROLLER_WAITING 0x00020000U /* MAC transmit frame controller: Waiting for Status
+ of previous frame or IFG/backoff period to be over */
+#define ETH_MAC_TRANSMITFRAMECONTROLLER_GENRATING_PCF 0x00040000U /* MAC transmit frame controller: Generating and
+ transmitting a Pause control frame (in full duplex mode) */
+#define ETH_MAC_TRANSMITFRAMECONTROLLER_TRANSFERRING 0x00060000U /* MAC transmit frame controller: Transferring input
+ frame for transmission */
#define ETH_MAC_MII_TRANSMIT_ACTIVE 0x00010000U /* MAC MII transmit engine active */
#define ETH_MAC_RXFIFO_EMPTY 0x00000000U /* Rx FIFO fill level: empty */
-#define ETH_MAC_RXFIFO_BELOW_THRESHOLD 0x00000100U /* Rx FIFO fill level: fill-level below flow-control de-activate threshold */
-#define ETH_MAC_RXFIFO_ABOVE_THRESHOLD 0x00000200U /* Rx FIFO fill level: fill-level above flow-control activate threshold */
+#define ETH_MAC_RXFIFO_BELOW_THRESHOLD 0x00000100U /* Rx FIFO fill level: fill-level below flow-control
+ de-activate threshold */
+#define ETH_MAC_RXFIFO_ABOVE_THRESHOLD 0x00000200U /* Rx FIFO fill level: fill-level above flow-control
+ activate threshold */
#define ETH_MAC_RXFIFO_FULL 0x00000300U /* Rx FIFO fill level: full */
#if defined(STM32F1)
#else
#define ETH_MAC_READCONTROLLER_IDLE 0x00000000U /* Rx FIFO read controller IDLE state */
#define ETH_MAC_READCONTROLLER_READING_DATA 0x00000020U /* Rx FIFO read controller Reading frame data */
-#define ETH_MAC_READCONTROLLER_READING_STATUS 0x00000040U /* Rx FIFO read controller Reading frame status (or time-stamp) */
+#define ETH_MAC_READCONTROLLER_READING_STATUS 0x00000040U /* Rx FIFO read controller Reading frame status
+ (or time-stamp) */
#endif
-#define ETH_MAC_READCONTROLLER_FLUSHING 0x00000060U /* Rx FIFO read controller Flushing the frame data and status */
+#define ETH_MAC_READCONTROLLER_FLUSHING 0x00000060U /* Rx FIFO read controller Flushing the frame data and
+ status */
#define ETH_MAC_RXFIFO_WRITE_ACTIVE 0x00000010U /* Rx FIFO write controller active */
#define ETH_MAC_SMALL_FIFO_NOTACTIVE 0x00000000U /* MAC small FIFO read / write controllers not active */
#define ETH_MAC_SMALL_FIFO_READ_ACTIVE 0x00000002U /* MAC small FIFO read controller active */
@@ -1390,7 +1649,7 @@ extern "C" {
#if defined(STM32L4) || defined(STM32F7) || defined(STM32F427xx) || defined(STM32F437xx) \
|| defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx) \
- || defined(STM32H7)
+ || defined(STM32H7) || defined(STM32U5)
/** @defgroup DMA2D_Aliases DMA2D API Aliases
* @{
*/
@@ -1400,7 +1659,7 @@ extern "C" {
* @}
*/
-#endif /* STM32L4 || STM32F7 || STM32F4 || STM32H7 */
+#endif /* STM32L4 || STM32F7 || STM32F4 || STM32H7 || STM32U5 */
/** @defgroup HAL_PPP_Aliased_Defines HAL PPP Aliased Defines maintained for legacy purpose
* @{
@@ -1416,6 +1675,19 @@ extern "C" {
* @{
*/
#define HAL_CRYP_ComputationCpltCallback HAL_CRYPEx_ComputationCpltCallback
+/**
+ * @}
+ */
+
+/** @defgroup HAL_DCACHE_Aliased_Functions HAL DCACHE Aliased Functions maintained for legacy purpose
+ * @{
+ */
+
+#if defined(STM32U5)
+#define HAL_DCACHE_CleanInvalidateByAddr HAL_DCACHE_CleanInvalidByAddr
+#define HAL_DCACHE_CleanInvalidateByAddr_IT HAL_DCACHE_CleanInvalidByAddr_IT
+#endif /* STM32U5 */
+
/**
* @}
*/
@@ -1490,7 +1762,8 @@ extern "C" {
#define HAL_EnableDBGStandbyMode HAL_DBGMCU_EnableDBGStandbyMode
#define HAL_DisableDBGStandbyMode HAL_DBGMCU_DisableDBGStandbyMode
#define HAL_DBG_LowPowerConfig(Periph, cmd) (((cmd\
- )==ENABLE)? HAL_DBGMCU_DBG_EnableLowPowerConfig(Periph) : HAL_DBGMCU_DBG_DisableLowPowerConfig(Periph))
+ )==ENABLE)? HAL_DBGMCU_DBG_EnableLowPowerConfig(Periph) : \
+ HAL_DBGMCU_DBG_DisableLowPowerConfig(Periph))
#define HAL_VREFINT_OutputSelect HAL_SYSCFG_VREFINT_OutputSelect
#define HAL_Lock_Cmd(cmd) (((cmd)==ENABLE) ? HAL_SYSCFG_Enable_Lock_VREFINT() : HAL_SYSCFG_Disable_Lock_VREFINT())
#if defined(STM32L0)
@@ -1499,8 +1772,10 @@ extern "C" {
#endif
#define HAL_ADC_EnableBuffer_Cmd(cmd) (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINT() : HAL_ADCEx_DisableVREFINT())
#define HAL_ADC_EnableBufferSensor_Cmd(cmd) (((cmd\
- )==ENABLE) ? HAL_ADCEx_EnableVREFINTTempSensor() : HAL_ADCEx_DisableVREFINTTempSensor())
-#if defined(STM32H7A3xx) || defined(STM32H7B3xx) || defined(STM32H7B0xx) || defined(STM32H7A3xxQ) || defined(STM32H7B3xxQ) || defined(STM32H7B0xxQ)
+ )==ENABLE) ? HAL_ADCEx_EnableVREFINTTempSensor() : \
+ HAL_ADCEx_DisableVREFINTTempSensor())
+#if defined(STM32H7A3xx) || defined(STM32H7B3xx) || defined(STM32H7B0xx) || defined(STM32H7A3xxQ) || \
+ defined(STM32H7B3xxQ) || defined(STM32H7B0xxQ)
#define HAL_EnableSRDomainDBGStopMode HAL_EnableDomain3DBGStopMode
#define HAL_DisableSRDomainDBGStopMode HAL_DisableDomain3DBGStopMode
#define HAL_EnableSRDomainDBGStandbyMode HAL_EnableDomain3DBGStandbyMode
@@ -1534,16 +1809,21 @@ extern "C" {
#define HAL_FMPI2CEx_AnalogFilter_Config HAL_FMPI2CEx_ConfigAnalogFilter
#define HAL_FMPI2CEx_DigitalFilter_Config HAL_FMPI2CEx_ConfigDigitalFilter
-#define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) (((cmd\
- )==ENABLE)? HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus))
+#define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) ((cmd == ENABLE)? \
+ HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): \
+ HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus))
-#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F0) || defined(STM32F1) || defined(STM32F2) || defined(STM32F3) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32L5) || defined(STM32G4) || defined(STM32L1)
+#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F0) || defined(STM32F1) || \
+ defined(STM32F2) || defined(STM32F3) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || \
+ defined(STM32L4) || defined(STM32L5) || defined(STM32G4) || defined(STM32L1)
#define HAL_I2C_Master_Sequential_Transmit_IT HAL_I2C_Master_Seq_Transmit_IT
#define HAL_I2C_Master_Sequential_Receive_IT HAL_I2C_Master_Seq_Receive_IT
#define HAL_I2C_Slave_Sequential_Transmit_IT HAL_I2C_Slave_Seq_Transmit_IT
#define HAL_I2C_Slave_Sequential_Receive_IT HAL_I2C_Slave_Seq_Receive_IT
-#endif /* STM32H7 || STM32WB || STM32G0 || STM32F0 || STM32F1 || STM32F2 || STM32F3 || STM32F4 || STM32F7 || STM32L0 || STM32L4 || STM32L5 || STM32G4 || STM32L1 */
-#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32L5) || defined(STM32G4)|| defined(STM32L1)
+#endif /* STM32H7 || STM32WB || STM32G0 || STM32F0 || STM32F1 || STM32F2 || STM32F3 || STM32F4 || STM32F7 || STM32L0 ||
+ STM32L4 || STM32L5 || STM32G4 || STM32L1 */
+#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F4) || defined(STM32F7) || \
+ defined(STM32L0) || defined(STM32L4) || defined(STM32L5) || defined(STM32G4)|| defined(STM32L1)
#define HAL_I2C_Master_Sequential_Transmit_DMA HAL_I2C_Master_Seq_Transmit_DMA
#define HAL_I2C_Master_Sequential_Receive_DMA HAL_I2C_Master_Seq_Receive_DMA
#define HAL_I2C_Slave_Sequential_Transmit_DMA HAL_I2C_Slave_Seq_Transmit_DMA
@@ -1617,10 +1897,111 @@ extern "C" {
#define PWR_MODE_EVT PWR_PVD_MODE_NORMAL
+#if defined (STM32U5)
+#define PWR_SRAM1_PAGE1_STOP_RETENTION PWR_SRAM1_PAGE1_STOP
+#define PWR_SRAM1_PAGE2_STOP_RETENTION PWR_SRAM1_PAGE2_STOP
+#define PWR_SRAM1_PAGE3_STOP_RETENTION PWR_SRAM1_PAGE3_STOP
+#define PWR_SRAM1_PAGE4_STOP_RETENTION PWR_SRAM1_PAGE4_STOP
+#define PWR_SRAM1_PAGE5_STOP_RETENTION PWR_SRAM1_PAGE5_STOP
+#define PWR_SRAM1_PAGE6_STOP_RETENTION PWR_SRAM1_PAGE6_STOP
+#define PWR_SRAM1_PAGE7_STOP_RETENTION PWR_SRAM1_PAGE7_STOP
+#define PWR_SRAM1_PAGE8_STOP_RETENTION PWR_SRAM1_PAGE8_STOP
+#define PWR_SRAM1_PAGE9_STOP_RETENTION PWR_SRAM1_PAGE9_STOP
+#define PWR_SRAM1_PAGE10_STOP_RETENTION PWR_SRAM1_PAGE10_STOP
+#define PWR_SRAM1_PAGE11_STOP_RETENTION PWR_SRAM1_PAGE11_STOP
+#define PWR_SRAM1_PAGE12_STOP_RETENTION PWR_SRAM1_PAGE12_STOP
+#define PWR_SRAM1_FULL_STOP_RETENTION PWR_SRAM1_FULL_STOP
+
+#define PWR_SRAM2_PAGE1_STOP_RETENTION PWR_SRAM2_PAGE1_STOP
+#define PWR_SRAM2_PAGE2_STOP_RETENTION PWR_SRAM2_PAGE2_STOP
+#define PWR_SRAM2_FULL_STOP_RETENTION PWR_SRAM2_FULL_STOP
+
+#define PWR_SRAM3_PAGE1_STOP_RETENTION PWR_SRAM3_PAGE1_STOP
+#define PWR_SRAM3_PAGE2_STOP_RETENTION PWR_SRAM3_PAGE2_STOP
+#define PWR_SRAM3_PAGE3_STOP_RETENTION PWR_SRAM3_PAGE3_STOP
+#define PWR_SRAM3_PAGE4_STOP_RETENTION PWR_SRAM3_PAGE4_STOP
+#define PWR_SRAM3_PAGE5_STOP_RETENTION PWR_SRAM3_PAGE5_STOP
+#define PWR_SRAM3_PAGE6_STOP_RETENTION PWR_SRAM3_PAGE6_STOP
+#define PWR_SRAM3_PAGE7_STOP_RETENTION PWR_SRAM3_PAGE7_STOP
+#define PWR_SRAM3_PAGE8_STOP_RETENTION PWR_SRAM3_PAGE8_STOP
+#define PWR_SRAM3_PAGE9_STOP_RETENTION PWR_SRAM3_PAGE9_STOP
+#define PWR_SRAM3_PAGE10_STOP_RETENTION PWR_SRAM3_PAGE10_STOP
+#define PWR_SRAM3_PAGE11_STOP_RETENTION PWR_SRAM3_PAGE11_STOP
+#define PWR_SRAM3_PAGE12_STOP_RETENTION PWR_SRAM3_PAGE12_STOP
+#define PWR_SRAM3_PAGE13_STOP_RETENTION PWR_SRAM3_PAGE13_STOP
+#define PWR_SRAM3_FULL_STOP_RETENTION PWR_SRAM3_FULL_STOP
+
+#define PWR_SRAM4_FULL_STOP_RETENTION PWR_SRAM4_FULL_STOP
+
+#define PWR_SRAM5_PAGE1_STOP_RETENTION PWR_SRAM5_PAGE1_STOP
+#define PWR_SRAM5_PAGE2_STOP_RETENTION PWR_SRAM5_PAGE2_STOP
+#define PWR_SRAM5_PAGE3_STOP_RETENTION PWR_SRAM5_PAGE3_STOP
+#define PWR_SRAM5_PAGE4_STOP_RETENTION PWR_SRAM5_PAGE4_STOP
+#define PWR_SRAM5_PAGE5_STOP_RETENTION PWR_SRAM5_PAGE5_STOP
+#define PWR_SRAM5_PAGE6_STOP_RETENTION PWR_SRAM5_PAGE6_STOP
+#define PWR_SRAM5_PAGE7_STOP_RETENTION PWR_SRAM5_PAGE7_STOP
+#define PWR_SRAM5_PAGE8_STOP_RETENTION PWR_SRAM5_PAGE8_STOP
+#define PWR_SRAM5_PAGE9_STOP_RETENTION PWR_SRAM5_PAGE9_STOP
+#define PWR_SRAM5_PAGE10_STOP_RETENTION PWR_SRAM5_PAGE10_STOP
+#define PWR_SRAM5_PAGE11_STOP_RETENTION PWR_SRAM5_PAGE11_STOP
+#define PWR_SRAM5_PAGE12_STOP_RETENTION PWR_SRAM5_PAGE12_STOP
+#define PWR_SRAM5_PAGE13_STOP_RETENTION PWR_SRAM5_PAGE13_STOP
+#define PWR_SRAM5_FULL_STOP_RETENTION PWR_SRAM5_FULL_STOP
+
+#define PWR_SRAM6_PAGE1_STOP_RETENTION PWR_SRAM6_PAGE1_STOP
+#define PWR_SRAM6_PAGE2_STOP_RETENTION PWR_SRAM6_PAGE2_STOP
+#define PWR_SRAM6_PAGE3_STOP_RETENTION PWR_SRAM6_PAGE3_STOP
+#define PWR_SRAM6_PAGE4_STOP_RETENTION PWR_SRAM6_PAGE4_STOP
+#define PWR_SRAM6_PAGE5_STOP_RETENTION PWR_SRAM6_PAGE5_STOP
+#define PWR_SRAM6_PAGE6_STOP_RETENTION PWR_SRAM6_PAGE6_STOP
+#define PWR_SRAM6_PAGE7_STOP_RETENTION PWR_SRAM6_PAGE7_STOP
+#define PWR_SRAM6_PAGE8_STOP_RETENTION PWR_SRAM6_PAGE8_STOP
+#define PWR_SRAM6_FULL_STOP_RETENTION PWR_SRAM6_FULL_STOP
+
+
+#define PWR_ICACHE_FULL_STOP_RETENTION PWR_ICACHE_FULL_STOP
+#define PWR_DCACHE1_FULL_STOP_RETENTION PWR_DCACHE1_FULL_STOP
+#define PWR_DCACHE2_FULL_STOP_RETENTION PWR_DCACHE2_FULL_STOP
+#define PWR_DMA2DRAM_FULL_STOP_RETENTION PWR_DMA2DRAM_FULL_STOP
+#define PWR_PERIPHRAM_FULL_STOP_RETENTION PWR_PERIPHRAM_FULL_STOP
+#define PWR_PKA32RAM_FULL_STOP_RETENTION PWR_PKA32RAM_FULL_STOP
+#define PWR_GRAPHICPRAM_FULL_STOP_RETENTION PWR_GRAPHICPRAM_FULL_STOP
+#define PWR_DSIRAM_FULL_STOP_RETENTION PWR_DSIRAM_FULL_STOP
+#define PWR_JPEGRAM_FULL_STOP_RETENTION PWR_JPEGRAM_FULL_STOP
+
+
+#define PWR_SRAM2_PAGE1_STANDBY_RETENTION PWR_SRAM2_PAGE1_STANDBY
+#define PWR_SRAM2_PAGE2_STANDBY_RETENTION PWR_SRAM2_PAGE2_STANDBY
+#define PWR_SRAM2_FULL_STANDBY_RETENTION PWR_SRAM2_FULL_STANDBY
+
+#define PWR_SRAM1_FULL_RUN_RETENTION PWR_SRAM1_FULL_RUN
+#define PWR_SRAM2_FULL_RUN_RETENTION PWR_SRAM2_FULL_RUN
+#define PWR_SRAM3_FULL_RUN_RETENTION PWR_SRAM3_FULL_RUN
+#define PWR_SRAM4_FULL_RUN_RETENTION PWR_SRAM4_FULL_RUN
+#define PWR_SRAM5_FULL_RUN_RETENTION PWR_SRAM5_FULL_RUN
+#define PWR_SRAM6_FULL_RUN_RETENTION PWR_SRAM6_FULL_RUN
+
+#define PWR_ALL_RAM_RUN_RETENTION_MASK PWR_ALL_RAM_RUN_MASK
+#endif
+
/**
* @}
*/
+/** @defgroup HAL_RTC_Aliased_Functions HAL RTC Aliased Functions maintained for legacy purpose
+ * @{
+ */
+#if defined(STM32H5) || defined(STM32WBA)
+#define HAL_RTCEx_SetBoothardwareKey HAL_RTCEx_LockBootHardwareKey
+#define HAL_RTCEx_BKUPBlock_Enable HAL_RTCEx_BKUPBlock
+#define HAL_RTCEx_BKUPBlock_Disable HAL_RTCEx_BKUPUnblock
+#define HAL_RTCEx_Erase_SecretDev_Conf HAL_RTCEx_ConfigEraseDeviceSecrets
+#endif /* STM32H5 || STM32WBA */
+
+/**
+ * @}
+ */
+
/** @defgroup HAL_SMBUS_Aliased_Functions HAL SMBUS Aliased Functions maintained for legacy purpose
* @{
*/
@@ -1646,7 +2027,8 @@ extern "C" {
#define HAL_TIM_DMAError TIM_DMAError
#define HAL_TIM_DMACaptureCplt TIM_DMACaptureCplt
#define HAL_TIMEx_DMACommutationCplt TIMEx_DMACommutationCplt
-#if defined(STM32H7) || defined(STM32G0) || defined(STM32F0) || defined(STM32F1) || defined(STM32F2) || defined(STM32F3) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4)
+#if defined(STM32H7) || defined(STM32G0) || defined(STM32F0) || defined(STM32F1) || defined(STM32F2) || \
+ defined(STM32F3) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4)
#define HAL_TIM_SlaveConfigSynchronization HAL_TIM_SlaveConfigSynchro
#define HAL_TIM_SlaveConfigSynchronization_IT HAL_TIM_SlaveConfigSynchro_IT
#define HAL_TIMEx_CommutationCallback HAL_TIMEx_CommutCallback
@@ -1903,7 +2285,8 @@ extern "C" {
#define COMP_STOP __HAL_COMP_DISABLE
#define COMP_LOCK __HAL_COMP_LOCK
-#if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx)
+#if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || defined(STM32F303x8) || \
+ defined(STM32F334x8) || defined(STM32F328xx)
#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \
((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \
__HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE())
@@ -2075,8 +2458,10 @@ extern "C" {
/** @defgroup HAL_COMP_Aliased_Functions HAL COMP Aliased Functions maintained for legacy purpose
* @{
*/
-#define HAL_COMP_Start_IT HAL_COMP_Start /* Function considered as legacy as EXTI event or IT configuration is done into HAL_COMP_Init() */
-#define HAL_COMP_Stop_IT HAL_COMP_Stop /* Function considered as legacy as EXTI event or IT configuration is done into HAL_COMP_Init() */
+#define HAL_COMP_Start_IT HAL_COMP_Start /* Function considered as legacy as EXTI event or IT configuration is
+ done into HAL_COMP_Init() */
+#define HAL_COMP_Stop_IT HAL_COMP_Stop /* Function considered as legacy as EXTI event or IT configuration is
+ done into HAL_COMP_Init() */
/**
* @}
*/
@@ -2235,7 +2620,9 @@ extern "C" {
#define __HAL_PWR_INTERNALWAKEUP_ENABLE HAL_PWREx_EnableInternalWakeUpLine
#define __HAL_PWR_PULL_UP_DOWN_CONFIG_DISABLE HAL_PWREx_DisablePullUpPullDownConfig
#define __HAL_PWR_PULL_UP_DOWN_CONFIG_ENABLE HAL_PWREx_EnablePullUpPullDownConfig
-#define __HAL_PWR_PVD_EXTI_CLEAR_EGDE_TRIGGER() do { __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); } while(0)
+#define __HAL_PWR_PVD_EXTI_CLEAR_EGDE_TRIGGER() do { __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE(); \
+ __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); \
+ } while(0)
#define __HAL_PWR_PVD_EXTI_EVENT_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_EVENT
#define __HAL_PWR_PVD_EXTI_EVENT_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_EVENT
#define __HAL_PWR_PVD_EXTI_FALLINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE
@@ -2244,8 +2631,12 @@ extern "C" {
#define __HAL_PWR_PVD_EXTI_RISINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
#define __HAL_PWR_PVD_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE
#define __HAL_PWR_PVD_EXTI_SET_RISING_EDGE_TRIGGER __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
-#define __HAL_PWR_PVM_DISABLE() do { HAL_PWREx_DisablePVM1();HAL_PWREx_DisablePVM2();HAL_PWREx_DisablePVM3();HAL_PWREx_DisablePVM4(); } while(0)
-#define __HAL_PWR_PVM_ENABLE() do { HAL_PWREx_EnablePVM1();HAL_PWREx_EnablePVM2();HAL_PWREx_EnablePVM3();HAL_PWREx_EnablePVM4(); } while(0)
+#define __HAL_PWR_PVM_DISABLE() do { HAL_PWREx_DisablePVM1();HAL_PWREx_DisablePVM2(); \
+ HAL_PWREx_DisablePVM3();HAL_PWREx_DisablePVM4(); \
+ } while(0)
+#define __HAL_PWR_PVM_ENABLE() do { HAL_PWREx_EnablePVM1();HAL_PWREx_EnablePVM2(); \
+ HAL_PWREx_EnablePVM3();HAL_PWREx_EnablePVM4(); \
+ } while(0)
#define __HAL_PWR_SRAM2CONTENT_PRESERVE_DISABLE HAL_PWREx_DisableSRAM2ContentRetention
#define __HAL_PWR_SRAM2CONTENT_PRESERVE_ENABLE HAL_PWREx_EnableSRAM2ContentRetention
#define __HAL_PWR_VDDIO2_DISABLE HAL_PWREx_DisableVddIO2
@@ -2281,8 +2672,8 @@ extern "C" {
#define RCC_StopWakeUpClock_HSI RCC_STOP_WAKEUPCLOCK_HSI
#define HAL_RCC_CCSCallback HAL_RCC_CSSCallback
-#define HAL_RC48_EnableBuffer_Cmd(cmd) (((cmd\
- )==ENABLE) ? HAL_RCCEx_EnableHSI48_VREFINT() : HAL_RCCEx_DisableHSI48_VREFINT())
+#define HAL_RC48_EnableBuffer_Cmd(cmd) (((cmd)==ENABLE) ? \
+ HAL_RCCEx_EnableHSI48_VREFINT() : HAL_RCCEx_DisableHSI48_VREFINT())
#define __ADC_CLK_DISABLE __HAL_RCC_ADC_CLK_DISABLE
#define __ADC_CLK_ENABLE __HAL_RCC_ADC_CLK_ENABLE
@@ -2786,6 +3177,11 @@ extern "C" {
#define __HAL_RCC_WWDG_IS_CLK_ENABLED __HAL_RCC_WWDG1_IS_CLK_ENABLED
#define __HAL_RCC_WWDG_IS_CLK_DISABLED __HAL_RCC_WWDG1_IS_CLK_DISABLED
+#define RCC_SPI4CLKSOURCE_D2PCLK1 RCC_SPI4CLKSOURCE_D2PCLK2
+#define RCC_SPI5CLKSOURCE_D2PCLK1 RCC_SPI5CLKSOURCE_D2PCLK2
+#define RCC_SPI45CLKSOURCE_D2PCLK1 RCC_SPI45CLKSOURCE_D2PCLK2
+#define RCC_SPI45CLKSOURCE_CDPCLK1 RCC_SPI45CLKSOURCE_CDPCLK2
+#define RCC_SPI45CLKSOURCE_PCLK1 RCC_SPI45CLKSOURCE_PCLK2
#endif
#define __WWDG_CLK_DISABLE __HAL_RCC_WWDG_CLK_DISABLE
@@ -3250,7 +3646,8 @@ extern "C" {
#define RCC_MCOSOURCE_PLLCLK_NODIV RCC_MCO1SOURCE_PLLCLK
#define RCC_MCOSOURCE_PLLCLK_DIV2 RCC_MCO1SOURCE_PLLCLK_DIV2
-#if defined(STM32L4) || defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5) || defined(STM32WL)
+#if defined(STM32L4) || defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5) || \
+ defined(STM32WL) || defined(STM32C0)
#define RCC_RTCCLKSOURCE_NO_CLK RCC_RTCCLKSOURCE_NONE
#else
#define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK
@@ -3362,6 +3759,124 @@ extern "C" {
#define RCC_DFSDM1CLKSOURCE_APB2 RCC_DFSDM1CLKSOURCE_PCLK2
#define RCC_DFSDM2CLKSOURCE_APB2 RCC_DFSDM2CLKSOURCE_PCLK2
#define RCC_FMPI2C1CLKSOURCE_APB RCC_FMPI2C1CLKSOURCE_PCLK1
+#if defined(STM32U5)
+#define MSIKPLLModeSEL RCC_MSIKPLL_MODE_SEL
+#define MSISPLLModeSEL RCC_MSISPLL_MODE_SEL
+#define __HAL_RCC_AHB21_CLK_DISABLE __HAL_RCC_AHB2_1_CLK_DISABLE
+#define __HAL_RCC_AHB22_CLK_DISABLE __HAL_RCC_AHB2_2_CLK_DISABLE
+#define __HAL_RCC_AHB1_CLK_Disable_Clear __HAL_RCC_AHB1_CLK_ENABLE
+#define __HAL_RCC_AHB21_CLK_Disable_Clear __HAL_RCC_AHB2_1_CLK_ENABLE
+#define __HAL_RCC_AHB22_CLK_Disable_Clear __HAL_RCC_AHB2_2_CLK_ENABLE
+#define __HAL_RCC_AHB3_CLK_Disable_Clear __HAL_RCC_AHB3_CLK_ENABLE
+#define __HAL_RCC_APB1_CLK_Disable_Clear __HAL_RCC_APB1_CLK_ENABLE
+#define __HAL_RCC_APB2_CLK_Disable_Clear __HAL_RCC_APB2_CLK_ENABLE
+#define __HAL_RCC_APB3_CLK_Disable_Clear __HAL_RCC_APB3_CLK_ENABLE
+#define IS_RCC_MSIPLLModeSelection IS_RCC_MSIPLLMODE_SELECT
+#define RCC_PERIPHCLK_CLK48 RCC_PERIPHCLK_ICLK
+#define RCC_CLK48CLKSOURCE_HSI48 RCC_ICLK_CLKSOURCE_HSI48
+#define RCC_CLK48CLKSOURCE_PLL2 RCC_ICLK_CLKSOURCE_PLL2
+#define RCC_CLK48CLKSOURCE_PLL1 RCC_ICLK_CLKSOURCE_PLL1
+#define RCC_CLK48CLKSOURCE_MSIK RCC_ICLK_CLKSOURCE_MSIK
+#define __HAL_RCC_ADC1_CLK_ENABLE __HAL_RCC_ADC12_CLK_ENABLE
+#define __HAL_RCC_ADC1_CLK_DISABLE __HAL_RCC_ADC12_CLK_DISABLE
+#define __HAL_RCC_ADC1_IS_CLK_ENABLED __HAL_RCC_ADC12_IS_CLK_ENABLED
+#define __HAL_RCC_ADC1_IS_CLK_DISABLED __HAL_RCC_ADC12_IS_CLK_DISABLED
+#define __HAL_RCC_ADC1_FORCE_RESET __HAL_RCC_ADC12_FORCE_RESET
+#define __HAL_RCC_ADC1_RELEASE_RESET __HAL_RCC_ADC12_RELEASE_RESET
+#define __HAL_RCC_ADC1_CLK_SLEEP_ENABLE __HAL_RCC_ADC12_CLK_SLEEP_ENABLE
+#define __HAL_RCC_ADC1_CLK_SLEEP_DISABLE __HAL_RCC_ADC12_CLK_SLEEP_DISABLE
+#define __HAL_RCC_GET_CLK48_SOURCE __HAL_RCC_GET_ICLK_SOURCE
+#define __HAL_RCC_PLLFRACN_ENABLE __HAL_RCC_PLL_FRACN_ENABLE
+#define __HAL_RCC_PLLFRACN_DISABLE __HAL_RCC_PLL_FRACN_DISABLE
+#define __HAL_RCC_PLLFRACN_CONFIG __HAL_RCC_PLL_FRACN_CONFIG
+#define IS_RCC_PLLFRACN_VALUE IS_RCC_PLL_FRACN_VALUE
+#endif /* STM32U5 */
+
+#if defined(STM32H5)
+#define __HAL_RCC_PLLFRACN_ENABLE __HAL_RCC_PLL_FRACN_ENABLE
+#define __HAL_RCC_PLLFRACN_DISABLE __HAL_RCC_PLL_FRACN_DISABLE
+#define __HAL_RCC_PLLFRACN_CONFIG __HAL_RCC_PLL_FRACN_CONFIG
+#define IS_RCC_PLLFRACN_VALUE IS_RCC_PLL_FRACN_VALUE
+
+#define RCC_PLLSOURCE_NONE RCC_PLL1_SOURCE_NONE
+#define RCC_PLLSOURCE_HSI RCC_PLL1_SOURCE_HSI
+#define RCC_PLLSOURCE_CSI RCC_PLL1_SOURCE_CSI
+#define RCC_PLLSOURCE_HSE RCC_PLL1_SOURCE_HSE
+#define RCC_PLLVCIRANGE_0 RCC_PLL1_VCIRANGE_0
+#define RCC_PLLVCIRANGE_1 RCC_PLL1_VCIRANGE_1
+#define RCC_PLLVCIRANGE_2 RCC_PLL1_VCIRANGE_2
+#define RCC_PLLVCIRANGE_3 RCC_PLL1_VCIRANGE_3
+#define RCC_PLL1VCOWIDE RCC_PLL1_VCORANGE_WIDE
+#define RCC_PLL1VCOMEDIUM RCC_PLL1_VCORANGE_MEDIUM
+
+#define IS_RCC_PLLSOURCE IS_RCC_PLL1_SOURCE
+#define IS_RCC_PLLRGE_VALUE IS_RCC_PLL1_VCIRGE_VALUE
+#define IS_RCC_PLLVCORGE_VALUE IS_RCC_PLL1_VCORGE_VALUE
+#define IS_RCC_PLLCLOCKOUT_VALUE IS_RCC_PLL1_CLOCKOUT_VALUE
+#define IS_RCC_PLL_FRACN_VALUE IS_RCC_PLL1_FRACN_VALUE
+#define IS_RCC_PLLM_VALUE IS_RCC_PLL1_DIVM_VALUE
+#define IS_RCC_PLLN_VALUE IS_RCC_PLL1_MULN_VALUE
+#define IS_RCC_PLLP_VALUE IS_RCC_PLL1_DIVP_VALUE
+#define IS_RCC_PLLQ_VALUE IS_RCC_PLL1_DIVQ_VALUE
+#define IS_RCC_PLLR_VALUE IS_RCC_PLL1_DIVR_VALUE
+
+#define __HAL_RCC_PLL_ENABLE __HAL_RCC_PLL1_ENABLE
+#define __HAL_RCC_PLL_DISABLE __HAL_RCC_PLL1_DISABLE
+#define __HAL_RCC_PLL_FRACN_ENABLE __HAL_RCC_PLL1_FRACN_ENABLE
+#define __HAL_RCC_PLL_FRACN_DISABLE __HAL_RCC_PLL1_FRACN_DISABLE
+#define __HAL_RCC_PLL_CONFIG __HAL_RCC_PLL1_CONFIG
+#define __HAL_RCC_PLL_PLLSOURCE_CONFIG __HAL_RCC_PLL1_PLLSOURCE_CONFIG
+#define __HAL_RCC_PLL_DIVM_CONFIG __HAL_RCC_PLL1_DIVM_CONFIG
+#define __HAL_RCC_PLL_FRACN_CONFIG __HAL_RCC_PLL1_FRACN_CONFIG
+#define __HAL_RCC_PLL_VCIRANGE __HAL_RCC_PLL1_VCIRANGE
+#define __HAL_RCC_PLL_VCORANGE __HAL_RCC_PLL1_VCORANGE
+#define __HAL_RCC_GET_PLL_OSCSOURCE __HAL_RCC_GET_PLL1_OSCSOURCE
+#define __HAL_RCC_PLLCLKOUT_ENABLE __HAL_RCC_PLL1_CLKOUT_ENABLE
+#define __HAL_RCC_PLLCLKOUT_DISABLE __HAL_RCC_PLL1_CLKOUT_DISABLE
+#define __HAL_RCC_GET_PLLCLKOUT_CONFIG __HAL_RCC_GET_PLL1_CLKOUT_CONFIG
+
+#define __HAL_RCC_PLL2FRACN_ENABLE __HAL_RCC_PLL2_FRACN_ENABLE
+#define __HAL_RCC_PLL2FRACN_DISABLE __HAL_RCC_PLL2_FRACN_DISABLE
+#define __HAL_RCC_PLL2CLKOUT_ENABLE __HAL_RCC_PLL2_CLKOUT_ENABLE
+#define __HAL_RCC_PLL2CLKOUT_DISABLE __HAL_RCC_PLL2_CLKOUT_DISABLE
+#define __HAL_RCC_PLL2FRACN_CONFIG __HAL_RCC_PLL2_FRACN_CONFIG
+#define __HAL_RCC_GET_PLL2CLKOUT_CONFIG __HAL_RCC_GET_PLL2_CLKOUT_CONFIG
+
+#define __HAL_RCC_PLL3FRACN_ENABLE __HAL_RCC_PLL3_FRACN_ENABLE
+#define __HAL_RCC_PLL3FRACN_DISABLE __HAL_RCC_PLL3_FRACN_DISABLE
+#define __HAL_RCC_PLL3CLKOUT_ENABLE __HAL_RCC_PLL3_CLKOUT_ENABLE
+#define __HAL_RCC_PLL3CLKOUT_DISABLE __HAL_RCC_PLL3_CLKOUT_DISABLE
+#define __HAL_RCC_PLL3FRACN_CONFIG __HAL_RCC_PLL3_FRACN_CONFIG
+#define __HAL_RCC_GET_PLL3CLKOUT_CONFIG __HAL_RCC_GET_PLL3_CLKOUT_CONFIG
+
+#define RCC_PLL2VCIRANGE_0 RCC_PLL2_VCIRANGE_0
+#define RCC_PLL2VCIRANGE_1 RCC_PLL2_VCIRANGE_1
+#define RCC_PLL2VCIRANGE_2 RCC_PLL2_VCIRANGE_2
+#define RCC_PLL2VCIRANGE_3 RCC_PLL2_VCIRANGE_3
+
+#define RCC_PLL2VCOWIDE RCC_PLL2_VCORANGE_WIDE
+#define RCC_PLL2VCOMEDIUM RCC_PLL2_VCORANGE_MEDIUM
+
+#define RCC_PLL2SOURCE_NONE RCC_PLL2_SOURCE_NONE
+#define RCC_PLL2SOURCE_HSI RCC_PLL2_SOURCE_HSI
+#define RCC_PLL2SOURCE_CSI RCC_PLL2_SOURCE_CSI
+#define RCC_PLL2SOURCE_HSE RCC_PLL2_SOURCE_HSE
+
+#define RCC_PLL3VCIRANGE_0 RCC_PLL3_VCIRANGE_0
+#define RCC_PLL3VCIRANGE_1 RCC_PLL3_VCIRANGE_1
+#define RCC_PLL3VCIRANGE_2 RCC_PLL3_VCIRANGE_2
+#define RCC_PLL3VCIRANGE_3 RCC_PLL3_VCIRANGE_3
+
+#define RCC_PLL3VCOWIDE RCC_PLL3_VCORANGE_WIDE
+#define RCC_PLL3VCOMEDIUM RCC_PLL3_VCORANGE_MEDIUM
+
+#define RCC_PLL3SOURCE_NONE RCC_PLL3_SOURCE_NONE
+#define RCC_PLL3SOURCE_HSI RCC_PLL3_SOURCE_HSI
+#define RCC_PLL3SOURCE_CSI RCC_PLL3_SOURCE_CSI
+#define RCC_PLL3SOURCE_HSE RCC_PLL3_SOURCE_HSE
+
+
+#endif /* STM32H5 */
/**
* @}
@@ -3379,7 +3894,9 @@ extern "C" {
/** @defgroup HAL_RTC_Aliased_Macros HAL RTC Aliased Macros maintained for legacy purpose
* @{
*/
-#if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL)
+#if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || \
+ defined (STM32L4P5xx)|| defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL) || defined (STM32U5) || \
+ defined (STM32WBA) || defined (STM32H5) || defined (STM32C0)
#else
#define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG
#endif
@@ -3414,6 +3931,11 @@ extern "C" {
__HAL_RTC_TAMPER_TIMESTAMP_EXTI_GENERATE_SWIT()))
#endif /* STM32F1 */
+#if defined (STM32F0) || defined (STM32F2) || defined (STM32F3) || defined (STM32F4) || defined (STM32F7) || \
+ defined (STM32L0) || defined (STM32L1)
+#define __HAL_RTC_TAMPER_GET_IT __HAL_RTC_TAMPER_GET_FLAG
+#endif
+
#define IS_ALARM IS_RTC_ALARM
#define IS_ALARM_MASK IS_RTC_ALARM_MASK
#define IS_TAMPER IS_RTC_TAMPER
@@ -3432,6 +3954,11 @@ extern "C" {
#define __RTC_WRITEPROTECTION_ENABLE __HAL_RTC_WRITEPROTECTION_ENABLE
#define __RTC_WRITEPROTECTION_DISABLE __HAL_RTC_WRITEPROTECTION_DISABLE
+#if defined (STM32H5)
+#define __HAL_RCC_RTCAPB_CLK_ENABLE __HAL_RCC_RTC_CLK_ENABLE
+#define __HAL_RCC_RTCAPB_CLK_DISABLE __HAL_RCC_RTC_CLK_DISABLE
+#endif /* STM32H5 */
+
/**
* @}
*/
@@ -3443,10 +3970,15 @@ extern "C" {
#define SD_OCR_CID_CSD_OVERWRIETE SD_OCR_CID_CSD_OVERWRITE
#define SD_CMD_SD_APP_STAUS SD_CMD_SD_APP_STATUS
+#if !defined(STM32F1) && !defined(STM32F2) && !defined(STM32F4) && !defined(STM32L1)
#define eMMC_HIGH_VOLTAGE_RANGE EMMC_HIGH_VOLTAGE_RANGE
#define eMMC_DUAL_VOLTAGE_RANGE EMMC_DUAL_VOLTAGE_RANGE
#define eMMC_LOW_VOLTAGE_RANGE EMMC_LOW_VOLTAGE_RANGE
+#define SDMMC_NSpeed_CLK_DIV SDMMC_NSPEED_CLK_DIV
+#define SDMMC_HSpeed_CLK_DIV SDMMC_HSPEED_CLK_DIV
+#endif
+
#if defined(STM32F4) || defined(STM32F2)
#define SD_SDMMC_DISABLED SD_SDIO_DISABLED
#define SD_SDMMC_FUNCTION_BUSY SD_SDIO_FUNCTION_BUSY
@@ -3775,6 +4307,16 @@ extern "C" {
* @}
*/
+/** @defgroup HAL_Generic_Aliased_Macros HAL Generic Aliased Macros maintained for legacy purpose
+ * @{
+ */
+#if defined (STM32F7)
+#define ART_ACCLERATOR_ENABLE ART_ACCELERATOR_ENABLE
+#endif /* STM32F7 */
+/**
+ * @}
+ */
+
/** @defgroup HAL_PPP_Aliased_Macros HAL PPP Aliased Macros maintained for legacy purpose
* @{
*/
@@ -3789,5 +4331,4 @@ extern "C" {
#endif /* STM32_HAL_LEGACY */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32_assert_template.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32_assert_template.h
index 4711b65d8f..8cbab0136f 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32_assert_template.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32_assert_template.h
@@ -8,13 +8,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -54,4 +53,3 @@
#endif /* __STM32_ASSERT_H */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h
index e3d4967d05..d74f91d779 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h
@@ -7,13 +7,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -739,7 +738,7 @@
/**
* @brief Close or open the internal switch COMP1_SW1.
* This switch connects I/O pin PC3 (can be used as ADC channel 13)
- * and OPAMP3 ouput to ADC switch matrix (ADC channel VCOMP, channel
+ * and OPAMP3 output to ADC switch matrix (ADC channel VCOMP, channel
* 26) and COMP1 non-inverting input.
* Pin PC3 connection depends on another switch setting, refer to
* macro "__HAL_ADC_CHANNEL_SPEED_FAST()".
@@ -759,7 +758,7 @@
*/
/**
- * @brief Enable or disable Hysteresis of the input schmitt triger of Ports A
+ * @brief Enable or disable Hysteresis of the input schmitt trigger of Ports A
* When the I/Os are programmed in input mode by standard I/O port
* registers, the Schmitt trigger and the hysteresis are enabled by default.
* When hysteresis is disabled, it is possible to read the
@@ -777,7 +776,7 @@
} while(0)
/**
- * @brief Enable or disable Hysteresis of the input schmitt triger of Ports B
+ * @brief Enable or disable Hysteresis of the input schmitt trigger of Ports B
* When the I/Os are programmed in input mode by standard I/O port
* registers, the Schmitt trigger and the hysteresis are enabled by default.
* When hysteresis is disabled, it is possible to read the
@@ -795,7 +794,7 @@
} while(0)
/**
- * @brief Enable or disable Hysteresis of the input schmitt triger of Ports C
+ * @brief Enable or disable Hysteresis of the input schmitt trigger of Ports C
* When the I/Os are programmed in input mode by standard I/O port
* registers, the Schmitt trigger and the hysteresis are enabled by default.
* When hysteresis is disabled, it is possible to read the
@@ -813,7 +812,7 @@
} while(0)
/**
- * @brief Enable or disable Hysteresis of the input schmitt triger of Ports D
+ * @brief Enable or disable Hysteresis of the input schmitt trigger of Ports D
* When the I/Os are programmed in input mode by standard I/O port
* registers, the Schmitt trigger and the hysteresis are enabled by default.
* When hysteresis is disabled, it is possible to read the
@@ -833,7 +832,7 @@
#if defined (GPIOE_BASE)
/**
- * @brief Enable or disable Hysteresis of the input schmitt triger of Ports E
+ * @brief Enable or disable Hysteresis of the input schmitt trigger of Ports E
* When the I/Os are programmed in input mode by standard I/O port
* registers, the Schmitt trigger and the hysteresis are enabled by default.
* When hysteresis is disabled, it is possible to read the
@@ -855,7 +854,7 @@
#if defined(GPIOF_BASE) || defined(GPIOG_BASE)
/**
- * @brief Enable or disable Hysteresis of the input schmitt triger of Ports F
+ * @brief Enable or disable Hysteresis of the input schmitt trigger of Ports F
* When the I/Os are programmed in input mode by standard I/O port
* registers, the Schmitt trigger and the hysteresis are enabled by default.
* When hysteresis is disabled, it is possible to read the
@@ -873,7 +872,7 @@
} while(0)
/**
- * @brief Enable or disable Hysteresis of the input schmitt triger of Ports G
+ * @brief Enable or disable Hysteresis of the input schmitt trigger of Ports G
* When the I/Os are programmed in input mode by standard I/O port
* registers, the Schmitt trigger and the hysteresis are enabled by default.
* When hysteresis is disabled, it is possible to read the
@@ -993,4 +992,3 @@ void HAL_DBGMCU_DisableDBGStandbyMode(void);
#endif /* __STM32L1xx_HAL_H */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_adc.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_adc.h
index 982fab758d..80a682842e 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_adc.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_adc.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -52,7 +51,7 @@
* - For all parameters except 'Resolution', 'ScanConvMode', 'LowPowerAutoWait', 'LowPowerAutoPowerOff', 'DiscontinuousConvMode', 'NbrOfDiscConversion' : ADC enabled without conversion on going on regular group.
* - For parameters 'ExternalTrigConv' and 'ExternalTrigConvEdge': ADC enabled, even with conversion on going.
* If ADC is not in the appropriate state to modify some parameters, these parameters setting is bypassed
- * without error reporting (as it can be the expected behaviour in case of intended action to update another parameter (which fullfills the ADC state condition) on the fly).
+ * without error reporting (as it can be the expected behaviour in case of intended action to update another parameter (which fulfills the ADC state condition) on the fly).
*/
typedef struct
{
@@ -1364,5 +1363,3 @@ HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc);
#endif /* __STM32L1xx_HAL_ADC_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_adc_ex.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_adc_ex.h
index 557027e00b..0939310a7f 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_adc_ex.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_adc_ex.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -567,6 +566,3 @@ HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc,
#endif
#endif /* __STM32L1xx_HAL_ADC_EX_H */
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_comp.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_comp.h
index f6a13c05e0..26c94b0267 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_comp.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_comp.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -211,7 +210,7 @@ typedef void (*pCOMP_CallbackTypeDef)(COMP_HandleTypeDef *hcomp); /*!< pointer
/** @defgroup COMP_WindowMode COMP WindowMode
* @{
*/
-#define COMP_WINDOWMODE_DISABLE (0x00000000U) /*!< Window mode disabled: COMP1 non-inverting input is independant */
+#define COMP_WINDOWMODE_DISABLE (0x00000000U) /*!< Window mode disabled: COMP1 non-inverting input is independent */
#define COMP_WINDOWMODE_ENABLE COMP_CSR_WNDWE /*!< Window mode enabled: COMP1 non-inverting input is no more accessible, even from ADC channel VCOMP) (connected to COMP2 non-inverting input) */
#define IS_COMP_WINDOWMODE(WINDOWMODE) (((WINDOWMODE) == COMP_WINDOWMODE_DISABLE) || \
@@ -655,4 +654,3 @@ uint32_t HAL_COMP_GetError(COMP_HandleTypeDef *hcomp);
#endif /* __STM32L1xx_HAL_COMP_H */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_comp_ex.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_comp_ex.h
index dedddd9ab1..375b51faca 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_comp_ex.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_comp_ex.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -315,4 +314,3 @@
#endif /* __STM32L1xx_HAL_COMP_EX_H */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_conf_template.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_conf_template.h
index 95a1631d5e..5b89725242 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_conf_template.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_conf_template.h
@@ -8,13 +8,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -58,6 +57,7 @@
#define HAL_RTC_MODULE_ENABLED
#define HAL_SD_MODULE_ENABLED
#define HAL_SMARTCARD_MODULE_ENABLED
+#define HAL_SMBUS_MODULE_ENABLED
#define HAL_SPI_MODULE_ENABLED
#define HAL_SRAM_MODULE_ENABLED
#define HAL_TIM_MODULE_ENABLED
@@ -265,6 +265,10 @@
#include "stm32l1xx_hal_sd.h"
#endif /* HAL_SD_MODULE_ENABLED */
+#ifdef HAL_SMBUS_MODULE_ENABLED
+ #include "stm32l1xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
#ifdef HAL_SPI_MODULE_ENABLED
#include "stm32l1xx_hal_spi.h"
#endif /* HAL_SPI_MODULE_ENABLED */
@@ -321,4 +325,3 @@
#endif /* __STM32L1xx_HAL_CONF_H */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h
index cc57801743..1289126cbc 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file in
+ * the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -434,4 +433,3 @@ void HAL_SYSTICK_Callback(void);
#endif /* __STM32L1xx_HAL_CORTEX_H */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_crc.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_crc.h
index 878c46ef42..8b05d18c01 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_crc.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_crc.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -158,7 +157,7 @@ uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t
/** @defgroup CRC_Exported_Functions_Group3 Peripheral State functions
* @{
*/
-HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc);
+HAL_CRC_StateTypeDef HAL_CRC_GetState(const CRC_HandleTypeDef *hcrc);
/**
* @}
*/
@@ -180,5 +179,3 @@ HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc);
#endif
#endif /* STM32L1xx_HAL_CRC_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cryp.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cryp.h
index 8f2663dcab..1de5fa013a 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cryp.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cryp.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -94,9 +93,9 @@ typedef struct
uint8_t *pCrypOutBuffPtr; /*!< Pointer to CRYP processing (encryption, decryption,...) buffer */
- __IO uint16_t CrypInCount; /*!< Counter of inputed data */
+ __IO uint16_t CrypInCount; /*!< Counter of inputted data */
- __IO uint16_t CrypOutCount; /*!< Counter of outputed data */
+ __IO uint16_t CrypOutCount; /*!< Counter of outputted data */
HAL_StatusTypeDef Status; /*!< CRYP peripheral status */
@@ -396,5 +395,3 @@ HAL_CRYP_STATETypeDef HAL_CRYP_GetState(CRYP_HandleTypeDef *hcryp);
#endif
#endif /* __STM32L1xx_HAL_CRYP_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cryp_ex.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cryp_ex.h
index 1c42a05586..72e54d7392 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cryp_ex.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cryp_ex.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -76,5 +75,3 @@ void HAL_CRYPEx_ComputationCpltCallback(CRYP_HandleTypeDef *hcryp);
#endif
#endif /* __STM32L1xx_HAL_CRYP_EX_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dac.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dac.h
index 0db67296f4..9f80964468 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dac.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dac.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -79,19 +78,19 @@ typedef struct
__IO uint32_t ErrorCode; /*!< DAC Error code */
#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
- void (* ConvCpltCallbackCh1) (struct __DAC_HandleTypeDef *hdac);
- void (* ConvHalfCpltCallbackCh1) (struct __DAC_HandleTypeDef *hdac);
- void (* ErrorCallbackCh1) (struct __DAC_HandleTypeDef *hdac);
- void (* DMAUnderrunCallbackCh1) (struct __DAC_HandleTypeDef *hdac);
+ void (* ConvCpltCallbackCh1)(struct __DAC_HandleTypeDef *hdac);
+ void (* ConvHalfCpltCallbackCh1)(struct __DAC_HandleTypeDef *hdac);
+ void (* ErrorCallbackCh1)(struct __DAC_HandleTypeDef *hdac);
+ void (* DMAUnderrunCallbackCh1)(struct __DAC_HandleTypeDef *hdac);
- void (* ConvCpltCallbackCh2) (struct __DAC_HandleTypeDef *hdac);
- void (* ConvHalfCpltCallbackCh2) (struct __DAC_HandleTypeDef *hdac);
- void (* ErrorCallbackCh2) (struct __DAC_HandleTypeDef *hdac);
- void (* DMAUnderrunCallbackCh2) (struct __DAC_HandleTypeDef *hdac);
+ void (* ConvCpltCallbackCh2)(struct __DAC_HandleTypeDef *hdac);
+ void (* ConvHalfCpltCallbackCh2)(struct __DAC_HandleTypeDef *hdac);
+ void (* ErrorCallbackCh2)(struct __DAC_HandleTypeDef *hdac);
+ void (* DMAUnderrunCallbackCh2)(struct __DAC_HandleTypeDef *hdac);
- void (* MspInitCallback) (struct __DAC_HandleTypeDef *hdac);
- void (* MspDeInitCallback) (struct __DAC_HandleTypeDef *hdac);
+ void (* MspInitCallback)(struct __DAC_HandleTypeDef *hdac);
+ void (* MspDeInitCallback)(struct __DAC_HandleTypeDef *hdac);
#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
} DAC_HandleTypeDef;
@@ -398,7 +397,7 @@ void HAL_DAC_MspDeInit(DAC_HandleTypeDef *hdac);
/* IO operation functions *****************************************************/
HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel);
HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel);
-HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t *pData, uint32_t Length,
+HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, const uint32_t *pData, uint32_t Length,
uint32_t Alignment);
HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel);
void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac);
@@ -424,8 +423,9 @@ HAL_StatusTypeDef HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DA
* @{
*/
/* Peripheral Control functions ***********************************************/
-uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef *hdac, uint32_t Channel);
-HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel);
+uint32_t HAL_DAC_GetValue(const DAC_HandleTypeDef *hdac, uint32_t Channel);
+HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac,
+ const DAC_ChannelConfTypeDef *sConfig, uint32_t Channel);
/**
* @}
*/
@@ -434,8 +434,8 @@ HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac, DAC_ChannelConf
* @{
*/
/* Peripheral State and Error functions ***************************************/
-HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef *hdac);
-uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac);
+HAL_DAC_StateTypeDef HAL_DAC_GetState(const DAC_HandleTypeDef *hdac);
+uint32_t HAL_DAC_GetError(const DAC_HandleTypeDef *hdac);
/**
* @}
@@ -471,5 +471,3 @@ void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma);
#endif /* STM32L1xx_HAL_DAC_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dac_ex.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dac_ex.h
index 22f5539074..4d6db18a2f 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dac_ex.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dac_ex.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -82,6 +81,7 @@ extern "C" {
* @}
*/
+
/**
* @}
*/
@@ -149,7 +149,7 @@ HAL_StatusTypeDef HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef *hdac, uint32_t
HAL_StatusTypeDef HAL_DACEx_DualStart(DAC_HandleTypeDef *hdac);
HAL_StatusTypeDef HAL_DACEx_DualStop(DAC_HandleTypeDef *hdac);
HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef *hdac, uint32_t Alignment, uint32_t Data1, uint32_t Data2);
-uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef *hdac);
+uint32_t HAL_DACEx_DualGetValue(const DAC_HandleTypeDef *hdac);
void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef *hdac);
void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef *hdac);
@@ -198,5 +198,3 @@ void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma);
#endif
#endif /* STM32L1xx_HAL_DAC_EX_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h
index 57728e72c3..7f7c85a8fb 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h
@@ -7,13 +7,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -55,7 +54,9 @@ typedef enum
/* Exported macro ------------------------------------------------------------*/
+#if !defined(UNUSED)
#define UNUSED(X) (void)X /* To avoid gcc/g++ warnings */
+#endif /* UNUSED */
#define HAL_MAX_DELAY 0xFFFFFFFFU
@@ -195,4 +196,3 @@ typedef enum
#endif /* ___STM32L1xx_HAL_DEF */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h
index 2baafbcea0..36deaa15ab 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -649,4 +648,3 @@ uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma);
#endif /* STM32L1xx_HAL_DMA_H */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h
index d2de5483cf..69331f96d0 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2020 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h
index 1b32596cef..142c4b1692 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h
@@ -6,14 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
*
+ * This software is licensed under terms that can be found in the LICENSE file in
+ * the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
******************************************************************************
*/
@@ -122,10 +120,11 @@ typedef struct
*/
#if defined (FLASH_CUT1) || defined (FLASH_CUT2)
-#define FLASH_SIZE (uint32_t)((*((uint32_t *)FLASHSIZE_BASE)&0xFFU) * 1024U)
+#define FLASH_SIZE_RAW (uint32_t)(*((uint32_t *)FLASHSIZE_BASE)&0xFFU)
#else /*FLASH_CUT3 || FLASH_CUT4 || FLASH_CUT5 || FLASH_CUT6*/
-#define FLASH_SIZE (uint32_t)((*((uint32_t *)FLASHSIZE_BASE)&0xFFFFU) * 1024U)
+#define FLASH_SIZE_RAW (uint32_t)(*((uint32_t *)FLASHSIZE_BASE)&0xFFFFU)
#endif
+#define FLASH_SIZE (((FLASH_SIZE_RAW) == 0 ? 384 : ((FLASH_SIZE_RAW) == 1 ? 256 : (FLASH_SIZE_RAW))) * 1024)
#define FLASH_PAGE_SIZE (256U) /*!< FLASH Page Size in bytes */
/**
@@ -409,5 +408,4 @@ HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout);
#endif /* __STM32L1xx_HAL_FLASH_H */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h
index 13f7a7d360..3d2f7d09e0 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h
@@ -6,14 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
*
+ * This software is licensed under terms that can be found in the LICENSE file in
+ * the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
******************************************************************************
*/
@@ -74,7 +72,7 @@
|| defined(STM32L151xCA) || defined(STM32L152xCA) || defined(STM32L162xCA)
/******* Devices with FLASH 256K *******/
-#define FLASH_NBPAGES_MAX 1025U /* 1025 pages from page 0 to page 1024U */
+#define FLASH_NBPAGES_MAX 1024U /* 1024 pages from page 0 to page 1023U */
#elif defined(STM32L151xD) || defined(STM32L151xDX) || defined(STM32L152xD) || defined(STM32L152xDX) \
|| defined(STM32L162xD) || defined(STM32L162xDX)
@@ -210,7 +208,7 @@ typedef struct
This parameter can be a value of @ref FLASHEx_Type_Erase */
uint32_t PageAddress; /*!< PageAddress: Initial FLASH address to be erased
- This parameter must be a value belonging to FLASH Programm address (depending on the devices) */
+ This parameter must be a value belonging to FLASH Program address (depending on the devices) */
uint32_t NbPages; /*!< NbPages: Number of pages to be erased.
This parameter must be a value between 1 and (max number of pages - value of Initial page)*/
@@ -965,4 +963,3 @@ void HAL_FLASHEx_DATAEEPROM_DisableFixedTimeProgram(void);
#endif /* __STM32L1xx_HAL_FLASH_EX_H */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h
index 47681e5a8f..9d478c0efd 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h
@@ -6,14 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
*
+ * This software is licensed under terms that can be found in the LICENSE file in
+ * the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
******************************************************************************
*/
@@ -116,4 +114,3 @@ __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_ProgramDoubleWord(uint32_t A
#endif /* __STM32L1xx_FLASH_RAMFUNC_H */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h
index de5833edba..305a3e6c19 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -332,5 +331,3 @@ void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin);
#endif /* __STM32L1xx_HAL_GPIO_H */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h
index ebddd83d02..472cf579a3 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -202,4 +201,3 @@ extern "C" {
#endif /* __STM32L1xx_HAL_GPIO_EX_H */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_i2c.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_i2c.h
index 208f2a2b88..185da9b401 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_i2c.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_i2c.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -737,4 +736,3 @@ uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
#endif /* __STM32L1xx_HAL_I2C_H */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_i2s.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_i2s.h
index 61a3d0d651..2959d60e6b 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_i2s.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_i2s.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -558,4 +557,3 @@ uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s);
#endif /* STM32L1xx_HAL_I2S_H */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_irda.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_irda.h
index 6aa5a8155a..2218ae2405 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_irda.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_irda.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -145,7 +144,7 @@ typedef struct
IRDA_InitTypeDef Init; /*!< IRDA communication parameters */
- uint8_t *pTxBuffPtr; /*!< Pointer to IRDA Tx transfer Buffer */
+ const uint8_t *pTxBuffPtr; /*!< Pointer to IRDA Tx transfer Buffer */
uint16_t TxXferSize; /*!< IRDA Tx Transfer size */
@@ -560,11 +559,11 @@ HAL_StatusTypeDef HAL_IRDA_UnRegisterCallback(IRDA_HandleTypeDef *hirda, HAL_IRD
* @{
*/
/* IO operation functions *******************************************************/
-HAL_StatusTypeDef HAL_IRDA_Transmit(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout);
+HAL_StatusTypeDef HAL_IRDA_Transmit(IRDA_HandleTypeDef *hirda, const uint8_t *pData, uint16_t Size, uint32_t Timeout);
HAL_StatusTypeDef HAL_IRDA_Receive(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout);
-HAL_StatusTypeDef HAL_IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
+HAL_StatusTypeDef HAL_IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda, const uint8_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_IRDA_Receive_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_IRDA_Transmit_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
+HAL_StatusTypeDef HAL_IRDA_Transmit_DMA(IRDA_HandleTypeDef *hirda, const uint8_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_IRDA_Receive_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_IRDA_DMAPause(IRDA_HandleTypeDef *hirda);
HAL_StatusTypeDef HAL_IRDA_DMAResume(IRDA_HandleTypeDef *hirda);
@@ -594,8 +593,8 @@ void HAL_IRDA_AbortReceiveCpltCallback(IRDA_HandleTypeDef *hirda);
* @{
*/
/* Peripheral State functions **************************************************/
-HAL_IRDA_StateTypeDef HAL_IRDA_GetState(IRDA_HandleTypeDef *hirda);
-uint32_t HAL_IRDA_GetError(IRDA_HandleTypeDef *hirda);
+HAL_IRDA_StateTypeDef HAL_IRDA_GetState(const IRDA_HandleTypeDef *hirda);
+uint32_t HAL_IRDA_GetError(const IRDA_HandleTypeDef *hirda);
/**
* @}
*/
@@ -681,4 +680,3 @@ uint32_t HAL_IRDA_GetError(IRDA_HandleTypeDef *hirda);
#endif /* __STM32L1xx_HAL_IRDA_H */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_iwdg.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_iwdg.h
index 9b98faecd0..f1367dc2f8 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_iwdg.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_iwdg.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -219,5 +218,3 @@ HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);
#endif
#endif /* STM32L1xx_HAL_IWDG_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_lcd.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_lcd.h
index 3058dbdb95..d9f6b90370 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_lcd.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_lcd.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -757,5 +756,3 @@ HAL_StatusTypeDef LCD_WaitForSynchro(LCD_HandleTypeDef *hlcd);
#endif
#endif /* __STM32L1xx_HAL_LCD_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_nor.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_nor.h
index 937b75ace3..09727fb1c0 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_nor.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_nor.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -325,5 +324,3 @@ HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Addres
#endif
#endif /* STM32L1xx_HAL_NOR_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_opamp.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_opamp.h
index 371286a5e8..24447ed313 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_opamp.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_opamp.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -553,4 +552,3 @@ HAL_OPAMP_StateTypeDef HAL_OPAMP_GetState(OPAMP_HandleTypeDef *hopamp);
#endif /* STM32L1xx_HAL_OPAMP_H */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_opamp_ex.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_opamp_ex.h
index aebffd2f18..60388d2754 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_opamp_ex.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_opamp_ex.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -88,7 +87,7 @@
#if defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD)
/**
- * @brief Enable internal analog switch SW1 to connect OPAMP3 ouput to ADC
+ * @brief Enable internal analog switch SW1 to connect OPAMP3 output to ADC
* switch matrix (ADC channel VCOMP, channel 26) and COMP1 non-inverting input
* (OPAMP3 available on STM32L1 devices Cat.4 only).
* @retval None
@@ -96,7 +95,7 @@
#define __HAL_OPAMP_OPAMP3OUT_CONNECT_ADC_COMP1() __HAL_RI_SWITCH_COMP1_SW1_CLOSE()
/**
- * @brief Disable internal analog switch SW1 to disconnect OPAMP3 ouput from
+ * @brief Disable internal analog switch SW1 to disconnect OPAMP3 output from
* ADC switch matrix (ADC channel VCOMP, channel 26) and COMP1 non-inverting
* input.
* @retval None
@@ -253,4 +252,3 @@ HAL_StatusTypeDef HAL_OPAMPEx_Unlock(OPAMP_HandleTypeDef *hopamp);
#endif /* STM32L1xx_HAL_OPAMP_EX_H */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pcd.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pcd.h
index 9534168daa..86275daf7b 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pcd.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pcd.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -102,8 +101,8 @@ typedef struct
PCD_TypeDef *Instance; /*!< Register base address */
PCD_InitTypeDef Init; /*!< PCD required parameters */
__IO uint8_t USB_Address; /*!< USB Address */
- PCD_EPTypeDef IN_ep[8]; /*!< IN endpoint parameters */
- PCD_EPTypeDef OUT_ep[8]; /*!< OUT endpoint parameters */
+ PCD_EPTypeDef IN_ep[8]; /*!< IN endpoint parameters */
+ PCD_EPTypeDef OUT_ep[8]; /*!< OUT endpoint parameters */
HAL_LockTypeDef Lock; /*!< PCD peripheral status */
__IO PCD_StateTypeDef State; /*!< PCD communication state */
__IO uint32_t ErrorCode; /*!< PCD Error code */
@@ -183,20 +182,20 @@ typedef struct
* @brief macros to handle interrupts and specific clock configurations
* @{
*/
+#define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
+#define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
+#define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) \
+ ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
-#define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
-#define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
-#define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance)\
- & (__INTERRUPT__)) == (__INTERRUPT__))
-#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR)\
- &= (uint16_t)(~(__INTERRUPT__)))
+#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR)\
+ &= (uint16_t)(~(__INTERRUPT__)))
-#define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_WAKEUP_EXTI_LINE
-#define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
-#define __HAL_USB_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_WAKEUP_EXTI_LINE)
-#define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_WAKEUP_EXTI_LINE
+#define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_WAKEUP_EXTI_LINE
+#define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
+#define __HAL_USB_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_WAKEUP_EXTI_LINE)
+#define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_WAKEUP_EXTI_LINE
#define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
do { \
@@ -262,12 +261,10 @@ typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t
* @}
*/
-HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd,
- HAL_PCD_CallbackIDTypeDef CallbackID,
+HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID,
pPCD_CallbackTypeDef pCallback);
-HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd,
- HAL_PCD_CallbackIDTypeDef CallbackID);
+HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID);
HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd,
pPCD_DataOutStageCallbackTypeDef pCallback);
@@ -327,24 +324,17 @@ void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
-HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
- uint16_t ep_mps, uint8_t ep_type);
-
+HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
-HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
- uint8_t *pBuf, uint32_t len);
-
-HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
- uint8_t *pBuf, uint32_t len);
-
-
+HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
+HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
+HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
-
-uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
+uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef const *hpcd, uint8_t ep_addr);
/**
* @}
*/
@@ -353,7 +343,7 @@ uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr
/** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
* @{
*/
-PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
+PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef const *hpcd);
/**
* @}
*/
@@ -427,14 +417,12 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
#define USB_CNTRX_BLSIZE (0x1U << 15)
/* SetENDPOINT */
-#define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue) (*(__IO uint16_t *)\
- (&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue))
+#define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue) \
+ (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue))
/* GetENDPOINT */
#define PCD_GET_ENDPOINT(USBx, bEpNum) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)))
-/* ENDPOINT transfer */
-#define USB_EP0StartXfer USB_EPStartXfer
/**
* @brief sets the type in the endpoint register(bits EP_TYPE[1:0])
@@ -443,8 +431,9 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
* @param wType Endpoint Type.
* @retval None
*/
-#define PCD_SET_EPTYPE(USBx, bEpNum, wType) (PCD_SET_ENDPOINT((USBx), (bEpNum), ((PCD_GET_ENDPOINT((USBx), (bEpNum))\
- & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX)))
+#define PCD_SET_EPTYPE(USBx, bEpNum, wType) \
+ (PCD_SET_ENDPOINT((USBx), (bEpNum), \
+ ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX)))
/**
@@ -462,7 +451,7 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
* @param bEpNum, bDir
* @retval None
*/
-#define PCD_FreeUserBuffer(USBx, bEpNum, bDir) \
+#define PCD_FREE_USER_BUFFER(USBx, bEpNum, bDir) \
do { \
if ((bDir) == 0U) \
{ \
@@ -630,8 +619,8 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
* @param bEpNum Endpoint Number.
* @retval None
*/
-#define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
-#define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
+#define PCD_SET_BULK_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
+#define PCD_CLEAR_BULK_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
/**
* @brief Clears bit CTR_RX / CTR_TX in the endpoint register.
@@ -734,11 +723,13 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
*/
#define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
-#define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE\
- + ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
+#define PCD_EP_TX_CNT(USBx, bEpNum) \
+ ((uint16_t *)((((uint32_t)(USBx)->BTABLE + \
+ ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
-#define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE\
- + ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
+#define PCD_EP_RX_CNT(USBx, bEpNum) \
+ ((uint16_t *)((((uint32_t)(USBx)->BTABLE + \
+ ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
/**
@@ -791,7 +782,7 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
{ \
(wNBlocks)--; \
} \
- *(pdwReg) = (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \
+ *(pdwReg) |= (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \
} while(0) /* PCD_CALC_BLK32 */
#define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) \
@@ -801,24 +792,29 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
{ \
(wNBlocks)++; \
} \
- *(pdwReg) = (uint16_t)((wNBlocks) << 10); \
+ *(pdwReg) |= (uint16_t)((wNBlocks) << 10); \
} while(0) /* PCD_CALC_BLK2 */
#define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) \
do { \
uint32_t wNBlocks; \
- if ((wCount) == 0U) \
- { \
- *(pdwReg) &= (uint16_t)~USB_CNTRX_NBLK_MSK; \
- *(pdwReg) |= USB_CNTRX_BLSIZE; \
- } \
- else if((wCount) <= 62U) \
+ \
+ *(pdwReg) &= 0x3FFU; \
+ \
+ if ((wCount) > 62U) \
{ \
- PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \
+ PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \
} \
else \
{ \
- PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \
+ if ((wCount) == 0U) \
+ { \
+ *(pdwReg) |= USB_CNTRX_BLSIZE; \
+ } \
+ else \
+ { \
+ PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \
+ } \
} \
} while(0) /* PCD_SET_EP_CNT_RX_REG */
@@ -991,5 +987,3 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
#endif
#endif /* STM32L1xx_HAL_PCD_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pcd_ex.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pcd_ex.h
index b35bad5ede..8c7cc326b8 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pcd_ex.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pcd_ex.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -23,7 +22,7 @@
#ifdef __cplusplus
extern "C" {
-#endif
+#endif /* __cplusplus */
/* Includes ------------------------------------------------------------------*/
#include "stm32l1xx_hal_def.h"
@@ -76,9 +75,7 @@ void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg);
#ifdef __cplusplus
}
-#endif
+#endif /* __cplusplus */
#endif /* STM32L1xx_HAL_PCD_EX_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h
index d7fdc08497..7728d4b59e 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -482,5 +481,3 @@ void HAL_PWR_PVDCallback(void);
#endif /* __STM32L1xx_HAL_PWR_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h
index 0c71d688f4..9d98744858 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -114,5 +113,3 @@ HAL_StatusTypeDef HAL_PWREx_DisableLowPowerRunMode(void);
#endif /* __STM32L1xx_HAL_PWR_EX_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h
index 2cc00c4bf3..688532643d 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h
@@ -6,14 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright(c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
*
+ * This software is licensed under terms that can be found in the LICENSE file in
+ * the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
******************************************************************************
*/
@@ -1894,5 +1892,4 @@ void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct,
#endif /* __STM32L1xx_HAL_RCC_H */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h
index 89f0a48d27..7339d6db5d 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h
@@ -6,14 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright(c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
*
+ * This software is licensed under terms that can be found in the LICENSE file in
+ * the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
******************************************************************************
*/
@@ -1026,5 +1024,4 @@ void HAL_RCCEx_LSECSS_Callback(void);
#endif /* __STM32L1xx_HAL_RCC_EX_H */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc.h
index 24024f814a..c9df04797a 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc.h
@@ -6,37 +6,38 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L1xx_HAL_RTC_H
-#define __STM32L1xx_HAL_RTC_H
+#ifndef STM32L1xx_HAL_RTC_H
+#define STM32L1xx_HAL_RTC_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
+
#include "stm32l1xx_hal_def.h"
/** @addtogroup STM32L1xx_HAL_Driver
* @{
*/
-/** @defgroup RTC RTC
+/** @addtogroup RTC
* @{
*/
/* Exported types ------------------------------------------------------------*/
+
/** @defgroup RTC_Exported_Types RTC Exported Types
* @{
*/
@@ -51,7 +52,6 @@ typedef enum
HAL_RTC_STATE_BUSY = 0x02U, /*!< RTC process is ongoing */
HAL_RTC_STATE_TIMEOUT = 0x03U, /*!< RTC timeout state */
HAL_RTC_STATE_ERROR = 0x04U /*!< RTC error state */
-
} HAL_RTCStateTypeDef;
/**
@@ -66,10 +66,10 @@ typedef struct
This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x7F */
uint32_t SynchPrediv; /*!< Specifies the RTC Synchronous Predivider value.
- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x7FFF */
+ This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x7FFF */
uint32_t OutPut; /*!< Specifies which signal will be routed to the RTC output.
- This parameter can be a value of @ref RTCEx_Output_selection_Definitions */
+ This parameter can be a value of @ref RTC_Output_selection_Definitions */
uint32_t OutPutPolarity; /*!< Specifies the polarity of the output signal.
This parameter can be a value of @ref RTC_Output_Polarity_Definitions */
@@ -84,8 +84,8 @@ typedef struct
typedef struct
{
uint8_t Hours; /*!< Specifies the RTC Time Hour.
- This parameter must be a number between Min_Data = 0 and Max_Data = 12 if the RTC_HourFormat_12 is selected.
- This parameter must be a number between Min_Data = 0 and Max_Data = 23 if the RTC_HourFormat_24 is selected */
+ This parameter must be a number between Min_Data = 0 and Max_Data = 12 if the RTC_HourFormat_12 is selected
+ This parameter must be a number between Min_Data = 0 and Max_Data = 23 if the RTC_HourFormat_24 is selected */
uint8_t Minutes; /*!< Specifies the RTC Time Minutes.
This parameter must be a number between Min_Data = 0 and Max_Data = 59 */
@@ -96,17 +96,17 @@ typedef struct
uint8_t TimeFormat; /*!< Specifies the RTC AM/PM Time.
This parameter can be a value of @ref RTC_AM_PM_Definitions */
-#if defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) || defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
- uint32_t SubSeconds; /*!< Specifies the RTC_SSR RTC Sub Second register content.
+#if defined(RTC_SUBSECOND_SUPPORT)
+ uint32_t SubSeconds; /*!< Specifies the RTC_SSR RTC Sub Second register content.
This parameter corresponds to a time unit range between [0-1] Second
with [1 Sec / SecondFraction +1] granularity */
uint32_t SecondFraction; /*!< Specifies the range or granularity of Sub Second register content
- corresponding to Synchronous pre-scaler factor value (PREDIV_S)
+ corresponding to Synchronous prescaler factor value (PREDIV_S)
This parameter corresponds to a time unit range between [0-1] Second
with [1 Sec / SecondFraction +1] granularity.
This field will be used only by HAL_RTC_GetTime function */
-#endif /* STM32L100xBA || STM32L151xBA || STM32L152xBA || STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
+#endif /* RTC_SUBSECOND_SUPPORT */
uint32_t DayLightSaving; /*!< This interface is deprecated. To manage Daylight
Saving Time, please use HAL_RTC_DST_xxx functions */
@@ -144,10 +144,10 @@ typedef struct
uint32_t AlarmMask; /*!< Specifies the RTC Alarm Masks.
This parameter can be a value of @ref RTC_AlarmMask_Definitions */
-#if defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) || defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
+#if defined(RTC_SUBSECOND_SUPPORT)
uint32_t AlarmSubSecondMask; /*!< Specifies the RTC Alarm SubSeconds Masks.
This parameter can be a value of @ref RTC_Alarm_Sub_Seconds_Masks_Definitions */
-#endif /* STM32L100xBA || STM32L151xBA || STM32L152xBA || STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
+#endif /* RTC_SUBSECOND_SUPPORT */
uint32_t AlarmDateWeekDaySel; /*!< Specifies the RTC Alarm is on Date or WeekDay.
This parameter can be a value of @ref RTC_AlarmDateWeekDay_Definitions */
@@ -167,7 +167,7 @@ typedef struct
typedef struct __RTC_HandleTypeDef
#else
typedef struct
-#endif
+#endif /* USE_HAL_RTC_REGISTER_CALLBACKS */
{
RTC_TypeDef *Instance; /*!< Register base address */
@@ -178,47 +178,51 @@ typedef struct
__IO HAL_RTCStateTypeDef State; /*!< Time communication state */
#if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
- void (* AlarmAEventCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC Alarm A Event callback */
+ void (* AlarmAEventCallback) (struct __RTC_HandleTypeDef *hrtc); /*!< RTC Alarm A Event callback */
- void (* AlarmBEventCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC Alarm B Event callback */
+ void (* AlarmBEventCallback) (struct __RTC_HandleTypeDef *hrtc); /*!< RTC Alarm B Event callback */
- void (* TimeStampEventCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC TimeStamp Event callback */
+ void (* TimeStampEventCallback) (struct __RTC_HandleTypeDef *hrtc); /*!< RTC Timestamp Event callback */
- void (* WakeUpTimerEventCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC WakeUpTimer Event callback */
+ void (* WakeUpTimerEventCallback) (struct __RTC_HandleTypeDef *hrtc); /*!< RTC WakeUpTimer Event callback */
- void (* Tamper1EventCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC Tamper 1 Event callback */
+ void (* Tamper1EventCallback) (struct __RTC_HandleTypeDef *hrtc); /*!< RTC Tamper 1 Event callback */
-#if defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) || defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
- void (* Tamper2EventCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC Tamper 2 Event callback */
+#if defined(RTC_TAMPER2_SUPPORT)
+ void (* Tamper2EventCallback) (struct __RTC_HandleTypeDef *hrtc); /*!< RTC Tamper 2 Event callback */
+#endif /* RTC_TAMPER2_SUPPORT */
- void (* Tamper3EventCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC Tamper 3 Event callback */
-#endif /* STM32L100xBA || STM32L151xBA || STM32L152xBA || STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
+#if defined(RTC_TAMPER3_SUPPORT)
+ void (* Tamper3EventCallback) (struct __RTC_HandleTypeDef *hrtc); /*!< RTC Tamper 3 Event callback */
+#endif /* RTC_TAMPER3_SUPPORT */
- void (* MspInitCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC Msp Init callback */
+ void (* MspInitCallback) (struct __RTC_HandleTypeDef *hrtc); /*!< RTC Msp Init callback */
- void (* MspDeInitCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC Msp DeInit callback */
+ void (* MspDeInitCallback) (struct __RTC_HandleTypeDef *hrtc); /*!< RTC Msp DeInit callback */
-#endif /* (USE_HAL_RTC_REGISTER_CALLBACKS) */
+#endif /* USE_HAL_RTC_REGISTER_CALLBACKS */
} RTC_HandleTypeDef;
#if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
/**
- * @brief HAL LPTIM Callback ID enumeration definition
+ * @brief HAL RTC Callback ID enumeration definition
*/
typedef enum
{
- HAL_RTC_ALARM_A_EVENT_CB_ID = 0x00U, /*!< RTC Alarm A Event Callback ID */
- HAL_RTC_ALARM_B_EVENT_CB_ID = 0x01U, /*!< RTC Alarm B Event Callback ID */
- HAL_RTC_TIMESTAMP_EVENT_CB_ID = 0x02U, /*!< RTC TimeStamp Event Callback ID */
- HAL_RTC_WAKEUPTIMER_EVENT_CB_ID = 0x03U, /*!< RTC WakeUp Timer Event Callback ID */
- HAL_RTC_TAMPER1_EVENT_CB_ID = 0x04U, /*!< RTC Tamper 1 Callback ID */
-#if defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) || defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
- HAL_RTC_TAMPER2_EVENT_CB_ID = 0x05U, /*!< RTC Tamper 2 Callback ID */
- HAL_RTC_TAMPER3_EVENT_CB_ID = 0x06U, /*!< RTC Tamper 3 Callback ID */
-#endif /* STM32L100xBA || STM32L151xBA || STM32L152xBA || STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
- HAL_RTC_MSPINIT_CB_ID = 0x0EU, /*!< RTC Msp Init callback ID */
- HAL_RTC_MSPDEINIT_CB_ID = 0x0FU /*!< RTC Msp DeInit callback ID */
+ HAL_RTC_ALARM_A_EVENT_CB_ID = 0x00U, /*!< RTC Alarm A Event Callback ID */
+ HAL_RTC_ALARM_B_EVENT_CB_ID = 0x01U, /*!< RTC Alarm B Event Callback ID */
+ HAL_RTC_TIMESTAMP_EVENT_CB_ID = 0x02U, /*!< RTC Timestamp Event Callback ID */
+ HAL_RTC_WAKEUPTIMER_EVENT_CB_ID = 0x03U, /*!< RTC Wakeup Timer Event Callback ID */
+ HAL_RTC_TAMPER1_EVENT_CB_ID = 0x04U, /*!< RTC Tamper 1 Callback ID */
+#if defined(RTC_TAMPER2_SUPPORT)
+ HAL_RTC_TAMPER2_EVENT_CB_ID = 0x05U, /*!< RTC Tamper 2 Callback ID */
+#endif /* RTC_TAMPER2_SUPPORT */
+#if defined(RTC_TAMPER3_SUPPORT)
+ HAL_RTC_TAMPER3_EVENT_CB_ID = 0x06U, /*!< RTC Tamper 3 Callback ID */
+#endif /* RTC_TAMPER3_SUPPORT */
+ HAL_RTC_MSPINIT_CB_ID = 0x0EU, /*!< RTC Msp Init callback ID */
+ HAL_RTC_MSPDEINIT_CB_ID = 0x0FU /*!< RTC Msp DeInit callback ID */
} HAL_RTC_CallbackIDTypeDef;
/**
@@ -232,6 +236,7 @@ typedef void (*pRTC_CallbackTypeDef)(RTC_HandleTypeDef *hrtc); /*!< pointer to
*/
/* Exported constants --------------------------------------------------------*/
+
/** @defgroup RTC_Exported_Constants RTC Exported Constants
* @{
*/
@@ -239,121 +244,81 @@ typedef void (*pRTC_CallbackTypeDef)(RTC_HandleTypeDef *hrtc); /*!< pointer to
/** @defgroup RTC_Hour_Formats RTC Hour Formats
* @{
*/
-#define RTC_HOURFORMAT_24 (0x00000000U)
-#define RTC_HOURFORMAT_12 (0x00000040U)
-
-#define IS_RTC_HOUR_FORMAT(FORMAT) (((FORMAT) == RTC_HOURFORMAT_12) || \
- ((FORMAT) == RTC_HOURFORMAT_24))
-/**
- * @}
- */
-
-
-/** @defgroup RTC_Output_Polarity_Definitions RTC Output Polarity Definitions
- * @{
- */
-#define RTC_OUTPUT_POLARITY_HIGH (0x00000000U)
-#define RTC_OUTPUT_POLARITY_LOW (0x00100000U)
-
-#define IS_RTC_OUTPUT_POL(POL) (((POL) == RTC_OUTPUT_POLARITY_HIGH) || \
- ((POL) == RTC_OUTPUT_POLARITY_LOW))
+#define RTC_HOURFORMAT_24 0x00000000U
+#define RTC_HOURFORMAT_12 RTC_CR_FMT
/**
* @}
*/
-/** @defgroup RTC_Output_Type_ALARM_OUT RTC Output Type ALARM OUT
+/** @defgroup RTC_Output_selection_Definitions RTC Output Selection Definitions
* @{
*/
-#define RTC_OUTPUT_TYPE_OPENDRAIN (0x00000000U)
-#define RTC_OUTPUT_TYPE_PUSHPULL (0x00040000U)
-
-#define IS_RTC_OUTPUT_TYPE(TYPE) (((TYPE) == RTC_OUTPUT_TYPE_OPENDRAIN) || \
- ((TYPE) == RTC_OUTPUT_TYPE_PUSHPULL))
-
+#define RTC_OUTPUT_DISABLE 0x00000000U
+#define RTC_OUTPUT_ALARMA RTC_CR_OSEL_0
+#define RTC_OUTPUT_ALARMB RTC_CR_OSEL_1
+#define RTC_OUTPUT_WAKEUP RTC_CR_OSEL
/**
* @}
*/
-/** @defgroup RTC_Asynchronous_Predivider Asynchronous Predivider
+/** @defgroup RTC_Output_Polarity_Definitions RTC Output Polarity Definitions
* @{
*/
-#define IS_RTC_ASYNCH_PREDIV(PREDIV) ((PREDIV) <= 0x7FU)
+#define RTC_OUTPUT_POLARITY_HIGH 0x00000000U
+#define RTC_OUTPUT_POLARITY_LOW RTC_CR_POL
/**
* @}
*/
-/** @defgroup RTC_Time_Definitions Time Definitions
+/** @defgroup RTC_Output_Type_ALARM_OUT RTC Output Type ALARM OUT
* @{
*/
-#define IS_RTC_HOUR12(HOUR) (((HOUR) > 0U) && ((HOUR) <= 12U))
-#define IS_RTC_HOUR24(HOUR) ((HOUR) <= 23U)
-#define IS_RTC_MINUTES(MINUTES) ((MINUTES) <= 59U)
-#define IS_RTC_SECONDS(SECONDS) ((SECONDS) <= 59U)
+#define RTC_OUTPUT_TYPE_OPENDRAIN 0x00000000U
+#define RTC_OUTPUT_TYPE_PUSHPULL RTC_TAFCR_ALARMOUTTYPE
/**
* @}
*/
-/** @defgroup RTC_AM_PM_Definitions AM PM Definitions
+/** @defgroup RTC_AM_PM_Definitions RTC AM PM Definitions
* @{
*/
#define RTC_HOURFORMAT12_AM ((uint8_t)0x00)
-#define RTC_HOURFORMAT12_PM ((uint8_t)0x40)
-
-#define IS_RTC_HOURFORMAT12(PM) (((PM) == RTC_HOURFORMAT12_AM) || ((PM) == RTC_HOURFORMAT12_PM))
+#define RTC_HOURFORMAT12_PM ((uint8_t)0x01)
/**
* @}
*/
-/** @defgroup RTC_DayLightSaving_Definitions DayLightSaving
+/** @defgroup RTC_DayLightSaving_Definitions RTC DayLight Saving Definitions
* @{
*/
-#define RTC_DAYLIGHTSAVING_SUB1H (0x00020000U)
-#define RTC_DAYLIGHTSAVING_ADD1H (0x00010000U)
-#define RTC_DAYLIGHTSAVING_NONE (0x00000000U)
-
-#define IS_RTC_DAYLIGHT_SAVING(SAVE) (((SAVE) == RTC_DAYLIGHTSAVING_SUB1H) || \
- ((SAVE) == RTC_DAYLIGHTSAVING_ADD1H) || \
- ((SAVE) == RTC_DAYLIGHTSAVING_NONE))
+#define RTC_DAYLIGHTSAVING_SUB1H RTC_CR_SUB1H
+#define RTC_DAYLIGHTSAVING_ADD1H RTC_CR_ADD1H
+#define RTC_DAYLIGHTSAVING_NONE 0x00000000U
/**
* @}
*/
-/** @defgroup RTC_StoreOperation_Definitions StoreOperation
+/** @defgroup RTC_StoreOperation_Definitions RTC Store Operation Definitions
* @{
*/
-#define RTC_STOREOPERATION_RESET (0x00000000U)
-#define RTC_STOREOPERATION_SET (0x00040000U)
-
-#define IS_RTC_STORE_OPERATION(OPERATION) (((OPERATION) == RTC_STOREOPERATION_RESET) || \
- ((OPERATION) == RTC_STOREOPERATION_SET))
+#define RTC_STOREOPERATION_RESET 0x00000000U
+#define RTC_STOREOPERATION_SET RTC_CR_BKP
/**
* @}
*/
-/** @defgroup RTC_Input_parameter_format_definitions Input Parameter Format
+/** @defgroup RTC_Input_parameter_format_definitions RTC Input Parameter Format Definitions
* @{
*/
-#define RTC_FORMAT_BIN (0x000000000U)
-#define RTC_FORMAT_BCD (0x000000001U)
-
-#define IS_RTC_FORMAT(FORMAT) (((FORMAT) == RTC_FORMAT_BIN) || ((FORMAT) == RTC_FORMAT_BCD))
+#define RTC_FORMAT_BIN 0x00000000U
+#define RTC_FORMAT_BCD 0x00000001U
/**
* @}
*/
-/** @defgroup RTC_Year_Date_Definitions Year Definitions
+/** @defgroup RTC_Month_Date_Definitions RTC Month Date Definitions (in BCD format)
* @{
*/
-#define IS_RTC_YEAR(YEAR) ((YEAR) <= 99U)
-/**
- * @}
- */
-
-/** @defgroup RTC_Month_Date_Definitions Month Definitions
- * @{
- */
-
-/* Coded in BCD format */
#define RTC_MONTH_JANUARY ((uint8_t)0x01)
#define RTC_MONTH_FEBRUARY ((uint8_t)0x02)
#define RTC_MONTH_MARCH ((uint8_t)0x03)
@@ -366,14 +331,11 @@ typedef void (*pRTC_CallbackTypeDef)(RTC_HandleTypeDef *hrtc); /*!< pointer to
#define RTC_MONTH_OCTOBER ((uint8_t)0x10)
#define RTC_MONTH_NOVEMBER ((uint8_t)0x11)
#define RTC_MONTH_DECEMBER ((uint8_t)0x12)
-
-#define IS_RTC_MONTH(MONTH) (((MONTH) >= 1U) && ((MONTH) <= 12U))
-#define IS_RTC_DATE(DATE) (((DATE) >= 1U) && ((DATE) <= 31U))
/**
* @}
*/
-/** @defgroup RTC_WeekDay_Definitions WeekDay Definitions
+/** @defgroup RTC_WeekDay_Definitions RTC WeekDay Definitions
* @{
*/
#define RTC_WEEKDAY_MONDAY ((uint8_t)0x01)
@@ -383,69 +345,123 @@ typedef void (*pRTC_CallbackTypeDef)(RTC_HandleTypeDef *hrtc); /*!< pointer to
#define RTC_WEEKDAY_FRIDAY ((uint8_t)0x05)
#define RTC_WEEKDAY_SATURDAY ((uint8_t)0x06)
#define RTC_WEEKDAY_SUNDAY ((uint8_t)0x07)
-
-#define IS_RTC_WEEKDAY(WEEKDAY) (((WEEKDAY) == RTC_WEEKDAY_MONDAY) || \
- ((WEEKDAY) == RTC_WEEKDAY_TUESDAY) || \
- ((WEEKDAY) == RTC_WEEKDAY_WEDNESDAY) || \
- ((WEEKDAY) == RTC_WEEKDAY_THURSDAY) || \
- ((WEEKDAY) == RTC_WEEKDAY_FRIDAY) || \
- ((WEEKDAY) == RTC_WEEKDAY_SATURDAY) || \
- ((WEEKDAY) == RTC_WEEKDAY_SUNDAY))
/**
* @}
*/
-/** @defgroup RTC_Alarm_Definitions Alarm Definitions
+/** @defgroup RTC_AlarmDateWeekDay_Definitions RTC Alarm Date WeekDay Definitions
* @{
*/
-#define IS_RTC_ALARM_DATE_WEEKDAY_DATE(DATE) (((DATE) > 0U) && ((DATE) <= 31U))
-#define IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(WEEKDAY) (((WEEKDAY) == RTC_WEEKDAY_MONDAY) || \
- ((WEEKDAY) == RTC_WEEKDAY_TUESDAY) || \
- ((WEEKDAY) == RTC_WEEKDAY_WEDNESDAY) || \
- ((WEEKDAY) == RTC_WEEKDAY_THURSDAY) || \
- ((WEEKDAY) == RTC_WEEKDAY_FRIDAY) || \
- ((WEEKDAY) == RTC_WEEKDAY_SATURDAY) || \
- ((WEEKDAY) == RTC_WEEKDAY_SUNDAY))
+#define RTC_ALARMDATEWEEKDAYSEL_DATE 0x00000000U
+#define RTC_ALARMDATEWEEKDAYSEL_WEEKDAY RTC_ALRMAR_WDSEL
/**
* @}
*/
-
-/** @defgroup RTC_AlarmDateWeekDay_Definitions AlarmDateWeekDay Definitions
+/** @defgroup RTC_AlarmMask_Definitions RTC Alarm Mask Definitions
* @{
*/
-#define RTC_ALARMDATEWEEKDAYSEL_DATE (0x00000000U)
-#define RTC_ALARMDATEWEEKDAYSEL_WEEKDAY (0x40000000U)
-
-#define IS_RTC_ALARM_DATE_WEEKDAY_SEL(SEL) (((SEL) == RTC_ALARMDATEWEEKDAYSEL_DATE) || \
- ((SEL) == RTC_ALARMDATEWEEKDAYSEL_WEEKDAY))
+#define RTC_ALARMMASK_NONE 0x00000000U
+#define RTC_ALARMMASK_DATEWEEKDAY RTC_ALRMAR_MSK4
+#define RTC_ALARMMASK_HOURS RTC_ALRMAR_MSK3
+#define RTC_ALARMMASK_MINUTES RTC_ALRMAR_MSK2
+#define RTC_ALARMMASK_SECONDS RTC_ALRMAR_MSK1
+#define RTC_ALARMMASK_ALL (RTC_ALARMMASK_DATEWEEKDAY | \
+ RTC_ALARMMASK_HOURS | \
+ RTC_ALARMMASK_MINUTES | \
+ RTC_ALARMMASK_SECONDS)
/**
* @}
*/
-
-/** @defgroup RTC_AlarmMask_Definitions Alarm Mask Definitions
+/** @defgroup RTC_Alarms_Definitions RTC Alarms Definitions
* @{
*/
-#define RTC_ALARMMASK_NONE (0x00000000U)
-#define RTC_ALARMMASK_DATEWEEKDAY RTC_ALRMAR_MSK4
-#define RTC_ALARMMASK_HOURS RTC_ALRMAR_MSK3
-#define RTC_ALARMMASK_MINUTES RTC_ALRMAR_MSK2
-#define RTC_ALARMMASK_SECONDS RTC_ALRMAR_MSK1
-#define RTC_ALARMMASK_ALL (0x80808080U)
+#define RTC_ALARM_A RTC_CR_ALRAE
+#define RTC_ALARM_B RTC_CR_ALRBE
+/**
+ * @}
+ */
-#define IS_RTC_ALARM_MASK(MASK) (((MASK) & 0x7F7F7F7F) == (uint32_t)RESET)
+#if defined(RTC_SUBSECOND_SUPPORT)
+/** @defgroup RTC_Alarm_Sub_Seconds_Masks_Definitions RTC Alarm Sub Seconds Masks Definitions
+ * @{
+ */
+/*!< All Alarm SS fields are masked. There is no comparison on sub seconds for Alarm */
+#define RTC_ALARMSUBSECONDMASK_ALL 0x00000000U
+/*!< SS[14:1] are don't care in Alarm comparison. Only SS[0] is compared. */
+#define RTC_ALARMSUBSECONDMASK_SS14_1 RTC_ALRMASSR_MASKSS_0
+/*!< SS[14:2] are don't care in Alarm comparison. Only SS[1:0] are compared. */
+#define RTC_ALARMSUBSECONDMASK_SS14_2 RTC_ALRMASSR_MASKSS_1
+/*!< SS[14:3] are don't care in Alarm comparison. Only SS[2:0] are compared. */
+#define RTC_ALARMSUBSECONDMASK_SS14_3 (RTC_ALRMASSR_MASKSS_0 | RTC_ALRMASSR_MASKSS_1)
+/*!< SS[14:4] are don't care in Alarm comparison. Only SS[3:0] are compared. */
+#define RTC_ALARMSUBSECONDMASK_SS14_4 RTC_ALRMASSR_MASKSS_2
+/*!< SS[14:5] are don't care in Alarm comparison. Only SS[4:0] are compared. */
+#define RTC_ALARMSUBSECONDMASK_SS14_5 (RTC_ALRMASSR_MASKSS_0 | RTC_ALRMASSR_MASKSS_2)
+/*!< SS[14:6] are don't care in Alarm comparison. Only SS[5:0] are compared. */
+#define RTC_ALARMSUBSECONDMASK_SS14_6 (RTC_ALRMASSR_MASKSS_1 | RTC_ALRMASSR_MASKSS_2)
+/*!< SS[14:7] are don't care in Alarm comparison. Only SS[6:0] are compared. */
+#define RTC_ALARMSUBSECONDMASK_SS14_7 (RTC_ALRMASSR_MASKSS_0 | RTC_ALRMASSR_MASKSS_1 | RTC_ALRMASSR_MASKSS_2)
+/*!< SS[14:8] are don't care in Alarm comparison. Only SS[7:0] are compared. */
+#define RTC_ALARMSUBSECONDMASK_SS14_8 RTC_ALRMASSR_MASKSS_3
+/*!< SS[14:9] are don't care in Alarm comparison. Only SS[8:0] are compared. */
+#define RTC_ALARMSUBSECONDMASK_SS14_9 (RTC_ALRMASSR_MASKSS_0 | RTC_ALRMASSR_MASKSS_3)
+/*!< SS[14:10] are don't care in Alarm comparison. Only SS[9:0] are compared. */
+#define RTC_ALARMSUBSECONDMASK_SS14_10 (RTC_ALRMASSR_MASKSS_1 | RTC_ALRMASSR_MASKSS_3)
+/*!< SS[14:11] are don't care in Alarm comparison. Only SS[10:0] are compared. */
+#define RTC_ALARMSUBSECONDMASK_SS14_11 (RTC_ALRMASSR_MASKSS_0 | RTC_ALRMASSR_MASKSS_1 | RTC_ALRMASSR_MASKSS_3)
+/*!< SS[14:12] are don't care in Alarm comparison. Only SS[11:0] are compared. */
+#define RTC_ALARMSUBSECONDMASK_SS14_12 (RTC_ALRMASSR_MASKSS_2 | RTC_ALRMASSR_MASKSS_3)
+/*!< SS[14:13] are don't care in Alarm comparison. Only SS[12:0] are compared. */
+#define RTC_ALARMSUBSECONDMASK_SS14_13 (RTC_ALRMASSR_MASKSS_0 | RTC_ALRMASSR_MASKSS_2 | RTC_ALRMASSR_MASKSS_3)
+/*!< SS[14] is don't care in Alarm comparison. Only SS[13:0] are compared. */
+#define RTC_ALARMSUBSECONDMASK_SS14 (RTC_ALRMASSR_MASKSS_1 | RTC_ALRMASSR_MASKSS_2 | RTC_ALRMASSR_MASKSS_3)
+/*!< SS[14:0] are compared and must match to activate alarm. */
+#define RTC_ALARMSUBSECONDMASK_NONE RTC_ALRMASSR_MASKSS
/**
* @}
*/
+#endif /* RTC_SUBSECOND_SUPPORT */
-/** @defgroup RTC_Alarms_Definitions Alarms Definitions
+/** @defgroup RTC_Interrupts_Definitions RTC Interrupts Definitions
* @{
*/
-#define RTC_ALARM_A RTC_CR_ALRAE
-#define RTC_ALARM_B RTC_CR_ALRBE
+#define RTC_IT_TS RTC_CR_TSIE /*!< Enable Timestamp Interrupt */
+#define RTC_IT_WUT RTC_CR_WUTIE /*!< Enable Wakeup timer Interrupt */
+#define RTC_IT_ALRB RTC_CR_ALRBIE /*!< Enable Alarm B Interrupt */
+#define RTC_IT_ALRA RTC_CR_ALRAIE /*!< Enable Alarm A Interrupt */
+/**
+ * @}
+ */
-#define IS_RTC_ALARM(ALARM) (((ALARM) == RTC_ALARM_A) || ((ALARM) == RTC_ALARM_B))
+/** @defgroup RTC_Flags_Definitions RTC Flags Definitions
+ * @{
+ */
+#if defined(RTC_SMOOTHCALIB_SUPPORT)
+#define RTC_FLAG_RECALPF RTC_ISR_RECALPF /*!< Recalibration pending flag */
+#endif /* RTC_SMOOTHCALIB_SUPPORT */
+#if defined(RTC_TAMPER3_SUPPORT)
+#define RTC_FLAG_TAMP3F RTC_ISR_TAMP3F /*!< Tamper 3 event flag */
+#endif /* RTC_TAMPER3_SUPPORT */
+#if defined(RTC_TAMPER2_SUPPORT)
+#define RTC_FLAG_TAMP2F RTC_ISR_TAMP2F /*!< Tamper 2 event flag */
+#endif /* RTC_TAMPER2_SUPPORT */
+#define RTC_FLAG_TAMP1F RTC_ISR_TAMP1F /*!< Tamper 1 event flag */
+#define RTC_FLAG_TSOVF RTC_ISR_TSOVF /*!< Timestamp overflow flag */
+#define RTC_FLAG_TSF RTC_ISR_TSF /*!< Timestamp event flag */
+#define RTC_FLAG_WUTF RTC_ISR_WUTF /*!< Wakeup timer event flag */
+#define RTC_FLAG_ALRBF RTC_ISR_ALRBF /*!< Alarm B event flag */
+#define RTC_FLAG_ALRAF RTC_ISR_ALRAF /*!< Alarm A event flag */
+#define RTC_FLAG_INITF RTC_ISR_INITF /*!< RTC in initialization mode flag */
+#define RTC_FLAG_RSF RTC_ISR_RSF /*!< Register synchronization flag */
+#define RTC_FLAG_INITS RTC_ISR_INITS /*!< RTC initialization status flag */
+#if defined(RTC_SUBSECOND_SUPPORT)
+#define RTC_FLAG_SHPF RTC_ISR_SHPF /*!< Shift operation pending flag */
+#endif /* RTC_SUBSECOND_SUPPORT */
+#define RTC_FLAG_WUTWF RTC_ISR_WUTWF /*!< WUTR register write allowance flag */
+#define RTC_FLAG_ALRBWF RTC_ISR_ALRBWF /*!< ALRMBR register write allowance flag */
+#define RTC_FLAG_ALRAWF RTC_ISR_ALRAWF /*!< ALRMAR register write allowance flag */
/**
* @}
*/
@@ -455,20 +471,21 @@ typedef void (*pRTC_CallbackTypeDef)(RTC_HandleTypeDef *hrtc); /*!< pointer to
*/
/* Exported macros -----------------------------------------------------------*/
-/** @defgroup RTC_Exported_macros RTC Exported Macros
+
+/** @defgroup RTC_Exported_Macros RTC Exported Macros
* @{
*/
-/** @brief Reset RTC handle state
- * @param __HANDLE__ RTC handle.
+/** @brief Reset RTC handle state
+ * @param __HANDLE__ specifies the RTC handle.
* @retval None
*/
#if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
-#define __HAL_RTC_RESET_HANDLE_STATE(__HANDLE__) do{\
- (__HANDLE__)->State = HAL_RTC_STATE_RESET;\
- (__HANDLE__)->MspInitCallback = NULL;\
- (__HANDLE__)->MspDeInitCallback = NULL;\
- }while(0)
+#define __HAL_RTC_RESET_HANDLE_STATE(__HANDLE__) do { \
+ (__HANDLE__)->State = HAL_RTC_STATE_RESET; \
+ (__HANDLE__)->MspInitCallback = NULL; \
+ (__HANDLE__)->MspDeInitCallback = NULL; \
+ } while(0U)
#else
#define __HAL_RTC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_RTC_STATE_RESET)
#endif /* USE_HAL_RTC_REGISTER_CALLBACKS */
@@ -478,21 +495,26 @@ typedef void (*pRTC_CallbackTypeDef)(RTC_HandleTypeDef *hrtc); /*!< pointer to
* @param __HANDLE__ specifies the RTC handle.
* @retval None
*/
-#define __HAL_RTC_WRITEPROTECTION_DISABLE(__HANDLE__) \
- do{ \
- (__HANDLE__)->Instance->WPR = 0xCAU; \
- (__HANDLE__)->Instance->WPR = 0x53U; \
- } while(0U)
+#define __HAL_RTC_WRITEPROTECTION_DISABLE(__HANDLE__) do { \
+ (__HANDLE__)->Instance->WPR = 0xCAU; \
+ (__HANDLE__)->Instance->WPR = 0x53U; \
+ } while(0U)
/**
* @brief Enable the write protection for RTC registers.
* @param __HANDLE__ specifies the RTC handle.
* @retval None
*/
-#define __HAL_RTC_WRITEPROTECTION_ENABLE(__HANDLE__) \
- do{ \
- (__HANDLE__)->Instance->WPR = 0xFFU; \
- } while(0U)
+#define __HAL_RTC_WRITEPROTECTION_ENABLE(__HANDLE__) do { \
+ (__HANDLE__)->Instance->WPR = 0xFFU; \
+ } while(0U)
+
+/**
+ * @brief Check whether the RTC Calendar is initialized.
+ * @param __HANDLE__ specifies the RTC handle.
+ * @retval None
+ */
+#define __HAL_RTC_IS_CALENDAR_INITIALIZED(__HANDLE__) (((((__HANDLE__)->Instance->ISR) & (RTC_FLAG_INITS)) == RTC_FLAG_INITS) ? 1U : 0U)
/**
* @brief Enable the RTC ALARMA peripheral.
@@ -537,9 +559,9 @@ typedef void (*pRTC_CallbackTypeDef)(RTC_HandleTypeDef *hrtc); /*!< pointer to
* @brief Disable the RTC Alarm interrupt.
* @param __HANDLE__ specifies the RTC handle.
* @param __INTERRUPT__ specifies the RTC Alarm interrupt sources to be enabled or disabled.
- * This parameter can be any combination of the following values:
- * @arg RTC_IT_ALRA: Alarm A interrupt
- * @arg RTC_IT_ALRB: Alarm B interrupt
+ * This parameter can be any combination of the following values:
+ * @arg RTC_IT_ALRA: Alarm A interrupt
+ * @arg RTC_IT_ALRB: Alarm B interrupt
* @retval None
*/
#define __HAL_RTC_ALARM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__))
@@ -547,133 +569,132 @@ typedef void (*pRTC_CallbackTypeDef)(RTC_HandleTypeDef *hrtc); /*!< pointer to
/**
* @brief Check whether the specified RTC Alarm interrupt has occurred or not.
* @param __HANDLE__ specifies the RTC handle.
- * @param __INTERRUPT__ specifies the RTC Alarm interrupt sources to check.
- * This parameter can be:
- * @arg RTC_IT_ALRA: Alarm A interrupt
- * @arg RTC_IT_ALRB: Alarm B interrupt
- * @retval None
- */
-#define __HAL_RTC_ALARM_GET_IT(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->ISR)& ((__INTERRUPT__)>> 4U)) != 0U)? 1U : 0U)
-
-/**
- * @brief Check whether the specified RTC Alarm interrupt has been enabled or not.
- * @param __HANDLE__ specifies the RTC handle.
- * @param __INTERRUPT__ specifies the RTC Alarm interrupt sources to check.
+ * @param __INTERRUPT__ specifies the RTC Alarm interrupt to check.
* This parameter can be:
* @arg RTC_IT_ALRA: Alarm A interrupt
* @arg RTC_IT_ALRB: Alarm B interrupt
* @retval None
*/
-#define __HAL_RTC_ALARM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->CR) & (__INTERRUPT__)) != 0U) ? 1U : 0U)
+#define __HAL_RTC_ALARM_GET_IT(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->ISR) & ((__INTERRUPT__) >> 4U)) != 0U) ? 1U : 0U)
/**
* @brief Get the selected RTC Alarm's flag status.
* @param __HANDLE__ specifies the RTC handle.
- * @param __FLAG__ specifies the RTC Alarm Flag sources to check.
+ * @param __FLAG__ specifies the RTC Alarm Flag to check.
* This parameter can be:
- * @arg RTC_FLAG_ALRAF
- * @arg RTC_FLAG_ALRBF
- * @arg RTC_FLAG_ALRAWF
- * @arg RTC_FLAG_ALRBWF
+ * @arg RTC_FLAG_ALRAF: Alarm A interrupt flag
+ * @arg RTC_FLAG_ALRAWF: Alarm A 'write allowed' flag
+ * @arg RTC_FLAG_ALRBF: Alarm B interrupt flag
+ * @arg RTC_FLAG_ALRBWF: Alarm B 'write allowed' flag
* @retval None
*/
-#define __HAL_RTC_ALARM_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != 0U)? 1U : 0U)
+#define __HAL_RTC_ALARM_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != 0U) ? 1U : 0U)
/**
* @brief Clear the RTC Alarm's pending flags.
* @param __HANDLE__ specifies the RTC handle.
- * @param __FLAG__ specifies the RTC Alarm Flag sources to clear.
+ * @param __FLAG__ specifies the RTC Alarm flag to be cleared.
* This parameter can be:
* @arg RTC_FLAG_ALRAF
* @arg RTC_FLAG_ALRBF
* @retval None
*/
-#define __HAL_RTC_ALARM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT) | ((__HANDLE__)->Instance->ISR & RTC_ISR_INIT))
+#define __HAL_RTC_ALARM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT))
+
+/**
+ * @brief Check whether the specified RTC Alarm interrupt has been enabled or not.
+ * @param __HANDLE__ specifies the RTC handle.
+ * @param __INTERRUPT__ specifies the RTC Alarm interrupt sources to check.
+ * This parameter can be:
+ * @arg RTC_IT_ALRA: Alarm A interrupt
+ * @arg RTC_IT_ALRB: Alarm B interrupt
+ * @retval None
+ */
+#define __HAL_RTC_ALARM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->CR) & (__INTERRUPT__)) != 0U) ? 1U : 0U)
/**
- * @brief Enable interrupt on the RTC Alarm associated Exti line.
+ * @brief Enable interrupt on the RTC Alarm associated EXTI line.
* @retval None
*/
#define __HAL_RTC_ALARM_EXTI_ENABLE_IT() (EXTI->IMR |= RTC_EXTI_LINE_ALARM_EVENT)
/**
- * @brief Disable interrupt on the RTC Alarm associated Exti line.
+ * @brief Disable interrupt on the RTC Alarm associated EXTI line.
* @retval None
*/
-#define __HAL_RTC_ALARM_EXTI_DISABLE_IT() (EXTI->IMR &= ~(RTC_EXTI_LINE_ALARM_EVENT))
+#define __HAL_RTC_ALARM_EXTI_DISABLE_IT() (EXTI->IMR &= ~RTC_EXTI_LINE_ALARM_EVENT)
/**
- * @brief Enable event on the RTC Alarm associated Exti line.
+ * @brief Enable event on the RTC Alarm associated EXTI line.
* @retval None.
*/
-#define __HAL_RTC_ALARM_EXTI_ENABLE_EVENT() (EXTI->EMR |= RTC_EXTI_LINE_ALARM_EVENT)
+#define __HAL_RTC_ALARM_EXTI_ENABLE_EVENT() (EXTI->EMR |= RTC_EXTI_LINE_ALARM_EVENT)
/**
- * @brief Disable event on the RTC Alarm associated Exti line.
+ * @brief Disable event on the RTC Alarm associated EXTI line.
* @retval None.
*/
-#define __HAL_RTC_ALARM_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(RTC_EXTI_LINE_ALARM_EVENT))
+#define __HAL_RTC_ALARM_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~RTC_EXTI_LINE_ALARM_EVENT)
/**
- * @brief Enable falling edge trigger on the RTC Alarm associated Exti line.
+ * @brief Enable falling edge trigger on the RTC Alarm associated EXTI line.
* @retval None.
*/
#define __HAL_RTC_ALARM_EXTI_ENABLE_FALLING_EDGE() (EXTI->FTSR |= RTC_EXTI_LINE_ALARM_EVENT)
/**
- * @brief Disable falling edge trigger on the RTC Alarm associated Exti line.
+ * @brief Disable falling edge trigger on the RTC Alarm associated EXTI line.
* @retval None.
*/
-#define __HAL_RTC_ALARM_EXTI_DISABLE_FALLING_EDGE() (EXTI->FTSR &= ~(RTC_EXTI_LINE_ALARM_EVENT))
+#define __HAL_RTC_ALARM_EXTI_DISABLE_FALLING_EDGE() (EXTI->FTSR &= ~RTC_EXTI_LINE_ALARM_EVENT)
/**
- * @brief Enable rising edge trigger on the RTC Alarm associated Exti line.
+ * @brief Enable rising edge trigger on the RTC Alarm associated EXTI line.
* @retval None.
*/
#define __HAL_RTC_ALARM_EXTI_ENABLE_RISING_EDGE() (EXTI->RTSR |= RTC_EXTI_LINE_ALARM_EVENT)
/**
- * @brief Disable rising edge trigger on the RTC Alarm associated Exti line.
+ * @brief Disable rising edge trigger on the RTC Alarm associated EXTI line.
* @retval None.
*/
-#define __HAL_RTC_ALARM_EXTI_DISABLE_RISING_EDGE() (EXTI->RTSR &= ~(RTC_EXTI_LINE_ALARM_EVENT))
+#define __HAL_RTC_ALARM_EXTI_DISABLE_RISING_EDGE() (EXTI->RTSR &= ~RTC_EXTI_LINE_ALARM_EVENT)
/**
- * @brief Enable rising & falling edge trigger on the RTC Alarm associated Exti line.
+ * @brief Enable rising & falling edge trigger on the RTC Alarm associated EXTI line.
* @retval None.
*/
-#define __HAL_RTC_ALARM_EXTI_ENABLE_RISING_FALLING_EDGE() do { \
- __HAL_RTC_ALARM_EXTI_ENABLE_RISING_EDGE(); \
- __HAL_RTC_ALARM_EXTI_ENABLE_FALLING_EDGE(); \
- } while(0U)
+#define __HAL_RTC_ALARM_EXTI_ENABLE_RISING_FALLING_EDGE() do { \
+ __HAL_RTC_ALARM_EXTI_ENABLE_RISING_EDGE(); \
+ __HAL_RTC_ALARM_EXTI_ENABLE_FALLING_EDGE(); \
+ } while(0U)
/**
- * @brief Disable rising & falling edge trigger on the RTC Alarm associated Exti line.
+ * @brief Disable rising & falling edge trigger on the RTC Alarm associated EXTI line.
* @retval None.
*/
-#define __HAL_RTC_ALARM_EXTI_DISABLE_RISING_FALLING_EDGE() do { \
- __HAL_RTC_ALARM_EXTI_DISABLE_RISING_EDGE(); \
- __HAL_RTC_ALARM_EXTI_DISABLE_FALLING_EDGE(); \
- } while(0U)
+#define __HAL_RTC_ALARM_EXTI_DISABLE_RISING_FALLING_EDGE() do { \
+ __HAL_RTC_ALARM_EXTI_DISABLE_RISING_EDGE(); \
+ __HAL_RTC_ALARM_EXTI_DISABLE_FALLING_EDGE(); \
+ } while(0U)
/**
- * @brief Check whether the RTC Alarm associated Exti line interrupt flag is set or not.
+ * @brief Check whether the RTC Alarm associated EXTI line interrupt flag is set or not.
* @retval Line Status.
*/
#define __HAL_RTC_ALARM_EXTI_GET_FLAG() (EXTI->PR & RTC_EXTI_LINE_ALARM_EVENT)
/**
- * @brief Clear the RTC Alarm associated Exti line flag.
+ * @brief Clear the RTC Alarm associated EXTI line flag.
* @retval None.
*/
#define __HAL_RTC_ALARM_EXTI_CLEAR_FLAG() (EXTI->PR = RTC_EXTI_LINE_ALARM_EVENT)
/**
- * @brief Generate a Software interrupt on RTC Alarm associated Exti line.
+ * @brief Generate a Software interrupt on RTC Alarm associated EXTI line.
* @retval None.
*/
#define __HAL_RTC_ALARM_EXTI_GENERATE_SWIT() (EXTI->SWIER |= RTC_EXTI_LINE_ALARM_EVENT)
-
/**
* @}
*/
@@ -682,17 +703,17 @@ typedef void (*pRTC_CallbackTypeDef)(RTC_HandleTypeDef *hrtc); /*!< pointer to
#include "stm32l1xx_hal_rtc_ex.h"
/* Exported functions --------------------------------------------------------*/
-/** @defgroup RTC_Exported_Functions RTC Exported Functions
+
+/** @addtogroup RTC_Exported_Functions
* @{
*/
-/** @defgroup RTC_Exported_Functions_Group1 Initialization and de-initialization functions
+/** @addtogroup RTC_Exported_Functions_Group1
* @{
*/
/* Initialization and de-initialization functions ****************************/
HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc);
HAL_StatusTypeDef HAL_RTC_DeInit(RTC_HandleTypeDef *hrtc);
-
void HAL_RTC_MspInit(RTC_HandleTypeDef *hrtc);
void HAL_RTC_MspDeInit(RTC_HandleTypeDef *hrtc);
@@ -700,13 +721,12 @@ void HAL_RTC_MspDeInit(RTC_HandleTypeDef *hrtc);
#if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
HAL_StatusTypeDef HAL_RTC_RegisterCallback(RTC_HandleTypeDef *hrtc, HAL_RTC_CallbackIDTypeDef CallbackID, pRTC_CallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_RTC_UnRegisterCallback(RTC_HandleTypeDef *hrtc, HAL_RTC_CallbackIDTypeDef CallbackID);
-#endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
-
+#endif /* USE_HAL_RTC_REGISTER_CALLBACKS */
/**
* @}
*/
-/** @defgroup RTC_Exported_Functions_Group2 RTC Time and Date functions
+/** @addtogroup RTC_Exported_Functions_Group2
* @{
*/
/* RTC Time and Date functions ************************************************/
@@ -714,18 +734,11 @@ HAL_StatusTypeDef HAL_RTC_SetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTim
HAL_StatusTypeDef HAL_RTC_GetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format);
HAL_StatusTypeDef HAL_RTC_SetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format);
HAL_StatusTypeDef HAL_RTC_GetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format);
-
-/* RTC Daylight Saving Time functions *****************************************/
-void HAL_RTC_DST_Add1Hour(RTC_HandleTypeDef *hrtc);
-void HAL_RTC_DST_Sub1Hour(RTC_HandleTypeDef *hrtc);
-void HAL_RTC_DST_SetStoreOperation(RTC_HandleTypeDef *hrtc);
-void HAL_RTC_DST_ClearStoreOperation(RTC_HandleTypeDef *hrtc);
-uint32_t HAL_RTC_DST_ReadStoreOperation(RTC_HandleTypeDef *hrtc);
/**
* @}
*/
-/** @defgroup RTC_Exported_Functions_Group3 RTC Alarm functions
+/** @addtogroup RTC_Exported_Functions_Group3
* @{
*/
/* RTC Alarm functions ********************************************************/
@@ -740,16 +753,23 @@ void HAL_RTC_AlarmAEventCallback(RTC_HandleTypeDef *hrtc);
* @}
*/
-/** @defgroup RTC_Exported_Functions_Group4 Peripheral Control functions
+/** @addtogroup RTC_Exported_Functions_Group4
* @{
*/
/* Peripheral Control functions ***********************************************/
HAL_StatusTypeDef HAL_RTC_WaitForSynchro(RTC_HandleTypeDef *hrtc);
+
+/* RTC Daylight Saving Time functions *****************************************/
+void HAL_RTC_DST_Add1Hour(RTC_HandleTypeDef *hrtc);
+void HAL_RTC_DST_Sub1Hour(RTC_HandleTypeDef *hrtc);
+void HAL_RTC_DST_SetStoreOperation(RTC_HandleTypeDef *hrtc);
+void HAL_RTC_DST_ClearStoreOperation(RTC_HandleTypeDef *hrtc);
+uint32_t HAL_RTC_DST_ReadStoreOperation(RTC_HandleTypeDef *hrtc);
/**
* @}
*/
-/** @defgroup RTC_Exported_Functions_Group5 Peripheral State functions
+/** @addtogroup RTC_Exported_Functions_Group5
* @{
*/
/* Peripheral State functions *************************************************/
@@ -765,38 +785,149 @@ HAL_RTCStateTypeDef HAL_RTC_GetState(RTC_HandleTypeDef *hrtc);
/* Private types -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/
+
/** @defgroup RTC_Private_Constants RTC Private Constants
* @{
*/
-#define RTC_TIMEOUT_VALUE 1000U
-
-#define RTC_EXTI_LINE_ALARM_EVENT ((uint32_t)EXTI_IMR_MR17) /*!< External interrupt line 17 Connected to the RTC Alarm event */
-
+/* Masks Definition */
+#define RTC_TR_RESERVED_MASK ((uint32_t)(RTC_TR_HT | RTC_TR_HU | \
+ RTC_TR_MNT | RTC_TR_MNU | \
+ RTC_TR_ST | RTC_TR_SU | \
+ RTC_TR_PM))
+#define RTC_DR_RESERVED_MASK ((uint32_t)(RTC_DR_YT | RTC_DR_YU | \
+ RTC_DR_MT | RTC_DR_MU | \
+ RTC_DR_DT | RTC_DR_DU | \
+ RTC_DR_WDU))
+#define RTC_ISR_RESERVED_MASK ((uint32_t)(RTC_FLAGS_MASK | RTC_ISR_INIT))
+#define RTC_INIT_MASK 0xFFFFFFFFU
+#define RTC_RSF_MASK ((uint32_t)~(RTC_ISR_INIT | RTC_ISR_RSF))
+#define RTC_FLAGS_MASK ((uint32_t)(RTC_FLAG_INITF | RTC_FLAG_INITS | \
+ RTC_FLAG_ALRAF | RTC_FLAG_ALRAWF | \
+ RTC_FLAG_ALRBF | RTC_FLAG_ALRBWF | \
+ RTC_FLAG_WUTF | RTC_FLAG_WUTWF | \
+ RTC_FLAG_TSF | RTC_FLAG_TSOVF | \
+ RTC_FLAG_RSF | RTC_TAMPER_FLAGS_MASK))
+
+#define RTC_TIMEOUT_VALUE 1000U
+
+#define RTC_EXTI_LINE_ALARM_EVENT EXTI_IMR_MR17 /*!< External interrupt line 17 Connected to the RTC Alarm event */
/**
* @}
*/
/* Private macros ------------------------------------------------------------*/
+
/** @defgroup RTC_Private_Macros RTC Private Macros
* @{
*/
+/** @defgroup RTC_IS_RTC_Definitions RTC Private macros to check input parameters
+ * @{
+ */
+#define IS_RTC_HOUR_FORMAT(FORMAT) (((FORMAT) == RTC_HOURFORMAT_12) || \
+ ((FORMAT) == RTC_HOURFORMAT_24))
+
+#define IS_RTC_OUTPUT(OUTPUT) (((OUTPUT) == RTC_OUTPUT_DISABLE) || \
+ ((OUTPUT) == RTC_OUTPUT_ALARMA) || \
+ ((OUTPUT) == RTC_OUTPUT_ALARMB) || \
+ ((OUTPUT) == RTC_OUTPUT_WAKEUP))
+
+#define IS_RTC_OUTPUT_POL(POL) (((POL) == RTC_OUTPUT_POLARITY_HIGH) || \
+ ((POL) == RTC_OUTPUT_POLARITY_LOW))
+
+#define IS_RTC_OUTPUT_TYPE(TYPE) (((TYPE) == RTC_OUTPUT_TYPE_OPENDRAIN) || \
+ ((TYPE) == RTC_OUTPUT_TYPE_PUSHPULL))
+
+#define IS_RTC_ASYNCH_PREDIV(PREDIV) ((PREDIV) <= 0x7FU)
+#define IS_RTC_SYNCH_PREDIV(PREDIV) ((PREDIV) <= 0x7FFFU)
+
+#define IS_RTC_HOUR12(HOUR) (((HOUR) > 0U) && ((HOUR) <= 12U))
+#define IS_RTC_HOUR24(HOUR) ((HOUR) <= 23U)
+#define IS_RTC_MINUTES(MINUTES) ((MINUTES) <= 59U)
+#define IS_RTC_SECONDS(SECONDS) ((SECONDS) <= 59U)
+
+#define IS_RTC_HOURFORMAT12(PM) (((PM) == RTC_HOURFORMAT12_AM) || \
+ ((PM) == RTC_HOURFORMAT12_PM))
+
+#define IS_RTC_DAYLIGHT_SAVING(SAVE) (((SAVE) == RTC_DAYLIGHTSAVING_SUB1H) || \
+ ((SAVE) == RTC_DAYLIGHTSAVING_ADD1H) || \
+ ((SAVE) == RTC_DAYLIGHTSAVING_NONE))
+
+#define IS_RTC_STORE_OPERATION(OPERATION) (((OPERATION) == RTC_STOREOPERATION_RESET) || \
+ ((OPERATION) == RTC_STOREOPERATION_SET))
+
+#define IS_RTC_FORMAT(FORMAT) (((FORMAT) == RTC_FORMAT_BIN) || ((FORMAT) == RTC_FORMAT_BCD))
+
+#define IS_RTC_YEAR(YEAR) ((YEAR) <= 99U)
+#define IS_RTC_MONTH(MONTH) (((MONTH) >= 1U) && ((MONTH) <= 12U))
+#define IS_RTC_DATE(DATE) (((DATE) >= 1U) && ((DATE) <= 31U))
+
+#define IS_RTC_WEEKDAY(WEEKDAY) (((WEEKDAY) == RTC_WEEKDAY_MONDAY) || \
+ ((WEEKDAY) == RTC_WEEKDAY_TUESDAY) || \
+ ((WEEKDAY) == RTC_WEEKDAY_WEDNESDAY) || \
+ ((WEEKDAY) == RTC_WEEKDAY_THURSDAY) || \
+ ((WEEKDAY) == RTC_WEEKDAY_FRIDAY) || \
+ ((WEEKDAY) == RTC_WEEKDAY_SATURDAY) || \
+ ((WEEKDAY) == RTC_WEEKDAY_SUNDAY))
+
+#define IS_RTC_ALARM_DATE_WEEKDAY_DATE(DATE) (((DATE) > 0U) && ((DATE) <= 31U))
+
+#define IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(WEEKDAY) (((WEEKDAY) == RTC_WEEKDAY_MONDAY) || \
+ ((WEEKDAY) == RTC_WEEKDAY_TUESDAY) || \
+ ((WEEKDAY) == RTC_WEEKDAY_WEDNESDAY) || \
+ ((WEEKDAY) == RTC_WEEKDAY_THURSDAY) || \
+ ((WEEKDAY) == RTC_WEEKDAY_FRIDAY) || \
+ ((WEEKDAY) == RTC_WEEKDAY_SATURDAY) || \
+ ((WEEKDAY) == RTC_WEEKDAY_SUNDAY))
+
+#define IS_RTC_ALARM_DATE_WEEKDAY_SEL(SEL) (((SEL) == RTC_ALARMDATEWEEKDAYSEL_DATE) || \
+ ((SEL) == RTC_ALARMDATEWEEKDAYSEL_WEEKDAY))
+
+#define IS_RTC_ALARM_MASK(MASK) (((MASK) & ((uint32_t)~RTC_ALARMMASK_ALL)) == 0U)
+
+#define IS_RTC_ALARM(ALARM) (((ALARM) == RTC_ALARM_A) || ((ALARM) == RTC_ALARM_B))
+
+#if defined(RTC_SUBSECOND_SUPPORT)
+#define IS_RTC_ALARM_SUB_SECOND_VALUE(VALUE) ((VALUE) <= RTC_ALRMASSR_SS)
+
+#define IS_RTC_ALARM_SUB_SECOND_MASK(MASK) (((MASK) == RTC_ALARMSUBSECONDMASK_ALL) || \
+ ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_1) || \
+ ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_2) || \
+ ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_3) || \
+ ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_4) || \
+ ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_5) || \
+ ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_6) || \
+ ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_7) || \
+ ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_8) || \
+ ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_9) || \
+ ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_10) || \
+ ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_11) || \
+ ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_12) || \
+ ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_13) || \
+ ((MASK) == RTC_ALARMSUBSECONDMASK_SS14) || \
+ ((MASK) == RTC_ALARMSUBSECONDMASK_NONE))
+#endif /* RTC_SUBSECOND_SUPPORT */
+/**
+ * @}
+ */
+
/**
* @}
*/
-/* Private functions -------------------------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
/** @defgroup RTC_Private_Functions RTC Private Functions
* @{
*/
HAL_StatusTypeDef RTC_EnterInitMode(RTC_HandleTypeDef *hrtc);
-uint8_t RTC_ByteToBcd2(uint8_t Value);
-uint8_t RTC_Bcd2ToByte(uint8_t Value);
+HAL_StatusTypeDef RTC_ExitInitMode(RTC_HandleTypeDef *hrtc);
+uint8_t RTC_ByteToBcd2(uint8_t number);
+uint8_t RTC_Bcd2ToByte(uint8_t number);
/**
* @}
*/
-
/**
* @}
*/
@@ -809,6 +940,4 @@ uint8_t RTC_Bcd2ToByte(uint8_t Value);
}
#endif
-#endif /* __STM32L1xx_HAL_RTC_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+#endif /* STM32L1xx_HAL_RTC_H */
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc_ex.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc_ex.h
index 3617a78a7d..bd9ebc4c78 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc_ex.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc_ex.h
@@ -6,37 +6,38 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L1xx_HAL_RTC_EX_H
-#define __STM32L1xx_HAL_RTC_EX_H
+#ifndef STM32L1xx_HAL_RTC_EX_H
+#define STM32L1xx_HAL_RTC_EX_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
+
#include "stm32l1xx_hal_def.h"
/** @addtogroup STM32L1xx_HAL_Driver
* @{
*/
-/** @defgroup RTCEx RTCEx
+/** @addtogroup RTCEx
* @{
*/
/* Exported types ------------------------------------------------------------*/
+
/** @defgroup RTCEx_Exported_Types RTCEx Exported Types
* @{
*/
@@ -47,12 +48,12 @@ extern "C" {
typedef struct
{
uint32_t Tamper; /*!< Specifies the Tamper Pin.
- This parameter can be a value of @ref RTCEx_Tamper_Pins_Definitions */
+ This parameter can be a value of @ref RTCEx_Tamper_Pin_Definitions */
uint32_t Trigger; /*!< Specifies the Tamper Trigger.
- This parameter can be a value of @ref RTCEx_Tamper_Trigger_Definitions */
+ This parameter can be a value of @ref RTCEx_Tamper_Trigger_Definitions */
-#if defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) || defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
+#if defined(RTC_TAFCR_TAMPFLT)
uint32_t Filter; /*!< Specifies the RTC Filter Tamper.
This parameter can be a value of @ref RTCEx_Tamper_Filter_Definitions */
@@ -64,238 +65,142 @@ typedef struct
uint32_t TamperPullUp; /*!< Specifies the Tamper PullUp .
This parameter can be a value of @ref RTCEx_Tamper_Pull_Up_Definitions */
+#endif /* RTC_TAFCR_TAMPFLT */
+#if defined(RTC_TAFCR_TAMPTS)
uint32_t TimeStampOnTamperDetection; /*!< Specifies the TimeStampOnTamperDetection.
This parameter can be a value of @ref RTCEx_Tamper_TimeStampOnTamperDetection_Definitions */
-#endif /* STM32L100xBA || STM32L151xBA || STM32L152xBA || STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
+#endif /* RTC_TAFCR_TAMPTS */
} RTC_TamperTypeDef;
/**
* @}
*/
/* Exported constants --------------------------------------------------------*/
+
/** @defgroup RTCEx_Exported_Constants RTCEx Exported Constants
* @{
*/
-/** @defgroup RTCEx_Output_selection_Definition RTCEx Output Selection Definition
+/** @defgroup RTCEx_Backup_Registers_Definitions RTCEx Backup Registers Definitions
* @{
*/
-#define RTC_TR_RESERVED_MASK (0x007F7F7FU)
-#define RTC_DR_RESERVED_MASK (0x00FFFF3FU)
-#define RTC_INIT_MASK (0xFFFFFFFFU)
-#define RTC_RSF_MASK (0xFFFFFF5FU)
-
-#if defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) || defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
-#define RTC_FLAGS_MASK ((uint32_t)(RTC_FLAG_ALRAWF | RTC_FLAG_ALRBWF | RTC_FLAG_WUTWF | \
- RTC_FLAG_SHPF | RTC_FLAG_INITS | RTC_FLAG_RSF | \
- RTC_FLAG_INITF | RTC_FLAG_ALRAF | RTC_FLAG_ALRBF | \
- RTC_FLAG_WUTF | RTC_FLAG_TSF | RTC_FLAG_TSOVF | \
- RTC_FLAG_TAMP1F | RTC_FLAG_TAMP2F | RTC_FLAG_TAMP3F | \
- RTC_FLAG_RECALPF))
-#else
-#define RTC_FLAGS_MASK ((uint32_t)(RTC_FLAG_ALRAWF | RTC_FLAG_ALRBWF | RTC_FLAG_WUTWF | \
- RTC_FLAG_SHPF | RTC_FLAG_INITS | RTC_FLAG_RSF | \
- RTC_FLAG_INITF | RTC_FLAG_ALRAF | RTC_FLAG_ALRBF | \
- RTC_FLAG_WUTF | RTC_FLAG_TSF | RTC_FLAG_TSOVF | \
- RTC_FLAG_TAMP1F | \
- RTC_FLAG_RECALPF))
-
-#endif /* STM32L100xBA || STM32L151xBA || STM32L152xBA || STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
+#define RTC_BKP_DR0 0x00000000U
+#define RTC_BKP_DR1 0x00000001U
+#define RTC_BKP_DR2 0x00000002U
+#define RTC_BKP_DR3 0x00000003U
+#define RTC_BKP_DR4 0x00000004U
+#if RTC_BKP_NUMBER > 5U
+#define RTC_BKP_DR5 0x00000005U
+#define RTC_BKP_DR6 0x00000006U
+#define RTC_BKP_DR7 0x00000007U
+#define RTC_BKP_DR8 0x00000008U
+#define RTC_BKP_DR9 0x00000009U
+#define RTC_BKP_DR10 0x0000000AU
+#define RTC_BKP_DR11 0x0000000BU
+#define RTC_BKP_DR12 0x0000000CU
+#define RTC_BKP_DR13 0x0000000DU
+#define RTC_BKP_DR14 0x0000000EU
+#define RTC_BKP_DR15 0x0000000FU
+#if RTC_BKP_NUMBER > 16U
+#define RTC_BKP_DR16 0x00000010U
+#define RTC_BKP_DR17 0x00000011U
+#define RTC_BKP_DR18 0x00000012U
+#define RTC_BKP_DR19 0x00000013U
+#if RTC_BKP_NUMBER > 20U
+#define RTC_BKP_DR20 0x00000014U
+#define RTC_BKP_DR21 0x00000015U
+#define RTC_BKP_DR22 0x00000016U
+#define RTC_BKP_DR23 0x00000017U
+#define RTC_BKP_DR24 0x00000018U
+#define RTC_BKP_DR25 0x00000019U
+#define RTC_BKP_DR26 0x0000001AU
+#define RTC_BKP_DR27 0x0000001BU
+#define RTC_BKP_DR28 0x0000001CU
+#define RTC_BKP_DR29 0x0000001DU
+#define RTC_BKP_DR30 0x0000001EU
+#define RTC_BKP_DR31 0x0000001FU
+#endif /* RTC_BKP_NUMBER > 20U */
+#endif /* RTC_BKP_NUMBER > 16U */
+#endif /* RTC_BKP_NUMBER > 5U */
/**
* @}
*/
-/** @defgroup RTCEx_Backup_Registers_Definition RTCEx Backup Registers Definition
+/** @defgroup RTCEx_Timestamp_Edges_Definitions RTCEx Timestamp Edges Definitions
* @{
*/
-#if defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) || defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
-#define IS_RTC_SYNCH_PREDIV(PREDIV) ((PREDIV) <= 0x7FFFU)
-#elif defined(STM32L100xB) || defined (STM32L151xB) || defined (STM32L152xB)
-#define IS_RTC_SYNCH_PREDIV(PREDIV) ((PREDIV) <= 0x1FFFU)
-#endif /* STM32L100xBA || STM32L151xBA || STM32L152xBA || STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
+#define RTC_TIMESTAMPEDGE_RISING 0x00000000U
+#define RTC_TIMESTAMPEDGE_FALLING RTC_CR_TSEDGE
/**
* @}
*/
-/** @defgroup RTC_Interrupts_Definitions Interrupts Definitions
+/** @defgroup RTCEx_Timestamp_Pin_Selection RTC Timestamp Pin Selection
* @{
*/
-#define RTC_IT_TS ((uint32_t)RTC_CR_TSIE)
-#define RTC_IT_WUT ((uint32_t)RTC_CR_WUTIE)
-#define RTC_IT_ALRB ((uint32_t)RTC_CR_ALRBIE)
-#define RTC_IT_ALRA ((uint32_t)RTC_CR_ALRAIE)
-#define RTC_IT_TAMP1 ((uint32_t)(RTC_TAFCR_TAMPIE | RTC_TAFCR_TAMP1E))
-#if defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) || defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
-#define RTC_IT_TAMP2 ((uint32_t)(RTC_TAFCR_TAMPIE | RTC_TAFCR_TAMP2E))
-#define RTC_IT_TAMP3 ((uint32_t)(RTC_TAFCR_TAMPIE | RTC_TAFCR_TAMP3E))
-#endif /* STM32L100xBA || STM32L151xBA || STM32L152xBA || STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
+#define RTC_TIMESTAMPPIN_DEFAULT 0x00000000U
/**
* @}
*/
-/** @defgroup RTC_Flags_Definitions Flags Definitions
+/** @defgroup RTCEx_Tamper_Pin_Definitions RTCEx Tamper Pins Definitions
* @{
*/
-#define RTC_FLAG_RECALPF ((uint32_t)RTC_ISR_RECALPF)
-#if defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) || defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
-#define RTC_FLAG_TAMP3F ((uint32_t)RTC_ISR_TAMP3F)
-#define RTC_FLAG_TAMP2F ((uint32_t)RTC_ISR_TAMP2F)
-#endif /* STM32L100xBA || STM32L151xBA || STM32L152xBA || STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
-#define RTC_FLAG_TAMP1F ((uint32_t)RTC_ISR_TAMP1F)
-#define RTC_FLAG_TSOVF ((uint32_t)RTC_ISR_TSOVF)
-#define RTC_FLAG_TSF ((uint32_t)RTC_ISR_TSF)
-#define RTC_FLAG_WUTF ((uint32_t)RTC_ISR_WUTF)
-#define RTC_FLAG_ALRBF ((uint32_t)RTC_ISR_ALRBF)
-#define RTC_FLAG_ALRAF ((uint32_t)RTC_ISR_ALRAF)
-#define RTC_FLAG_INITF ((uint32_t)RTC_ISR_INITF)
-#define RTC_FLAG_RSF ((uint32_t)RTC_ISR_RSF)
-#define RTC_FLAG_INITS ((uint32_t)RTC_ISR_INITS)
-#if defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) || defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
-#define RTC_FLAG_SHPF ((uint32_t)RTC_ISR_SHPF)
-#endif /* STM32L100xBA || STM32L151xBA || STM32L152xBA || STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
-#define RTC_FLAG_WUTWF ((uint32_t)RTC_ISR_WUTWF)
-#define RTC_FLAG_ALRBWF ((uint32_t)RTC_ISR_ALRBWF)
-#define RTC_FLAG_ALRAWF ((uint32_t)RTC_ISR_ALRAWF)
+#define RTC_TAMPER_1 RTC_TAFCR_TAMP1E
+#if defined(RTC_TAMPER2_SUPPORT)
+#define RTC_TAMPER_2 RTC_TAFCR_TAMP2E
+#endif /* RTC_TAMPER2_SUPPORT */
+#if defined(RTC_TAMPER3_SUPPORT)
+#define RTC_TAMPER_3 RTC_TAFCR_TAMP3E
+#endif /* RTC_TAMPER3_SUPPORT */
/**
* @}
*/
-/** @defgroup RTCEx_Output_selection_Definitions Output selection Definitions
+/** @defgroup RTCEx_Tamper_Pin_Selection RTC tamper Pins Selection
* @{
*/
-#define RTC_OUTPUT_DISABLE (0x00000000U)
-#define RTC_OUTPUT_ALARMA (0x00200000U)
-#define RTC_OUTPUT_ALARMB (0x00400000U)
-#define RTC_OUTPUT_WAKEUP (0x00600000U)
-
-#define IS_RTC_OUTPUT(OUTPUT) (((OUTPUT) == RTC_OUTPUT_DISABLE) || \
- ((OUTPUT) == RTC_OUTPUT_ALARMA) || \
- ((OUTPUT) == RTC_OUTPUT_ALARMB) || \
- ((OUTPUT) == RTC_OUTPUT_WAKEUP))
+#define RTC_TAMPERPIN_DEFAULT 0x00000000U
/**
* @}
*/
-/** @defgroup RTCEx_Backup_Registers_Definitions Backup Registers Definitions
+/** @defgroup RTCEx_Tamper_Interrupt_Definitions RTCEx Tamper Interrupt Definitions
* @{
*/
-#if RTC_BKP_NUMBER > 0
-#define RTC_BKP_DR0 (0x00000000U)
-#define RTC_BKP_DR1 (0x00000001U)
-#define RTC_BKP_DR2 (0x00000002U)
-#define RTC_BKP_DR3 (0x00000003U)
-#define RTC_BKP_DR4 (0x00000004U)
-#endif /* RTC_BKP_NUMBER > 0 */
-
-#if RTC_BKP_NUMBER > 5
-#define RTC_BKP_DR5 (0x00000005U)
-#define RTC_BKP_DR6 (0x00000006U)
-#define RTC_BKP_DR7 (0x00000007U)
-#define RTC_BKP_DR8 (0x00000008U)
-#define RTC_BKP_DR9 (0x00000009U)
-#define RTC_BKP_DR10 (0x0000000AU)
-#define RTC_BKP_DR11 (0x0000000BU)
-#define RTC_BKP_DR12 (0x0000000CU)
-#define RTC_BKP_DR13 (0x0000000DU)
-#define RTC_BKP_DR14 (0x0000000EU)
-#define RTC_BKP_DR15 (0x0000000FU)
-#define RTC_BKP_DR16 (0x00000010U)
-#define RTC_BKP_DR17 (0x00000011U)
-#define RTC_BKP_DR18 (0x00000012U)
-#define RTC_BKP_DR19 (0x00000013U)
-#endif /* RTC_BKP_NUMBER > 5 */
-
-#if RTC_BKP_NUMBER > 20
-#define RTC_BKP_DR20 (0x00000014U)
-#define RTC_BKP_DR21 (0x00000015U)
-#define RTC_BKP_DR22 (0x00000016U)
-#define RTC_BKP_DR23 (0x00000017U)
-#define RTC_BKP_DR24 (0x00000018U)
-#define RTC_BKP_DR25 (0x00000019U)
-#define RTC_BKP_DR26 (0x0000001AU)
-#define RTC_BKP_DR27 (0x0000001BU)
-#define RTC_BKP_DR28 (0x0000001CU)
-#define RTC_BKP_DR29 (0x0000001DU)
-#define RTC_BKP_DR30 (0x0000001EU)
-#define RTC_BKP_DR31 (0x0000001FU)
-#endif /* RTC_BKP_NUMBER > 20 */
-
-#define IS_RTC_BKP(BKP) ((BKP) < (uint32_t) RTC_BKP_NUMBER)
+#define RTC_IT_TAMP RTC_TAFCR_TAMPIE /*!< Enable global Tamper Interrupt */
/**
* @}
*/
-/** @defgroup RTCEx_Time_Stamp_Edges_Definitions Time Stamp Edges Definitions
+/** @defgroup RTCEx_Tamper_Trigger_Definitions RTCEx Tamper Triggers Definitions
* @{
*/
-#define RTC_TIMESTAMPEDGE_RISING (0x00000000U)
-#define RTC_TIMESTAMPEDGE_FALLING (0x00000008U)
-
-#define IS_TIMESTAMP_EDGE(EDGE) (((EDGE) == RTC_TIMESTAMPEDGE_RISING) || \
- ((EDGE) == RTC_TIMESTAMPEDGE_FALLING))
-/**
- * @}
- */
-
-/** @defgroup RTCEx_Tamper_Pins_Definitions Tamper Pins Definitions
- * @{
- */
-#define RTC_TAMPER_1 RTC_TAFCR_TAMP1E
-#if defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) || defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
-#define RTC_TAMPER_2 RTC_TAFCR_TAMP2E
-#define RTC_TAMPER_3 RTC_TAFCR_TAMP3E
-#endif /* STM32L100xBA || STM32L151xBA || STM32L152xBA || STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
-
-#if defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) || defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
-#define IS_RTC_TAMPER(TAMPER) (((~(RTC_TAMPER_1|RTC_TAMPER_2|RTC_TAMPER_3) & (TAMPER)) == (uint32_t)RESET) && ((TAMPER) != (uint32_t)RESET))
-#else
-#define IS_RTC_TAMPER(TAMPER) ((TAMPER) == RTC_TAMPER_1)
-#endif /* STM32L100xBA || STM32L151xBA || STM32L152xBA || STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
-/**
- * @}
- */
-
-/** @defgroup RTCEx_Tamper_Trigger_Definitions Tamper Trigger Definitions
- * @{
- */
-#define RTC_TAMPERTRIGGER_RISINGEDGE (0x00000000U)
-#define RTC_TAMPERTRIGGER_FALLINGEDGE (0x00000002U)
-#if defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) || defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
+#define RTC_TAMPERTRIGGER_RISINGEDGE 0x00000000U
+#define RTC_TAMPERTRIGGER_FALLINGEDGE 0x00000002U
+#if defined(RTC_TAFCR_TAMPFLT)
#define RTC_TAMPERTRIGGER_LOWLEVEL RTC_TAMPERTRIGGER_RISINGEDGE
#define RTC_TAMPERTRIGGER_HIGHLEVEL RTC_TAMPERTRIGGER_FALLINGEDGE
-#endif /* STM32L100xBA || STM32L151xBA || STM32L152xBA || STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
-
-#if defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) || defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
-#define IS_RTC_TAMPER_TRIGGER(TRIGGER) (((TRIGGER) == RTC_TAMPERTRIGGER_RISINGEDGE) || \
- ((TRIGGER) == RTC_TAMPERTRIGGER_FALLINGEDGE) || \
- ((TRIGGER) == RTC_TAMPERTRIGGER_LOWLEVEL) || \
- ((TRIGGER) == RTC_TAMPERTRIGGER_HIGHLEVEL))
-#elif defined(STM32L100xB) || defined (STM32L151xB) || defined (STM32L152xB)
-#define IS_RTC_TAMPER_TRIGGER(TRIGGER) (((TRIGGER) == RTC_TAMPERTRIGGER_RISINGEDGE) || \
- ((TRIGGER) == RTC_TAMPERTRIGGER_FALLINGEDGE))
-#endif /* STM32L100xBA || STM32L151xBA || STM32L152xBA || STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
+#endif /* RTC_TAFCR_TAMPFLT */
/**
* @}
*/
-#if defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) || defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
-/** @defgroup RTCEx_Tamper_Filter_Definitions RTCex Tamper Filter Definitions
+#if defined(RTC_TAFCR_TAMPFLT)
+/** @defgroup RTCEx_Tamper_Filter_Definitions RTCEx Tamper Filter Definitions
* @{
*/
-#define RTC_TAMPERFILTER_DISABLE (0x00000000U) /*!< Tamper filter is disabled */
-
-#define RTC_TAMPERFILTER_2SAMPLE (0x00000800U) /*!< Tamper is activated after 2
- consecutive samples at the active level */
-#define RTC_TAMPERFILTER_4SAMPLE (0x00001000U) /*!< Tamper is activated after 4
- consecutive samples at the active level */
-#define RTC_TAMPERFILTER_8SAMPLE (0x00001800U) /*!< Tamper is activated after 8
- consecutive samples at the active level. */
+#define RTC_TAMPERFILTER_DISABLE 0x00000000U /*!< Tamper filter is disabled */
-#define IS_RTC_TAMPER_FILTER(FILTER) (((FILTER) == RTC_TAMPERFILTER_DISABLE) || \
- ((FILTER) == RTC_TAMPERFILTER_2SAMPLE) || \
- ((FILTER) == RTC_TAMPERFILTER_4SAMPLE) || \
- ((FILTER) == RTC_TAMPERFILTER_8SAMPLE))
+#define RTC_TAMPERFILTER_2SAMPLE RTC_TAFCR_TAMPFLT_0 /*!< Tamper is activated after 2
+ consecutive samples at the active level */
+#define RTC_TAMPERFILTER_4SAMPLE RTC_TAFCR_TAMPFLT_1 /*!< Tamper is activated after 4
+ consecutive samples at the active level */
+#define RTC_TAMPERFILTER_8SAMPLE RTC_TAFCR_TAMPFLT /*!< Tamper is activated after 8
+ consecutive samples at the active level */
+#define RTC_TAMPERFILTER_MASK RTC_TAFCR_TAMPFLT /*!< Masking all bits except those of
+ field TAMPFLT */
/**
* @}
*/
@@ -303,31 +208,24 @@ typedef struct
/** @defgroup RTCEx_Tamper_Sampling_Frequencies_Definitions RTCEx Tamper Sampling Frequencies Definitions
* @{
*/
-#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV32768 (0x00000000U) /*!< Each of the tamper inputs are sampled
- with a frequency = RTCCLK / 32768 */
-#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV16384 (0x00000100U) /*!< Each of the tamper inputs are sampled
- with a frequency = RTCCLK / 16384 */
-#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV8192 (0x00000200U) /*!< Each of the tamper inputs are sampled
- with a frequency = RTCCLK / 8192 */
-#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV4096 (0x00000300U) /*!< Each of the tamper inputs are sampled
- with a frequency = RTCCLK / 4096 */
-#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV2048 (0x00000400U) /*!< Each of the tamper inputs are sampled
- with a frequency = RTCCLK / 2048 */
-#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV1024 (0x00000500U) /*!< Each of the tamper inputs are sampled
- with a frequency = RTCCLK / 1024 */
-#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV512 (0x00000600U) /*!< Each of the tamper inputs are sampled
- with a frequency = RTCCLK / 512 */
-#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV256 (0x00000700U) /*!< Each of the tamper inputs are sampled
- with a frequency = RTCCLK / 256 */
-
-#define IS_RTC_TAMPER_SAMPLING_FREQ(FREQ) (((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV32768)|| \
- ((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV16384)|| \
- ((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV8192) || \
- ((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV4096) || \
- ((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV2048) || \
- ((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV1024) || \
- ((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV512) || \
- ((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV256))
+#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV32768 0x00000000U /*!< Each of the tamper inputs are sampled
+ with a frequency = RTCCLK / 32768 */
+#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV16384 RTC_TAFCR_TAMPFREQ_0 /*!< Each of the tamper inputs are sampled
+ with a frequency = RTCCLK / 16384 */
+#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV8192 RTC_TAFCR_TAMPFREQ_1 /*!< Each of the tamper inputs are sampled
+ with a frequency = RTCCLK / 8192 */
+#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV4096 (RTC_TAFCR_TAMPFREQ_0 | RTC_TAFCR_TAMPFREQ_1) /*!< Each of the tamper inputs are sampled
+ with a frequency = RTCCLK / 4096 */
+#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV2048 RTC_TAFCR_TAMPFREQ_2 /*!< Each of the tamper inputs are sampled
+ with a frequency = RTCCLK / 2048 */
+#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV1024 (RTC_TAFCR_TAMPFREQ_0 | RTC_TAFCR_TAMPFREQ_2) /*!< Each of the tamper inputs are sampled
+ with a frequency = RTCCLK / 1024 */
+#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV512 (RTC_TAFCR_TAMPFREQ_1 | RTC_TAFCR_TAMPFREQ_2) /*!< Each of the tamper inputs are sampled
+ with a frequency = RTCCLK / 512 */
+#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV256 RTC_TAFCR_TAMPFREQ /*!< Each of the tamper inputs are sampled
+ with a frequency = RTCCLK / 256 */
+#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_MASK RTC_TAFCR_TAMPFREQ /*!< Masking all bits except those of
+ field TAMPFREQ */
/**
* @}
*/
@@ -335,796 +233,697 @@ typedef struct
/** @defgroup RTCEx_Tamper_Pin_Precharge_Duration_Definitions RTCEx Tamper Pin Precharge Duration Definitions
* @{
*/
-#define RTC_TAMPERPRECHARGEDURATION_1RTCCLK (0x00000000U) /*!< Tamper pins are pre-charged before
- sampling during 1 RTCCLK cycle */
-#define RTC_TAMPERPRECHARGEDURATION_2RTCCLK (0x00002000U) /*!< Tamper pins are pre-charged before
- sampling during 2 RTCCLK cycles */
-#define RTC_TAMPERPRECHARGEDURATION_4RTCCLK (0x00004000U) /*!< Tamper pins are pre-charged before
- sampling during 4 RTCCLK cycles */
-#define RTC_TAMPERPRECHARGEDURATION_8RTCCLK (0x00006000U) /*!< Tamper pins are pre-charged before
- sampling during 8 RTCCLK cycles */
-
-#define IS_RTC_TAMPER_PRECHARGE_DURATION(DURATION) (((DURATION) == RTC_TAMPERPRECHARGEDURATION_1RTCCLK) || \
- ((DURATION) == RTC_TAMPERPRECHARGEDURATION_2RTCCLK) || \
- ((DURATION) == RTC_TAMPERPRECHARGEDURATION_4RTCCLK) || \
- ((DURATION) == RTC_TAMPERPRECHARGEDURATION_8RTCCLK))
+#define RTC_TAMPERPRECHARGEDURATION_1RTCCLK 0x00000000U /*!< Tamper pins are pre-charged before
+ sampling during 1 RTCCLK cycle */
+#define RTC_TAMPERPRECHARGEDURATION_2RTCCLK RTC_TAFCR_TAMPPRCH_0 /*!< Tamper pins are pre-charged before
+ sampling during 2 RTCCLK cycles */
+#define RTC_TAMPERPRECHARGEDURATION_4RTCCLK RTC_TAFCR_TAMPPRCH_1 /*!< Tamper pins are pre-charged before
+ sampling during 4 RTCCLK cycles */
+#define RTC_TAMPERPRECHARGEDURATION_8RTCCLK RTC_TAFCR_TAMPPRCH /*!< Tamper pins are pre-charged before
+ sampling during 8 RTCCLK cycles */
+#define RTC_TAMPERPRECHARGEDURATION_MASK RTC_TAFCR_TAMPPRCH /*!< Masking all bits except those of
+ field TAMPPRCH */
/**
* @}
*/
-/** @defgroup RTCEx_Tamper_TimeStampOnTamperDetection_Definitions TimeStampOnTamperDetection Definitions
+/** @defgroup RTCEx_Tamper_Pull_Up_Definitions RTCEx Tamper Pull Up Definitions
* @{
*/
-#define RTC_TIMESTAMPONTAMPERDETECTION_ENABLE ((uint32_t)RTC_TAFCR_TAMPTS) /*!< TimeStamp on Tamper Detection event saved */
-#define RTC_TIMESTAMPONTAMPERDETECTION_DISABLE (0x00000000U) /*!< TimeStamp on Tamper Detection event is not saved */
-
-#define IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION(DETECTION) (((DETECTION) == RTC_TIMESTAMPONTAMPERDETECTION_ENABLE) || \
- ((DETECTION) == RTC_TIMESTAMPONTAMPERDETECTION_DISABLE))
+#define RTC_TAMPER_PULLUP_ENABLE 0x00000000U /*!< Tamper pins are pre-charged before sampling */
+#define RTC_TAMPER_PULLUP_DISABLE RTC_TAFCR_TAMPPUDIS /*!< Tamper pins are not pre-charged before sampling */
+#define RTC_TAMPER_PULLUP_MASK RTC_TAFCR_TAMPPUDIS /*!< Masking all bits except bit TAMPPUDIS */
/**
* @}
*/
+#endif /* RTC_TAFCR_TAMPFLT */
-/** @defgroup RTCEx_Tamper_Pull_Up_Definitions Tamper Pull-Up Definitions
+#if defined(RTC_TAFCR_TAMPTS)
+/** @defgroup RTCEx_Tamper_TimeStampOnTamperDetection_Definitions RTCEx Tamper TimeStamp On Tamper Detection Definitions
* @{
*/
-#define RTC_TAMPER_PULLUP_ENABLE (0x00000000U) /*!< TimeStamp on Tamper Detection event saved */
-#define RTC_TAMPER_PULLUP_DISABLE (RTC_TAFCR_TAMPPUDIS) /*!< TimeStamp on Tamper Detection event is not saved */
-
-#define IS_RTC_TAMPER_PULLUP_STATE(STATE) (((STATE) == RTC_TAMPER_PULLUP_ENABLE) || \
- ((STATE) == RTC_TAMPER_PULLUP_DISABLE))
+#define RTC_TIMESTAMPONTAMPERDETECTION_ENABLE RTC_TAFCR_TAMPTS /*!< TimeStamp on Tamper Detection event saved */
+#define RTC_TIMESTAMPONTAMPERDETECTION_DISABLE 0x00000000U /*!< TimeStamp on Tamper Detection event is not saved */
+#define RTC_TIMESTAMPONTAMPERDETECTION_MASK RTC_TAFCR_TAMPTS /*!< Masking all bits except bit TAMPTS */
/**
* @}
*/
-#endif /* STM32L100xBA || STM32L151xBA || STM32L152xBA || STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
+#endif /* RTC_TAFCR_TAMPTS */
-/** @defgroup RTCEx_Wakeup_Timer_Definitions Wakeup Timer Definitions
+/** @defgroup RTCEx_Wakeup_Timer_Definitions RTCEx Wakeup Timer Definitions
* @{
*/
-#define RTC_WAKEUPCLOCK_RTCCLK_DIV16 (0x00000000U)
-#define RTC_WAKEUPCLOCK_RTCCLK_DIV8 (0x00000001U)
-#define RTC_WAKEUPCLOCK_RTCCLK_DIV4 (0x00000002U)
-#define RTC_WAKEUPCLOCK_RTCCLK_DIV2 (0x00000003U)
-#define RTC_WAKEUPCLOCK_CK_SPRE_16BITS (0x00000004U)
-#define RTC_WAKEUPCLOCK_CK_SPRE_17BITS (0x00000006U)
-
-#define IS_RTC_WAKEUP_CLOCK(CLOCK) (((CLOCK) == RTC_WAKEUPCLOCK_RTCCLK_DIV16) || \
- ((CLOCK) == RTC_WAKEUPCLOCK_RTCCLK_DIV8) || \
- ((CLOCK) == RTC_WAKEUPCLOCK_RTCCLK_DIV4) || \
- ((CLOCK) == RTC_WAKEUPCLOCK_RTCCLK_DIV2) || \
- ((CLOCK) == RTC_WAKEUPCLOCK_CK_SPRE_16BITS) || \
- ((CLOCK) == RTC_WAKEUPCLOCK_CK_SPRE_17BITS))
-
-#define IS_RTC_WAKEUP_COUNTER(COUNTER) ((COUNTER) <= 0xFFFF)
+#define RTC_WAKEUPCLOCK_RTCCLK_DIV16 0x00000000U
+#define RTC_WAKEUPCLOCK_RTCCLK_DIV8 RTC_CR_WUCKSEL_0
+#define RTC_WAKEUPCLOCK_RTCCLK_DIV4 RTC_CR_WUCKSEL_1
+#define RTC_WAKEUPCLOCK_RTCCLK_DIV2 (RTC_CR_WUCKSEL_0 | RTC_CR_WUCKSEL_1)
+#define RTC_WAKEUPCLOCK_CK_SPRE_16BITS RTC_CR_WUCKSEL_2
+#define RTC_WAKEUPCLOCK_CK_SPRE_17BITS (RTC_CR_WUCKSEL_1 | RTC_CR_WUCKSEL_2)
/**
* @}
*/
-/** @defgroup RTCEx_Digital_Calibration_Definitions Digital Calibration Definitions
+/** @defgroup RTCEx_Coarse_Calibration_Definitions RTCEx Coarse Calib Definitions
* @{
*/
-#define RTC_CALIBSIGN_POSITIVE (0x00000000U)
-#define RTC_CALIBSIGN_NEGATIVE (0x00000080U)
-
-#define IS_RTC_CALIB_SIGN(SIGN) (((SIGN) == RTC_CALIBSIGN_POSITIVE) || \
- ((SIGN) == RTC_CALIBSIGN_NEGATIVE))
-
-#define IS_RTC_CALIB_VALUE(VALUE) ((VALUE) < 0x20)
+#define RTC_CALIBSIGN_POSITIVE 0x00000000U
+#define RTC_CALIBSIGN_NEGATIVE RTC_CALIBR_DCS
/**
* @}
*/
-/** @defgroup RTCEx_Smooth_Calib_Period_Definitions Smooth Calib Period Definitions
+#if defined(RTC_SMOOTHCALIB_SUPPORT)
+/** @defgroup RTCEx_Smooth_calib_period_Definitions RTCEx Smooth Calib Period Definitions
* @{
*/
-#define RTC_SMOOTHCALIB_PERIOD_32SEC (0x00000000U) /*!< If RTCCLK = 32768 Hz, Smooth calibation
- period is 32s, else 2exp20 RTCCLK seconds */
-#define RTC_SMOOTHCALIB_PERIOD_16SEC (0x00002000U) /*!< If RTCCLK = 32768 Hz, Smooth calibation
- period is 16s, else 2exp19 RTCCLK seconds */
-#define RTC_SMOOTHCALIB_PERIOD_8SEC (0x00004000U) /*!< If RTCCLK = 32768 Hz, Smooth calibation
- period is 8s, else 2exp18 RTCCLK seconds */
-
-#define IS_RTC_SMOOTH_CALIB_PERIOD(PERIOD) (((PERIOD) == RTC_SMOOTHCALIB_PERIOD_32SEC) || \
- ((PERIOD) == RTC_SMOOTHCALIB_PERIOD_16SEC) || \
- ((PERIOD) == RTC_SMOOTHCALIB_PERIOD_8SEC))
-/**
- * @}
- */
-
-/** @defgroup RTCEx_Smooth_Calib_Plus_Pulses_Definitions Smooth Calib Plus Pulses Definitions
- * @{
- */
-#define RTC_SMOOTHCALIB_PLUSPULSES_SET (0x00008000U) /*!< The number of RTCCLK pulses added
- during a X -second window = Y - CALM[8:0]
- with Y = 512, 256, 128 when X = 32, 16, 8 */
-#define RTC_SMOOTHCALIB_PLUSPULSES_RESET (0x00000000U) /*!< The number of RTCCLK pulses subbstited
- during a 32-second window = CALM[8:0] */
-
-#define IS_RTC_SMOOTH_CALIB_PLUS(PLUS) (((PLUS) == RTC_SMOOTHCALIB_PLUSPULSES_SET) || \
- ((PLUS) == RTC_SMOOTHCALIB_PLUSPULSES_RESET))
+#define RTC_SMOOTHCALIB_PERIOD_32SEC 0x00000000U /*!< If RTCCLK = 32768 Hz, smooth calibration
+ period is 32s, otherwise 2^20 RTCCLK pulses */
+#define RTC_SMOOTHCALIB_PERIOD_16SEC RTC_CALR_CALW16 /*!< If RTCCLK = 32768 Hz, smooth calibration
+ period is 16s, otherwise 2^19 RTCCLK pulses */
+#define RTC_SMOOTHCALIB_PERIOD_8SEC RTC_CALR_CALW8 /*!< If RTCCLK = 32768 Hz, smooth calibration
+ period is 8s, otherwise 2^18 RTCCLK pulses */
/**
* @}
*/
-/** @defgroup RTCEx_Smooth_Calib_Minus_Pulses_Definitions Smooth Calib Minus Pulses Definitions
+/** @defgroup RTCEx_Smooth_calib_Plus_pulses_Definitions RTCEx Smooth Calib Plus Pulses Definitions
* @{
*/
-#define IS_RTC_SMOOTH_CALIB_MINUS(VALUE) ((VALUE) <= 0x000001FFU)
+#define RTC_SMOOTHCALIB_PLUSPULSES_SET RTC_CALR_CALP /*!< The number of RTCCLK pulses added
+ during a X -second window = Y - CALM[8:0]
+ with Y = 512, 256, 128 when X = 32, 16, 8 */
+#define RTC_SMOOTHCALIB_PLUSPULSES_RESET 0x00000000U /*!< The number of RTCCLK pulses subbstited
+ during a 32-second window = CALM[8:0] */
/**
* @}
*/
+#endif /* RTC_SMOOTHCALIB_SUPPORT */
-/** @defgroup RTCEx_Add_1_Second_Parameter_Definitions Add 1 Second Parameter Definitions
+#if defined(RTC_SUBSECOND_SUPPORT)
+/** @defgroup RTCEx_Add_1_Second_Parameter_Definitions RTCEx Add 1 Second Parameter Definitions
* @{
*/
-#define RTC_SHIFTADD1S_RESET (0x00000000U)
-#define RTC_SHIFTADD1S_SET (0x80000000U)
-
-#define IS_RTC_SHIFT_ADD1S(SEL) (((SEL) == RTC_SHIFTADD1S_RESET) || \
- ((SEL) == RTC_SHIFTADD1S_SET))
+#define RTC_SHIFTADD1S_RESET 0x00000000U
+#define RTC_SHIFTADD1S_SET RTC_SHIFTR_ADD1S
/**
* @}
*/
+#endif /* RTC_SUBSECOND_SUPPORT */
-/** @defgroup RTCEx_Substract_Fraction_Of_Second_Value Substract Fraction Of Second Value
+#if defined(RTC_CR_COSEL)
+/** @defgroup RTCEx_Calib_Output_selection_Definitions RTCEx Calib Output Selection Definitions
* @{
*/
-#define IS_RTC_SHIFT_SUBFS(FS) ((FS) <= 0x00007FFFU)
+#define RTC_CALIBOUTPUT_512HZ 0x00000000U
+#define RTC_CALIBOUTPUT_1HZ RTC_CR_COSEL
/**
* @}
*/
+#endif /* RTC_CR_COSEL */
-/** @defgroup RTCEx_Calib_Output_Selection_Definitions Calib Output Selection Definitions
- * @{
- */
-#define RTC_CALIBOUTPUT_512HZ (0x00000000U)
-#define RTC_CALIBOUTPUT_1HZ (0x00080000U)
-
-#define IS_RTC_CALIB_OUTPUT(OUTPUT) (((OUTPUT) == RTC_CALIBOUTPUT_512HZ) || \
- ((OUTPUT) == RTC_CALIBOUTPUT_1HZ))
/**
* @}
*/
-#if defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) || defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
-/** @defgroup RTC_Alarm_Sub_Seconds_Value Alarm Sub Seconds Value
- * @{
- */
-#define IS_RTC_ALARM_SUB_SECOND_VALUE(VALUE) ((VALUE) <= 0x00007FFFU)
-/**
- * @}
- */
+/* Exported macros -----------------------------------------------------------*/
-/** @defgroup RTC_Alarm_Sub_Seconds_Masks_Definitions Alarm Sub Seconds Masks Definitions
+/** @defgroup RTCEx_Exported_Macros RTCEx Exported Macros
* @{
*/
-#define RTC_ALARMSUBSECONDMASK_ALL (0x00000000U) /*!< All Alarm SS fields are masked.
- There is no comparison on sub seconds
- for Alarm */
-#define RTC_ALARMSUBSECONDMASK_SS14_1 (0x01000000U) /*!< SS[14:1] are don't care in Alarm
- comparison. Only SS[0] is compared. */
-#define RTC_ALARMSUBSECONDMASK_SS14_2 (0x02000000U) /*!< SS[14:2] are don't care in Alarm
- comparison. Only SS[1:0] are compared */
-#define RTC_ALARMSUBSECONDMASK_SS14_3 (0x03000000U) /*!< SS[14:3] are don't care in Alarm
- comparison. Only SS[2:0] are compared */
-#define RTC_ALARMSUBSECONDMASK_SS14_4 (0x04000000U) /*!< SS[14:4] are don't care in Alarm
- comparison. Only SS[3:0] are compared */
-#define RTC_ALARMSUBSECONDMASK_SS14_5 (0x05000000U) /*!< SS[14:5] are don't care in Alarm
- comparison. Only SS[4:0] are compared */
-#define RTC_ALARMSUBSECONDMASK_SS14_6 (0x06000000U) /*!< SS[14:6] are don't care in Alarm
- comparison. Only SS[5:0] are compared */
-#define RTC_ALARMSUBSECONDMASK_SS14_7 (0x07000000U) /*!< SS[14:7] are don't care in Alarm
- comparison. Only SS[6:0] are compared */
-#define RTC_ALARMSUBSECONDMASK_SS14_8 (0x08000000U) /*!< SS[14:8] are don't care in Alarm
- comparison. Only SS[7:0] are compared */
-#define RTC_ALARMSUBSECONDMASK_SS14_9 (0x09000000U) /*!< SS[14:9] are don't care in Alarm
- comparison. Only SS[8:0] are compared */
-#define RTC_ALARMSUBSECONDMASK_SS14_10 (0x0A000000U) /*!< SS[14:10] are don't care in Alarm
- comparison. Only SS[9:0] are compared */
-#define RTC_ALARMSUBSECONDMASK_SS14_11 (0x0B000000U) /*!< SS[14:11] are don't care in Alarm
- comparison. Only SS[10:0] are compared */
-#define RTC_ALARMSUBSECONDMASK_SS14_12 (0x0C000000U) /*!< SS[14:12] are don't care in Alarm
- comparison.Only SS[11:0] are compared */
-#define RTC_ALARMSUBSECONDMASK_SS14_13 (0x0D000000U) /*!< SS[14:13] are don't care in Alarm
- comparison. Only SS[12:0] are compared */
-#define RTC_ALARMSUBSECONDMASK_SS14 (0x0E000000U) /*!< SS[14] is don't care in Alarm
- comparison.Only SS[13:0] are compared */
-#define RTC_ALARMSUBSECONDMASK_NONE (0x0F000000U) /*!< SS[14:0] are compared and must match
- to activate alarm. */
-
-#define IS_RTC_ALARM_SUB_SECOND_MASK(MASK) (((MASK) == RTC_ALARMSUBSECONDMASK_ALL) || \
- ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_1) || \
- ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_2) || \
- ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_3) || \
- ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_4) || \
- ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_5) || \
- ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_6) || \
- ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_7) || \
- ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_8) || \
- ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_9) || \
- ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_10) || \
- ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_11) || \
- ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_12) || \
- ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_13) || \
- ((MASK) == RTC_ALARMSUBSECONDMASK_SS14) || \
- ((MASK) == RTC_ALARMSUBSECONDMASK_NONE))
-/**
- * @}
- */
-#endif /* STM32L100xBA || STM32L151xBA || STM32L152xBA || STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
-/**
- * @}
- */
+/* ---------------------------------WAKEUPTIMER-------------------------------*/
-/* Exported macros -----------------------------------------------------------*/
-/** @defgroup RTCEx_Exported_Macros RTCEx Exported Macros
+/** @defgroup RTCEx_WakeUp_Timer RTCEx WakeUp Timer
* @{
*/
-/* ---------------------------------WAKEUPTIMER---------------------------------*/
-/** @defgroup RTCEx_WakeUp_Timer RTC WakeUp Timer
- * @{
- */
/**
- * @brief Enable the RTC WakeUp Timer peripheral.
+ * @brief Enable the RTC WakeUp Timer peripheral.
* @param __HANDLE__ specifies the RTC handle.
* @retval None
*/
#define __HAL_RTC_WAKEUPTIMER_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_WUTE))
/**
- * @brief Enable the RTC TimeStamp peripheral.
+ * @brief Disable the RTC Wakeup Timer peripheral.
* @param __HANDLE__ specifies the RTC handle.
* @retval None
*/
-#define __HAL_RTC_TIMESTAMP_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_TSE))
+#define __HAL_RTC_WAKEUPTIMER_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_WUTE))
/**
- * @brief Disable the RTC WakeUp Timer peripheral.
+ * @brief Enable the RTC Wakeup Timer interrupt.
* @param __HANDLE__ specifies the RTC handle.
+ * @param __INTERRUPT__ specifies the RTC Wakeup Timer interrupt sources to be enabled or disabled.
+ * This parameter can be:
+ * @arg RTC_IT_WUT: Wakeup Timer interrupt
* @retval None
*/
-#define __HAL_RTC_WAKEUPTIMER_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_WUTE))
+#define __HAL_RTC_WAKEUPTIMER_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= (__INTERRUPT__))
/**
- * @brief Disable the RTC TimeStamp peripheral.
+ * @brief Disable the RTC Wakeup Timer interrupt.
* @param __HANDLE__ specifies the RTC handle.
+ * @param __INTERRUPT__ specifies the RTC Wakeup Timer interrupt sources to be enabled or disabled.
+ * This parameter can be:
+ * @arg RTC_IT_WUT: Wakeup Timer interrupt
* @retval None
*/
-#define __HAL_RTC_TIMESTAMP_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_TSE))
+#define __HAL_RTC_WAKEUPTIMER_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__))
/**
- * @brief Enable the Coarse calibration process.
+ * @brief Check whether the specified RTC Wakeup Timer interrupt has occurred or not.
* @param __HANDLE__ specifies the RTC handle.
+ * @param __INTERRUPT__ specifies the RTC Wakeup Timer interrupt to check.
+ * This parameter can be:
+ * @arg RTC_IT_WUT: Wakeup Timer interrupt
* @retval None
*/
-#define __HAL_RTC_COARSE_CALIB_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_DCE))
+#define __HAL_RTC_WAKEUPTIMER_GET_IT(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->ISR) & ((__INTERRUPT__) >> 4U)) != 0U) ? 1U : 0U)
/**
- * @brief Disable the Coarse calibration process.
+ * @brief Check whether the specified RTC Wakeup timer interrupt has been enabled or not.
* @param __HANDLE__ specifies the RTC handle.
+ * @param __INTERRUPT__ specifies the RTC Wakeup timer interrupt sources to check.
+ * This parameter can be:
+ * @arg RTC_IT_WUT: WakeUpTimer interrupt
* @retval None
*/
-#define __HAL_RTC_COARSE_CALIB_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_DCE))
+#define __HAL_RTC_WAKEUPTIMER_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->CR) & (__INTERRUPT__)) != 0U) ? 1U : 0U)
/**
- * @brief Enable the RTC calibration output.
+ * @brief Get the selected RTC Wakeup Timer's flag status.
* @param __HANDLE__ specifies the RTC handle.
+ * @param __FLAG__ specifies the RTC Wakeup Timer flag to check.
+ * This parameter can be:
+ * @arg RTC_FLAG_WUTF: Wakeup Timer interrupt flag
+ * @arg RTC_FLAG_WUTWF: Wakeup Timer 'write allowed' flag
* @retval None
*/
-#define __HAL_RTC_CALIBRATION_OUTPUT_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_COE))
+#define __HAL_RTC_WAKEUPTIMER_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != 0U)? 1U : 0U)
/**
- * @brief Disable the calibration output.
+ * @brief Clear the RTC Wakeup timer's pending flags.
* @param __HANDLE__ specifies the RTC handle.
+ * @param __FLAG__ specifies the RTC Wakeup Timer Flag to clear.
+ * This parameter can be:
+ * @arg RTC_FLAG_WUTF: Wakeup Timer interrupt Flag
* @retval None
*/
-#define __HAL_RTC_CALIBRATION_OUTPUT_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_COE))
+#define __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT))
/**
- * @brief Enable the clock reference detection.
- * @param __HANDLE__ specifies the RTC handle.
+ * @brief Enable interrupt on the RTC Wakeup Timer associated EXTI line.
* @retval None
*/
-#define __HAL_RTC_CLOCKREF_DETECTION_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_REFCKON))
+#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT() (EXTI->IMR |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
/**
- * @brief Disable the clock reference detection.
- * @param __HANDLE__ specifies the RTC handle.
+ * @brief Disable interrupt on the RTC Wakeup Timer associated EXTI line.
* @retval None
*/
-#define __HAL_RTC_CLOCKREF_DETECTION_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_REFCKON))
+#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_IT() (EXTI->IMR &= ~RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
/**
- * @brief Enable the RTC TimeStamp interrupt.
- * @param __HANDLE__ specifies the RTC handle.
- * @param __INTERRUPT__ specifies the RTC TimeStamp interrupt sources to be enabled or disabled.
- * This parameter can be:
- * @arg RTC_IT_TS: TimeStamp interrupt
- * @retval None
+ * @brief Enable event on the RTC Wakeup Timer associated EXTI line.
+ * @retval None.
*/
-#define __HAL_RTC_TIMESTAMP_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= (__INTERRUPT__))
+#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_EVENT() (EXTI->EMR |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
/**
- * @brief Enable the RTC WakeUpTimer interrupt.
- * @param __HANDLE__ specifies the RTC handle.
- * @param __INTERRUPT__ specifies the RTC WakeUpTimer interrupt sources to be enabled or disabled.
- * This parameter can be:
- * @arg RTC_IT_WUT: WakeUpTimer A interrupt
- * @retval None
+ * @brief Disable event on the RTC Wakeup Timer associated EXTI line.
+ * @retval None.
*/
-#define __HAL_RTC_WAKEUPTIMER_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= (__INTERRUPT__))
+#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
/**
- * @brief Disable the RTC TimeStamp interrupt.
- * @param __HANDLE__ specifies the RTC handle.
- * @param __INTERRUPT__ specifies the RTC TimeStamp interrupt sources to be enabled or disabled.
- * This parameter can be:
- * @arg RTC_IT_TS: TimeStamp interrupt
- * @retval None
+ * @brief Enable falling edge trigger on the RTC Wakeup Timer associated EXTI line.
+ * @retval None.
*/
-#define __HAL_RTC_TIMESTAMP_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__))
+#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_FALLING_EDGE() (EXTI->FTSR |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
/**
- * @brief Disable the RTC WakeUpTimer interrupt.
- * @param __HANDLE__ specifies the RTC handle.
- * @param __INTERRUPT__ specifies the RTC WakeUpTimer interrupt sources to be enabled or disabled.
- * This parameter can be:
- * @arg RTC_IT_WUT: WakeUpTimer A interrupt
- * @retval None
+ * @brief Disable falling edge trigger on the RTC Wakeup Timer associated EXTI line.
+ * @retval None.
*/
-#define __HAL_RTC_WAKEUPTIMER_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__))
+#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_FALLING_EDGE() (EXTI->FTSR &= ~RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
/**
- * @brief Enable the RTC Tamper1 input detection.
- * @param __HANDLE__ specifies the RTC handle.
- * @retval None
+ * @brief Enable rising edge trigger on the RTC Wakeup Timer associated EXTI line.
+ * @retval None.
*/
-#define __HAL_RTC_TAMPER1_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->TAFCR, RTC_TAFCR_TAMP1E)
+#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE() (EXTI->RTSR |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
/**
- * @brief Disable the RTC Tamper1 input detection.
- * @param __HANDLE__ specifies the RTC handle.
- * @retval None
+ * @brief Disable rising edge trigger on the RTC Wakeup Timer associated EXTI line.
+ * @retval None.
*/
-#define __HAL_RTC_TAMPER1_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->TAFCR, RTC_TAFCR_TAMP1E)
+#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE() (EXTI->RTSR &= ~RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
-#if defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) || defined(STM32L100xC)\
- || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined(STM32L151xCA)\
- || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA)\
- || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
/**
- * @brief Enable the RTC Tamper2 input detection.
- * @param __HANDLE__ specifies the RTC handle.
- * @retval None
+ * @brief Enable rising & falling edge trigger on the RTC Wakeup Timer associated EXTI line.
+ * @retval None.
*/
-#define __HAL_RTC_TAMPER2_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->TAFCR, RTC_TAFCR_TAMP2E)
+#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_FALLING_EDGE() do { \
+ __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE(); \
+ __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_FALLING_EDGE(); \
+ } while(0U)
/**
- * @brief Disable the RTC Tamper2 input detection.
- * @param __HANDLE__ specifies the RTC handle.
- * @retval None
+ * @brief Disable rising & falling edge trigger on the RTC Wakeup Timer associated EXTI line.
+ * This parameter can be:
+ * @retval None.
*/
-#define __HAL_RTC_TAMPER2_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->TAFCR, RTC_TAFCR_TAMP2E)
+#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_RISING_FALLING_EDGE() do { \
+ __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE(); \
+ __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_FALLING_EDGE(); \
+ } while(0U)
/**
- * @brief Enable the RTC Tamper3 input detection.
- * @param __HANDLE__ specifies the RTC handle.
- * @retval None
+ * @brief Check whether the RTC Wakeup Timer associated EXTI line interrupt flag is set or not.
+ * @retval Line Status.
+ */
+#define __HAL_RTC_WAKEUPTIMER_EXTI_GET_FLAG() (EXTI->PR & RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
+
+/**
+ * @brief Clear the RTC Wakeup Timer associated EXTI line flag.
+ * @retval None.
*/
-#define __HAL_RTC_TAMPER3_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->TAFCR, RTC_TAFCR_TAMP3E)
+#define __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG() (EXTI->PR = RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
/**
- * @brief Disable the RTC Tamper3 input detection.
+ * @brief Generate a Software interrupt on the RTC Wakeup Timer associated EXTI line.
+ * @retval None.
+ */
+#define __HAL_RTC_WAKEUPTIMER_EXTI_GENERATE_SWIT() (EXTI->SWIER |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
+
+/**
+ * @}
+ */
+
+/* ---------------------------------TIMESTAMP---------------------------------*/
+
+/** @defgroup RTCEx_Timestamp RTCEx Timestamp
+ * @{
+ */
+
+/**
+ * @brief Enable the RTC Timestamp peripheral.
* @param __HANDLE__ specifies the RTC handle.
* @retval None
*/
-#define __HAL_RTC_TAMPER3_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->TAFCR, RTC_TAFCR_TAMP3E)
-
+#define __HAL_RTC_TIMESTAMP_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_TSE))
/**
- * @brief Check whether the specified RTC Tamper interrupt has occurred or not.
+ * @brief Disable the RTC Timestamp peripheral.
* @param __HANDLE__ specifies the RTC handle.
- * @param __INTERRUPT__ specifies the RTC Tamper interrupt to check.
- * This parameter can be:
- * @arg RTC_IT_TAMP1: Tamper1 interrupt
- * @arg RTC_IT_TAMP2: Tamper2 interrupt
- * @arg RTC_IT_TAMP3: Tamper3 interrupt
* @retval None
*/
-#define __HAL_RTC_TAMPER_GET_IT(__HANDLE__, __INTERRUPT__) (((__INTERRUPT__) == RTC_IT_TAMP1) ? (((((__HANDLE__)->Instance->ISR) & RTC_ISR_TAMP1F) != RESET) ? SET : RESET) : \
- ((__INTERRUPT__) == RTC_IT_TAMP2) ? (((((__HANDLE__)->Instance->ISR) & RTC_ISR_TAMP2F) != RESET) ? SET : RESET) : \
- (((((__HANDLE__)->Instance->ISR) & RTC_ISR_TAMP3F) != RESET) ? SET : RESET))
-#else
+#define __HAL_RTC_TIMESTAMP_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_TSE))
+
/**
- * @brief Check whether the specified RTC Tamper interrupt has occurred or not.
+ * @brief Enable the RTC Timestamp interrupt.
* @param __HANDLE__ specifies the RTC handle.
- * @param __INTERRUPT__ specifies the RTC Tamper interrupt to check.
+ * @param __INTERRUPT__ specifies the RTC Timestamp interrupt sources to be enabled or disabled.
* This parameter can be:
- * @arg RTC_IT_TAMP1: Tamper1 interrupt
+ * @arg RTC_IT_TS: TimeStamp interrupt
* @retval None
*/
-#define __HAL_RTC_TAMPER_GET_IT(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->ISR) & RTC_ISR_TAMP1F) != RESET) ? SET : RESET)
-
-#endif
+#define __HAL_RTC_TIMESTAMP_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= (__INTERRUPT__))
/**
- * @brief Enable the RTC Tamper interrupt.
+ * @brief Disable the RTC Timestamp interrupt.
* @param __HANDLE__ specifies the RTC handle.
- * @param __INTERRUPT__ specifies the RTC Tamper interrupt sources to be enabled
- * This parameter can be any combination of the following values:
- * @arg RTC_IT_TAMP1: Tamper1 interrupt
- * @arg RTC_IT_TAMP2: Tamper2 interrupt (*)
- * @arg RTC_IT_TAMP3: Tamper3 interrupt (*)
- * @note (*) Available only on devices STM32L100xBA, STM32L151xBA, STM32L152xBA, STM32L100xC,
- * STM32L151xC, STM32L152xC, STM32L162xC, STM32L151xCA, STM32L151xD, STM32L152xCA,
- * STM32L152xD, STM32L162xCA, STM32L162xD, STM32L151xE, STM32L152xE, STM32L162xE
- * STM32L151xDX, STM32L152xDX, STM32L162xDX
+ * @param __INTERRUPT__ specifies the RTC Timestamp interrupt sources to be enabled or disabled.
+ * This parameter can be:
+ * @arg RTC_IT_TS: TimeStamp interrupt
* @retval None
*/
-#define __HAL_RTC_TAMPER_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT(((__HANDLE__)->Instance->TAFCR), RTC_TAFCR_TAMPIE)
+#define __HAL_RTC_TIMESTAMP_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__))
/**
- * @brief Disable the RTC Tamper interrupt.
+ * @brief Check whether the specified RTC Timestamp interrupt has occurred or not.
* @param __HANDLE__ specifies the RTC handle.
- * @param __INTERRUPT__ specifies the RTC Tamper interrupt sources to be disabled.
- * This parameter can be any combination of the following values:
- * @arg RTC_IT_TAMP1: Tamper1 interrupt
- * @arg RTC_IT_TAMP2: Tamper2 interrupt (*)
- * @arg RTC_IT_TAMP3: Tamper3 interrupt (*)
- * @note (*) Available only on devices STM32L100xBA, STM32L151xBA, STM32L152xBA, STM32L100xC,
- * STM32L151xC, STM32L152xC, STM32L162xC, STM32L151xCA, STM32L151xD, STM32L152xCA,
- * STM32L152xD, STM32L162xCA, STM32L162xD, STM32L151xE, STM32L152xE, STM32L162xE
- * STM32L151xDX, STM32L152xDX, STM32L162xDX
+ * @param __INTERRUPT__ specifies the RTC Timestamp interrupt to check.
+ * This parameter can be:
+ * @arg RTC_IT_TS: TimeStamp interrupt
* @retval None
*/
-#define __HAL_RTC_TAMPER_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT(((__HANDLE__)->Instance->TAFCR), RTC_TAFCR_TAMPIE)
+#define __HAL_RTC_TIMESTAMP_GET_IT(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->ISR) & ((__INTERRUPT__) >> 4U)) != 0U) ? 1U : 0U)
/**
- * @brief Check whether the specified RTC Tamper interrupt has been enabled or not.
+ * @brief Check whether the specified RTC Timestamp interrupt has been enabled or not.
* @param __HANDLE__ specifies the RTC handle.
- * @param __INTERRUPT__ specifies the RTC Tamper interrupt source to check.
+ * @param __INTERRUPT__ specifies the RTC Timestamp interrupt source to check.
* This parameter can be:
- * @arg RTC_IT_TAMP1: Tamper1 interrupt
- * @arg RTC_IT_TAMP2: Tamper2 interrupt (*)
- * @arg RTC_IT_TAMP3: Tamper3 interrupt (*)
- * @note (*) Available only on devices STM32L100xBA, STM32L151xBA, STM32L152xBA, STM32L100xC,
- * STM32L151xC, STM32L152xC, STM32L162xC, STM32L151xCA, STM32L151xD, STM32L152xCA,
- * STM32L152xD, STM32L162xCA, STM32L162xD, STM32L151xE, STM32L152xE, STM32L162xE
- * STM32L151xDX, STM32L152xDX, STM32L162xDX
+ * @arg RTC_IT_TS: TimeStamp interrupt
* @retval None
*/
-#define __HAL_RTC_TAMPER_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->TAFCR) & RTC_TAFCR_TAMPIE) != RESET) ? SET : RESET)
+#define __HAL_RTC_TIMESTAMP_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->CR) & (__INTERRUPT__)) != 0U) ? 1U : 0U)
/**
- * @brief Check whether the specified RTC WakeUpTimer interrupt has occurred or not.
+ * @brief Get the selected RTC Timestamp's flag status.
* @param __HANDLE__ specifies the RTC handle.
- * @param __FLAG__ specifies the RTC WakeUpTimer interrupt sources to be enabled or disabled.
+ * @param __FLAG__ specifies the RTC Timestamp flag to check.
* This parameter can be:
- * @arg RTC_IT_WUT: WakeUpTimer A interrupt
+ * @arg RTC_FLAG_TSF: Timestamp interrupt flag
+ * @arg RTC_FLAG_TSOVF: Timestamp overflow flag
* @retval None
*/
-#define __HAL_RTC_WAKEUPTIMER_GET_IT(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & ((__FLAG__)>> 4)) != RESET)? SET : RESET)
+#define __HAL_RTC_TIMESTAMP_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != 0U)? 1U : 0U)
/**
- * @brief Check whether the specified RTC Wake Up timer interrupt has been enabled or not.
+ * @brief Clear the RTC Timestamp's pending flags.
* @param __HANDLE__ specifies the RTC handle.
- * @param __INTERRUPT__ specifies the RTC Wake Up timer interrupt sources to check.
+ * @param __FLAG__ specifies the RTC Timestamp flag to clear.
* This parameter can be:
- * @arg RTC_IT_WUT: WakeUpTimer interrupt
+ * @arg RTC_FLAG_TSF: Timestamp interrupt flag
+ * @arg RTC_FLAG_TSOVF: Timestamp overflow flag
* @retval None
*/
-#define __HAL_RTC_WAKEUPTIMER_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->CR) & (__INTERRUPT__)) != RESET) ? SET : RESET)
+#define __HAL_RTC_TIMESTAMP_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT))
+
+/**
+ * @}
+ */
+
+/* ---------------------------------TAMPER------------------------------------*/
+
+/** @defgroup RTCEx_Tamper RTCEx Tamper
+ * @{
+ */
/**
- * @brief Check whether the specified RTC TimeStamp interrupt has occurred or not.
+ * @brief Enable the RTC Tamper1 input detection.
* @param __HANDLE__ specifies the RTC handle.
- * @param __INTERRUPT__ specifies the RTC TimeStamp interrupt sources to be enabled or disabled.
- * This parameter can be:
- * @arg RTC_IT_TS: TimeStamp interrupt
* @retval None
*/
-#define __HAL_RTC_TIMESTAMP_GET_IT(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->ISR) & ((__INTERRUPT__)>> 4)) != RESET)? SET : RESET)
+#define __HAL_RTC_TAMPER1_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->TAFCR |= (RTC_TAFCR_TAMP1E))
/**
- * @brief Check whether the specified RTC Time Stamp interrupt has been enabled or not.
+ * @brief Disable the RTC Tamper1 input detection.
* @param __HANDLE__ specifies the RTC handle.
- * @param __INTERRUPT__ specifies the RTC Time Stamp interrupt source to check.
- * This parameter can be:
- * @arg RTC_IT_TS: TimeStamp interrupt
* @retval None
*/
-#define __HAL_RTC_TIMESTAMP_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->CR) & (__INTERRUPT__)) != RESET) ? SET : RESET)
+#define __HAL_RTC_TAMPER1_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->TAFCR &= ~(RTC_TAFCR_TAMP1E))
+#if defined(RTC_TAMPER2_SUPPORT)
/**
- * @brief Get the selected RTC TimeStamp's flag status.
+ * @brief Enable the RTC Tamper2 input detection.
* @param __HANDLE__ specifies the RTC handle.
- * @param __FLAG__ specifies the RTC TimeStamp Flag sources to be enabled or disabled.
- * This parameter can be:
- * @arg RTC_FLAG_TSF
- * @arg RTC_FLAG_TSOVF
* @retval None
*/
-#define __HAL_RTC_TIMESTAMP_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != RESET)? SET : RESET)
+#define __HAL_RTC_TAMPER2_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->TAFCR |= (RTC_TAFCR_TAMP2E))
/**
- * @brief Get the selected RTC WakeUpTimer's flag status.
+ * @brief Disable the RTC Tamper2 input detection.
* @param __HANDLE__ specifies the RTC handle.
- * @param __FLAG__ specifies the RTC WakeUpTimer Flag sources to be enabled or disabled.
- * This parameter can be:
- * @arg RTC_FLAG_WUTF
- * @arg RTC_FLAG_WUTWF
* @retval None
*/
-#define __HAL_RTC_WAKEUPTIMER_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != RESET)? SET : RESET)
+#define __HAL_RTC_TAMPER2_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->TAFCR &= ~(RTC_TAFCR_TAMP2E))
+#endif /* RTC_TAMPER2_SUPPORT */
+#if defined(RTC_TAMPER3_SUPPORT)
/**
- * @brief Get the selected RTC Tamper's flag status.
+ * @brief Enable the RTC Tamper3 input detection.
* @param __HANDLE__ specifies the RTC handle.
- * @param __FLAG__ specifies the RTC Tamper Flag sources to be enabled or disabled.
- * This parameter can be:
- * @arg RTC_FLAG_TAMP1F
- * @arg RTC_FLAG_TAMP2F (*)
- * @arg RTC_FLAG_TAMP3F (*)
- * @note (*) Available only on devices STM32L100xBA, STM32L151xBA, STM32L152xBA, STM32L100xC,
- * STM32L151xC, STM32L152xC, STM32L162xC, STM32L151xCA, STM32L151xD, STM32L152xCA,
- * STM32L152xD, STM32L162xCA, STM32L162xD, STM32L151xE, STM32L152xE, STM32L162xE
- * STM32L151xDX, STM32L152xDX, STM32L162xDX
* @retval None
*/
-#define __HAL_RTC_TAMPER_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != RESET)? SET : RESET)
+#define __HAL_RTC_TAMPER3_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->TAFCR |= (RTC_TAFCR_TAMP3E))
-#if defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) || defined(STM32L100xC)\
- || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined(STM32L151xCA)\
- || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA)\
- || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
/**
- * @brief Get the selected RTC shift operation's flag status.
+ * @brief Disable the RTC Tamper3 input detection.
* @param __HANDLE__ specifies the RTC handle.
- * @param __FLAG__ specifies the RTC shift operation Flag is pending or not.
- * This parameter can be:
- * @arg RTC_FLAG_SHPF
* @retval None
*/
-#define __HAL_RTC_SHIFT_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != RESET)? SET : RESET)
-#endif /* STM32L100xBA || STM32L151xBA || STM32L152xBA || STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
+#define __HAL_RTC_TAMPER3_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->TAFCR &= ~(RTC_TAFCR_TAMP3E))
+#endif /* RTC_TAMPER3_SUPPORT */
/**
- * @brief Clear the RTC Time Stamp's pending flags.
+ * @brief Enable the RTC Tamper interrupt.
* @param __HANDLE__ specifies the RTC handle.
- * @param __FLAG__ specifies the RTC Alarm Flag sources to be enabled or disabled.
- * This parameter can be:
- * @arg RTC_FLAG_TSF
+ * @param __INTERRUPT__ specifies the RTC Tamper interrupt sources to be enabled.
+ * This parameter can be any combination of the following values:
+ * @arg RTC_IT_TAMP: Tamper global interrupt
* @retval None
*/
-#define __HAL_RTC_TIMESTAMP_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT))
+#define __HAL_RTC_TAMPER_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->TAFCR |= (__INTERRUPT__))
/**
- * @brief Clear the RTC Tamper's pending flags.
+ * @brief Disable the RTC Tamper interrupt.
* @param __HANDLE__ specifies the RTC handle.
- * @param __FLAG__ specifies the RTC Tamper Flag sources to be enabled or disabled.
- * This parameter can be:
- * @arg RTC_FLAG_TAMP1F
- * @arg RTC_FLAG_TAMP2F (*)
- * @arg RTC_FLAG_TAMP3F (*)
- * @note (*) Available only on devices STM32L100xBA, STM32L151xBA, STM32L152xBA, STM32L100xC,
- * STM32L151xC, STM32L152xC, STM32L162xC, STM32L151xCA, STM32L151xD, STM32L152xCA,
- * STM32L152xD, STM32L162xCA, STM32L162xD, STM32L151xE, STM32L152xE, STM32L162xE
- * STM32L151xDX, STM32L152xDX, STM32L162xDX
+ * @param __INTERRUPT__ specifies the RTC Tamper interrupt sources to be disabled.
+ * This parameter can be any combination of the following values:
+ * @arg RTC_IT_TAMP: Tamper global interrupt
* @retval None
*/
-#define __HAL_RTC_TAMPER_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT))
+#define __HAL_RTC_TAMPER_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->TAFCR &= ~(__INTERRUPT__))
/**
- * @brief Clear the RTC Wake Up timer's pending flags.
+ * @brief Check whether the specified RTC Tamper interrupt has been enabled or not.
* @param __HANDLE__ specifies the RTC handle.
- * @param __FLAG__ specifies the RTC WakeUpTimer Flag to clear.
+ * @param __INTERRUPT__ specifies the RTC Tamper interrupt source to check.
* This parameter can be:
- * @arg RTC_FLAG_WUTF
+ * @arg RTC_IT_TAMP: Tamper global interrupt
* @retval None
*/
-#define __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT))
+#define __HAL_RTC_TAMPER_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->TAFCR) & (__INTERRUPT__)) != 0U) ? 1U : 0U)
/**
- * @brief Enable interrupt on the RTC WakeUp Timer associated Exti line.
+ * @brief Get the selected RTC Tamper's flag status.
+ * @param __HANDLE__ specifies the RTC handle.
+ * @param __FLAG__ specifies the RTC Tamper flag to be checked.
+ * This parameter can be:
+ * @arg RTC_FLAG_TAMP1F: Tamper 1 interrupt flag
+ * @arg RTC_FLAG_TAMP2F: Tamper 2 interrupt flag
+ * @arg RTC_FLAG_TAMP3F: Tamper 3 interrupt flag
+ * @note RTC_FLAG_TAMP2F is not applicable to all devices.
+ * @note RTC_FLAG_TAMP3F is not applicable to all devices.
* @retval None
*/
-#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT() (EXTI->IMR |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
+#define __HAL_RTC_TAMPER_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != 0U)? 1U : 0U)
/**
- * @brief Disable interrupt on the RTC WakeUp Timer associated Exti line.
+ * @brief Clear the RTC Tamper's pending flags.
+ * @param __HANDLE__ specifies the RTC handle.
+ * @param __FLAG__ specifies the RTC Tamper Flag to clear.
+ * This parameter can be:
+ * @arg RTC_FLAG_TAMP1F: Tamper 1 interrupt flag
+ * @arg RTC_FLAG_TAMP2F: Tamper 2 interrupt flag
+ * @arg RTC_FLAG_TAMP3F: Tamper 3 interrupt flag
+ * @note RTC_FLAG_TAMP2F is not applicable to all devices.
+ * @note RTC_FLAG_TAMP3F is not applicable to all devices.
* @retval None
*/
-#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_IT() (EXTI->IMR &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT))
-
+#define __HAL_RTC_TAMPER_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT))
/**
- * @brief Enable event on the RTC WakeUp Timer associated Exti line.
- * @retval None.
+ * @}
*/
-#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_EVENT() (EXTI->EMR |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
-/**
- * @brief Disable event on the RTC WakeUp Timer associated Exti line.
- * @retval None.
+/* --------------------------TAMPER/TIMESTAMP---------------------------------*/
+/** @defgroup RTCEx_Tamper_Timestamp EXTI RTC Tamper Timestamp EXTI
+ * @{
*/
-#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT))
/**
- * @brief Enable falling edge trigger on the RTC WakeUp Timer associated Exti line.
- * @retval None.
+ * @brief Enable interrupt on the RTC Tamper and Timestamp associated EXTI line.
+ * @retval None
*/
-#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_FALLING_EDGE() (EXTI->FTSR |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
+#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT() (EXTI->IMR |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
/**
- * @brief Disable falling edge trigger on the RTC WakeUp Timer associated Exti line.
- * @retval None.
+ * @brief Disable interrupt on the RTC Tamper and Timestamp associated EXTI line.
+ * @retval None
*/
-#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_FALLING_EDGE() (EXTI->FTSR &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT))
+#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_IT() (EXTI->IMR &= ~RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
/**
- * @brief Enable rising edge trigger on the RTC WakeUp Timer associated Exti line.
+ * @brief Enable event on the RTC Tamper and Timestamp associated EXTI line.
* @retval None.
*/
-#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE() (EXTI->RTSR |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
+#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_EVENT() (EXTI->EMR |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
/**
- * @brief Disable rising edge trigger on the RTC WakeUp Timer associated Exti line.
+ * @brief Disable event on the RTC Tamper and Timestamp associated EXTI line.
* @retval None.
*/
-#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE() (EXTI->RTSR &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT))
+#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
/**
- * @brief Enable rising & falling edge trigger on the RTC WakeUp Timer associated Exti line.
+ * @brief Enable falling edge trigger on the RTC Tamper and Timestamp associated EXTI line.
* @retval None.
*/
-#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_FALLING_EDGE() do { __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE();__HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_FALLING_EDGE(); } while(0);
+#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_FALLING_EDGE() (EXTI->FTSR |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
/**
- * @brief Disable rising & falling edge trigger on the RTC WakeUp Timer associated Exti line.
- * This parameter can be:
+ * @brief Disable falling edge trigger on the RTC Tamper and Timestamp associated EXTI line.
* @retval None.
*/
-#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_RISING_FALLING_EDGE() do { __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE();__HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_FALLING_EDGE(); } while(0);
+#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_FALLING_EDGE() (EXTI->FTSR &= ~RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
/**
- * @brief Check whether the RTC WakeUp Timer associated Exti line interrupt flag is set or not.
- * @retval Line Status.
+ * @brief Enable rising edge trigger on the RTC Tamper and Timestamp associated EXTI line.
+ * @retval None.
*/
-#define __HAL_RTC_WAKEUPTIMER_EXTI_GET_FLAG() (EXTI->PR & RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
+#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE() (EXTI->RTSR |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
/**
- * @brief Clear the RTC WakeUp Timer associated Exti line flag.
+ * @brief Disable rising edge trigger on the RTC Tamper and Timestamp associated EXTI line.
* @retval None.
*/
-#define __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG() (EXTI->PR = RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
+#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_RISING_EDGE() (EXTI->RTSR &= ~RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
/**
- * @brief Generate a Software interrupt on the RTC WakeUp Timer associated Exti line.
+ * @brief Enable rising & falling edge trigger on the RTC Tamper and Timestamp associated EXTI line.
* @retval None.
*/
-#define __HAL_RTC_WAKEUPTIMER_EXTI_GENERATE_SWIT() (EXTI->SWIER |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
+#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_FALLING_EDGE() do { \
+ __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE(); \
+ __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_FALLING_EDGE(); \
+ } while(0U)
/**
- * @brief Enable interrupt on the RTC Tamper and Timestamp associated Exti line.
- * @retval None
+ * @brief Disable rising & falling edge trigger on the RTC Tamper and Timestamp associated EXTI line.
+ * This parameter can be:
+ * @retval None.
*/
-#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT() (EXTI->IMR |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
+#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_RISING_FALLING_EDGE() do { \
+ __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_RISING_EDGE(); \
+ __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_FALLING_EDGE(); \
+ } while(0U)
/**
- * @brief Disable interrupt on the RTC Tamper and Timestamp associated Exti line.
- * @retval None
+ * @brief Check whether the RTC Tamper and Timestamp associated EXTI line interrupt flag is set or not.
+ * @retval Line Status.
*/
-#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_IT() (EXTI->IMR &= ~(RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT))
+#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GET_FLAG() (EXTI->PR & RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
/**
- * @brief Enable event on the RTC Tamper and Timestamp associated Exti line.
+ * @brief Clear the RTC Tamper and Timestamp associated EXTI line flag.
* @retval None.
*/
-#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_EVENT() (EXTI->EMR |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
+#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG() (EXTI->PR = RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
/**
- * @brief Disable event on the RTC Tamper and Timestamp associated Exti line.
+ * @brief Generate a Software interrupt on the RTC Tamper and Timestamp associated EXTI line
* @retval None.
*/
-#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT))
-
+#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GENERATE_SWIT() (EXTI->SWIER |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
/**
- * @brief Enable falling edge trigger on the RTC Tamper and Timestamp associated Exti line.
- * @retval None.
+ * @}
*/
-#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_FALLING_EDGE() (EXTI->FTSR |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
-/**
- * @brief Disable falling edge trigger on the RTC Tamper and Timestamp associated Exti line.
- * @retval None.
+/* ------------------------------CALIBRATION----------------------------------*/
+
+/** @defgroup RTCEx_Calibration RTCEx Calibration
+ * @{
*/
-#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_FALLING_EDGE() (EXTI->FTSR &= ~(RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT))
/**
- * @brief Enable rising edge trigger on the RTC Tamper and Timestamp associated Exti line.
- * @retval None.
+ * @brief Enable the Coarse calibration process.
+ * @param __HANDLE__ specifies the RTC handle.
+ * @retval None
*/
-#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE() (EXTI->RTSR |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
+#define __HAL_RTC_COARSE_CALIB_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_DCE))
/**
- * @brief Disable rising edge trigger on the RTC Tamper and Timestamp associated Exti line.
- * @retval None.
+ * @brief Disable the Coarse calibration process.
+ * @param __HANDLE__ specifies the RTC handle.
+ * @retval None
*/
-#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_RISING_EDGE() (EXTI->RTSR &= ~(RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT))
+#define __HAL_RTC_COARSE_CALIB_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_DCE))
/**
- * @brief Enable rising & falling edge trigger on the RTC Tamper and Timestamp associated Exti line.
- * @retval None.
+ * @brief Enable the RTC calibration output.
+ * @param __HANDLE__ specifies the RTC handle.
+ * @retval None
*/
-#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_FALLING_EDGE() do { __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE();__HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_FALLING_EDGE(); } while(0);
+#define __HAL_RTC_CALIBRATION_OUTPUT_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_COE))
/**
- * @brief Disable rising & falling edge trigger on the RTC Tamper and Timestamp associated Exti line.
- * This parameter can be:
- * @retval None.
+ * @brief Disable the calibration output.
+ * @param __HANDLE__ specifies the RTC handle.
+ * @retval None
*/
-#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_RISING_FALLING_EDGE() do { __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_RISING_EDGE();__HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_FALLING_EDGE(); } while(0);
+#define __HAL_RTC_CALIBRATION_OUTPUT_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_COE))
/**
- * @brief Check whether the RTC Tamper and Timestamp associated Exti line interrupt flag is set or not.
- * @retval Line Status.
+ * @brief Enable the clock reference detection.
+ * @param __HANDLE__ specifies the RTC handle.
+ * @retval None
*/
-#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GET_FLAG() (EXTI->PR & RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
+#define __HAL_RTC_CLOCKREF_DETECTION_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_REFCKON))
/**
- * @brief Clear the RTC Tamper and Timestamp associated Exti line flag.
- * @retval None.
+ * @brief Disable the clock reference detection.
+ * @param __HANDLE__ specifies the RTC handle.
+ * @retval None
*/
-#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG() (EXTI->PR = RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
+#define __HAL_RTC_CLOCKREF_DETECTION_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_REFCKON))
+#if defined(RTC_SUBSECOND_SUPPORT)
/**
- * @brief Generate a Software interrupt on the RTC Tamper and Timestamp associated Exti line
- * @retval None.
+ * @brief Get the selected RTC shift operation's flag status.
+ * @param __HANDLE__ specifies the RTC handle.
+ * @param __FLAG__ specifies the RTC shift operation Flag is pending or not.
+ * This parameter can be:
+ * @arg RTC_FLAG_SHPF: Shift pending flag
+ * @retval None
*/
-#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GENERATE_SWIT() (EXTI->SWIER |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
+#define __HAL_RTC_SHIFT_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != 0U)? 1U : 0U)
+/**
+ * @}
+ */
+#endif /* RTC_SUBSECOND_SUPPORT */
/**
* @}
*/
/* Exported functions --------------------------------------------------------*/
+
/** @defgroup RTCEx_Exported_Functions RTCEx Exported Functions
* @{
*/
-/* RTC TimeStamp and Tamper functions *****************************************/
-/** @defgroup RTCEx_Exported_Functions_Group1 Extended RTC TimeStamp and Tamper functions
+/** @addtogroup RTCEx_Exported_Functions_Group1
* @{
*/
-HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp(RTC_HandleTypeDef *hrtc, uint32_t TimeStampEdge);
-HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp_IT(RTC_HandleTypeDef *hrtc, uint32_t TimeStampEdge);
+/* RTC Timestamp and Tamper functions *****************************************/
+HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp(RTC_HandleTypeDef *hrtc, uint32_t RTC_TimeStampEdge);
+HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp_IT(RTC_HandleTypeDef *hrtc, uint32_t RTC_TimeStampEdge);
HAL_StatusTypeDef HAL_RTCEx_DeactivateTimeStamp(RTC_HandleTypeDef *hrtc);
HAL_StatusTypeDef HAL_RTCEx_GetTimeStamp(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTimeStamp, RTC_DateTypeDef *sTimeStampDate, uint32_t Format);
+
HAL_StatusTypeDef HAL_RTCEx_SetTamper(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef *sTamper);
HAL_StatusTypeDef HAL_RTCEx_SetTamper_IT(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef *sTamper);
HAL_StatusTypeDef HAL_RTCEx_DeactivateTamper(RTC_HandleTypeDef *hrtc, uint32_t Tamper);
void HAL_RTCEx_TamperTimeStampIRQHandler(RTC_HandleTypeDef *hrtc);
void HAL_RTCEx_Tamper1EventCallback(RTC_HandleTypeDef *hrtc);
-#if defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) || defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
+#if defined(RTC_TAMPER2_SUPPORT)
void HAL_RTCEx_Tamper2EventCallback(RTC_HandleTypeDef *hrtc);
+#endif /* RTC_TAMPER2_SUPPORT */
+#if defined(RTC_TAMPER3_SUPPORT)
void HAL_RTCEx_Tamper3EventCallback(RTC_HandleTypeDef *hrtc);
-#endif /* STM32L100xBA || STM32L151xBA || STM32L152xBA || STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
+#endif /* RTC_TAMPER3_SUPPORT */
void HAL_RTCEx_TimeStampEventCallback(RTC_HandleTypeDef *hrtc);
HAL_StatusTypeDef HAL_RTCEx_PollForTimeStampEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout);
HAL_StatusTypeDef HAL_RTCEx_PollForTamper1Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout);
-#if defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) || defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
+#if defined(RTC_TAMPER2_SUPPORT)
HAL_StatusTypeDef HAL_RTCEx_PollForTamper2Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout);
+#endif /* RTC_TAMPER2_SUPPORT */
+#if defined(RTC_TAMPER3_SUPPORT)
HAL_StatusTypeDef HAL_RTCEx_PollForTamper3Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout);
-#endif /* STM32L100xBA || STM32L151xBA || STM32L152xBA || STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
+#endif /* RTC_TAMPER3_SUPPORT */
/**
* @}
*/
-/* RTC Wake-up functions ******************************************************/
-/** @defgroup RTCEx_Exported_Functions_Group2 Extended RTC Wake-up functions
+/** @addtogroup RTCEx_Exported_Functions_Group2
* @{
*/
+/* RTC Wakeup functions ******************************************************/
HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer(RTC_HandleTypeDef *hrtc, uint32_t WakeUpCounter, uint32_t WakeUpClock);
HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer_IT(RTC_HandleTypeDef *hrtc, uint32_t WakeUpCounter, uint32_t WakeUpClock);
HAL_StatusTypeDef HAL_RTCEx_DeactivateWakeUpTimer(RTC_HandleTypeDef *hrtc);
@@ -1136,36 +935,42 @@ HAL_StatusTypeDef HAL_RTCEx_PollForWakeUpTimerEvent(RTC_HandleTypeDef *hrtc, uin
* @}
*/
-/* Extended Control functions ************************************************/
-/** @defgroup RTCEx_Exported_Functions_Group3 Extended Peripheral Control functions
+/** @addtogroup RTCEx_Exported_Functions_Group3
* @{
*/
+/* Extended Control functions ************************************************/
void HAL_RTCEx_BKUPWrite(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister, uint32_t Data);
uint32_t HAL_RTCEx_BKUPRead(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister);
HAL_StatusTypeDef HAL_RTCEx_SetCoarseCalib(RTC_HandleTypeDef *hrtc, uint32_t CalibSign, uint32_t Value);
HAL_StatusTypeDef HAL_RTCEx_DeactivateCoarseCalib(RTC_HandleTypeDef *hrtc);
-#if defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) || defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
+#if defined(RTC_SMOOTHCALIB_SUPPORT)
HAL_StatusTypeDef HAL_RTCEx_SetSmoothCalib(RTC_HandleTypeDef *hrtc, uint32_t SmoothCalibPeriod, uint32_t SmoothCalibPlusPulses, uint32_t SmoothCalibMinusPulsesValue);
+#endif /* RTC_SMOOTHCALIB_SUPPORT */
+#if defined(RTC_SUBSECOND_SUPPORT)
HAL_StatusTypeDef HAL_RTCEx_SetSynchroShift(RTC_HandleTypeDef *hrtc, uint32_t ShiftAdd1S, uint32_t ShiftSubFS);
+#endif /* RTC_SUBSECOND_SUPPORT */
+#if defined(RTC_CR_COSEL)
HAL_StatusTypeDef HAL_RTCEx_SetCalibrationOutPut(RTC_HandleTypeDef *hrtc, uint32_t CalibOutput);
-#else
+#else /* RTC_CR_COSEL */
HAL_StatusTypeDef HAL_RTCEx_SetCalibrationOutPut(RTC_HandleTypeDef *hrtc);
-#endif /* STM32L100xBA || STM32L151xBA || STM32L152xBA || STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
+#endif /* RTC_CR_COSEL */
HAL_StatusTypeDef HAL_RTCEx_DeactivateCalibrationOutPut(RTC_HandleTypeDef *hrtc);
HAL_StatusTypeDef HAL_RTCEx_SetRefClock(RTC_HandleTypeDef *hrtc);
HAL_StatusTypeDef HAL_RTCEx_DeactivateRefClock(RTC_HandleTypeDef *hrtc);
+#if defined(RTC_CR_BYPSHAD)
HAL_StatusTypeDef HAL_RTCEx_EnableBypassShadow(RTC_HandleTypeDef *hrtc);
HAL_StatusTypeDef HAL_RTCEx_DisableBypassShadow(RTC_HandleTypeDef *hrtc);
+#endif /* RTC_CR_BYPSHAD */
/**
* @}
*/
-/* Extended RTC features functions *******************************************/
-/** @defgroup RTCEx_Exported_Functions_Group4 Extended features functions
+/** @addtogroup RTCEx_Exported_Functions_Group4
* @{
*/
-void HAL_RTCEx_AlarmBEventCallback(RTC_HandleTypeDef *hrtc);
+/* Extended RTC features functions *******************************************/
+void HAL_RTCEx_AlarmBEventCallback(RTC_HandleTypeDef *hrtc);
HAL_StatusTypeDef HAL_RTCEx_PollForAlarmBEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout);
/**
* @}
@@ -1178,21 +983,154 @@ HAL_StatusTypeDef HAL_RTCEx_PollForAlarmBEvent(RTC_HandleTypeDef *hrtc, uint32_t
/* Private types -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/
+
/** @defgroup RTCEx_Private_Constants RTCEx Private Constants
* @{
*/
-#define RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT (0x00080000U) /*!< External interrupt line 19 Connected to the RTC Tamper and Time Stamp events */
-#define RTC_EXTI_LINE_WAKEUPTIMER_EVENT (0x00100000U) /*!< External interrupt line 20 Connected to the RTC Wakeup event */
+#define RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT EXTI_IMR_MR19 /*!< External interrupt line 19 Connected to the RTC Tamper and Timestamp event */
+#define RTC_EXTI_LINE_WAKEUPTIMER_EVENT EXTI_IMR_MR20 /*!< External interrupt line 20 Connected to the RTC Wakeup event */
+/**
+ * @}
+ */
+/** @defgroup RTCEx_Private_Constants RTCEx Private Constants
+ * @{
+ */
+/* Masks Definition */
+#if defined(RTC_TAMPER3_SUPPORT)
+#if defined(RTC_TAMPER2_SUPPORT)
+#define RTC_TAMPER_ENABLE_BITS_MASK ((uint32_t) (RTC_TAMPER_1 | \
+ RTC_TAMPER_2 | \
+ RTC_TAMPER_3))
+
+#define RTC_TAMPER_FLAGS_MASK ((uint32_t) (RTC_FLAG_TAMP1F | \
+ RTC_FLAG_TAMP2F | \
+ RTC_FLAG_TAMP3F))
+#else /* RTC_TAMPER2_SUPPORT */
+#define RTC_TAMPER_ENABLE_BITS_MASK ((uint32_t) (RTC_TAMPER_1 | \
+ RTC_TAMPER_3))
+
+#define RTC_TAMPER_FLAGS_MASK ((uint32_t) (RTC_FLAG_TAMP1F | \
+ RTC_FLAG_TAMP3F))
+#endif /* RTC_TAMPER2_SUPPORT */
+#else /* RTC_TAMPER3_SUPPORT */
+#if defined(RTC_TAMPER2_SUPPORT)
+#define RTC_TAMPER_ENABLE_BITS_MASK ((uint32_t) (RTC_TAMPER_1 | \
+ RTC_TAMPER_2))
+
+#define RTC_TAMPER_FLAGS_MASK ((uint32_t) (RTC_FLAG_TAMP1F | \
+ RTC_FLAG_TAMP2F))
+#else /* RTC_TAMPER2_SUPPORT */
+#define RTC_TAMPER_ENABLE_BITS_MASK RTC_TAMPER_1
+
+#define RTC_TAMPER_FLAGS_MASK RTC_FLAG_TAMP1F
+#endif /* RTC_TAMPER2_SUPPORT */
+#endif /* RTC_TAMPER3_SUPPORT */
/**
* @}
*/
/* Private macros ------------------------------------------------------------*/
+
/** @defgroup RTCEx_Private_Macros RTCEx Private Macros
* @{
*/
+/** @defgroup RTCEx_IS_RTC_Definitions Private macros to check input parameters
+ * @{
+ */
+#define IS_RTC_BKP(BKP) ((BKP) < (uint32_t) RTC_BKP_NUMBER)
+
+#define IS_TIMESTAMP_EDGE(EDGE) (((EDGE) == RTC_TIMESTAMPEDGE_RISING) || \
+ ((EDGE) == RTC_TIMESTAMPEDGE_FALLING))
+
+#define IS_RTC_TAMPER(TAMPER) ((((TAMPER) & ((uint32_t)~RTC_TAMPER_ENABLE_BITS_MASK)) == 0x00U) && ((TAMPER) != 0U))
+
+#define IS_RTC_TAMPER_PIN(PIN) ((PIN) == RTC_TAMPERPIN_DEFAULT)
+
+#if defined(RTC_TAFCR_TAMPFLT)
+#define IS_RTC_TAMPER_TRIGGER(TRIGGER) (((TRIGGER) == RTC_TAMPERTRIGGER_RISINGEDGE) || \
+ ((TRIGGER) == RTC_TAMPERTRIGGER_FALLINGEDGE) || \
+ ((TRIGGER) == RTC_TAMPERTRIGGER_LOWLEVEL) || \
+ ((TRIGGER) == RTC_TAMPERTRIGGER_HIGHLEVEL))
+#else /* RTC_TAFCR_TAMPFLT */
+#define IS_RTC_TAMPER_TRIGGER(TRIGGER) (((TRIGGER) == RTC_TAMPERTRIGGER_RISINGEDGE) || \
+ ((TRIGGER) == RTC_TAMPERTRIGGER_FALLINGEDGE))
+#endif /* RTC_TAFCR_TAMPFLT */
+
+#if defined(RTC_TAFCR_TAMPFLT)
+#define IS_RTC_TAMPER_FILTER(FILTER) (((FILTER) == RTC_TAMPERFILTER_DISABLE) || \
+ ((FILTER) == RTC_TAMPERFILTER_2SAMPLE) || \
+ ((FILTER) == RTC_TAMPERFILTER_4SAMPLE) || \
+ ((FILTER) == RTC_TAMPERFILTER_8SAMPLE))
+
+#define IS_RTC_TAMPER_FILTER_CONFIG_CORRECT(FILTER, TRIGGER) \
+ ( ( ((FILTER) != RTC_TAMPERFILTER_DISABLE) \
+ && ( ((TRIGGER) == RTC_TAMPERTRIGGER_LOWLEVEL) \
+ || ((TRIGGER) == RTC_TAMPERTRIGGER_HIGHLEVEL))) \
+ || ( ((FILTER) == RTC_TAMPERFILTER_DISABLE) \
+ && ( ((TRIGGER) == RTC_TAMPERTRIGGER_RISINGEDGE) \
+ || ((TRIGGER) == RTC_TAMPERTRIGGER_FALLINGEDGE))))
+
+#define IS_RTC_TAMPER_SAMPLING_FREQ(FREQ) (((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV32768)|| \
+ ((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV16384)|| \
+ ((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV8192) || \
+ ((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV4096) || \
+ ((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV2048) || \
+ ((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV1024) || \
+ ((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV512) || \
+ ((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV256))
+
+#define IS_RTC_TAMPER_PRECHARGE_DURATION(DURATION) (((DURATION) == RTC_TAMPERPRECHARGEDURATION_1RTCCLK) || \
+ ((DURATION) == RTC_TAMPERPRECHARGEDURATION_2RTCCLK) || \
+ ((DURATION) == RTC_TAMPERPRECHARGEDURATION_4RTCCLK) || \
+ ((DURATION) == RTC_TAMPERPRECHARGEDURATION_8RTCCLK))
+
+#define IS_RTC_TAMPER_PULLUP_STATE(STATE) (((STATE) == RTC_TAMPER_PULLUP_ENABLE) || \
+ ((STATE) == RTC_TAMPER_PULLUP_DISABLE))
+#endif /* RTC_TAFCR_TAMPFLT */
+
+#if defined(RTC_TAFCR_TAMPTS)
+#define IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION(DETECTION) (((DETECTION) == RTC_TIMESTAMPONTAMPERDETECTION_ENABLE) || \
+ ((DETECTION) == RTC_TIMESTAMPONTAMPERDETECTION_DISABLE))
+#endif /* RTC_TAFCR_TAMPTS */
+
+#define IS_RTC_WAKEUP_CLOCK(CLOCK) (((CLOCK) == RTC_WAKEUPCLOCK_RTCCLK_DIV16) || \
+ ((CLOCK) == RTC_WAKEUPCLOCK_RTCCLK_DIV8) || \
+ ((CLOCK) == RTC_WAKEUPCLOCK_RTCCLK_DIV4) || \
+ ((CLOCK) == RTC_WAKEUPCLOCK_RTCCLK_DIV2) || \
+ ((CLOCK) == RTC_WAKEUPCLOCK_CK_SPRE_16BITS) || \
+ ((CLOCK) == RTC_WAKEUPCLOCK_CK_SPRE_17BITS))
+
+#define IS_RTC_WAKEUP_COUNTER(COUNTER) ((COUNTER) <= RTC_WUTR_WUT)
+
+#define IS_RTC_CALIB_SIGN(SIGN) (((SIGN) == RTC_CALIBSIGN_POSITIVE) || \
+ ((SIGN) == RTC_CALIBSIGN_NEGATIVE))
+
+#define IS_RTC_CALIB_VALUE(VALUE) ((VALUE) < 0x20U)
+
+#if defined(RTC_SMOOTHCALIB_SUPPORT)
+#define IS_RTC_SMOOTH_CALIB_PERIOD(PERIOD) (((PERIOD) == RTC_SMOOTHCALIB_PERIOD_32SEC) || \
+ ((PERIOD) == RTC_SMOOTHCALIB_PERIOD_16SEC) || \
+ ((PERIOD) == RTC_SMOOTHCALIB_PERIOD_8SEC))
+
+#define IS_RTC_SMOOTH_CALIB_PLUS(PLUS) (((PLUS) == RTC_SMOOTHCALIB_PLUSPULSES_SET) || \
+ ((PLUS) == RTC_SMOOTHCALIB_PLUSPULSES_RESET))
+
+#define IS_RTC_SMOOTH_CALIB_MINUS(VALUE) ((VALUE) <= RTC_CALR_CALM)
+#endif /* RTC_SMOOTHCALIB_SUPPORT */
+
+#if defined(RTC_SUBSECOND_SUPPORT)
+#define IS_RTC_SHIFT_ADD1S(SEL) (((SEL) == RTC_SHIFTADD1S_RESET) || \
+ ((SEL) == RTC_SHIFTADD1S_SET))
+
+#define IS_RTC_SHIFT_SUBFS(FS) ((FS) <= RTC_SHIFTR_SUBFS)
+#endif /* RTC_SUBSECOND_SUPPORT */
+
+#if defined(RTC_CR_COSEL)
+#define IS_RTC_CALIB_OUTPUT(OUTPUT) (((OUTPUT) == RTC_CALIBOUTPUT_512HZ) || \
+ ((OUTPUT) == RTC_CALIBOUTPUT_1HZ))
+#endif /* RTC_CR_COSEL */
/**
* @}
*/
@@ -1213,6 +1151,4 @@ HAL_StatusTypeDef HAL_RTCEx_PollForAlarmBEvent(RTC_HandleTypeDef *hrtc, uint32_t
}
#endif
-#endif /* __STM32L1xx_HAL_RTC_EX_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+#endif /* STM32L1xx_HAL_RTC_EX_H */
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_sd.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_sd.h
index e2fb83ee26..99b062e870 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_sd.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_sd.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2018 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -757,5 +756,3 @@ HAL_StatusTypeDef HAL_SD_Abort_IT(SD_HandleTypeDef *hsd);
#endif /* STM32L1xx_HAL_SD_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_smartcard.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_smartcard.h
index 3aeb6f8585..6c2dcfbacf 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_smartcard.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_smartcard.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -157,7 +156,7 @@ typedef struct __SMARTCARD_HandleTypeDef
SMARTCARD_InitTypeDef Init; /*!< SmartCard communication parameters */
- uint8_t *pTxBuffPtr; /*!< Pointer to SmartCard Tx transfer Buffer */
+ const uint8_t *pTxBuffPtr; /*!< Pointer to SmartCard Tx transfer Buffer */
uint16_t TxXferSize; /*!< SmartCard Tx Transfer size */
@@ -643,11 +642,11 @@ HAL_StatusTypeDef HAL_SMARTCARD_UnRegisterCallback(SMARTCARD_HandleTypeDef *hsc,
* @{
*/
/* IO operation functions *******************************************************/
-HAL_StatusTypeDef HAL_SMARTCARD_Transmit(SMARTCARD_HandleTypeDef *hsc, uint8_t *pData, uint16_t Size, uint32_t Timeout);
+HAL_StatusTypeDef HAL_SMARTCARD_Transmit(SMARTCARD_HandleTypeDef *hsc, const uint8_t *pData, uint16_t Size, uint32_t Timeout);
HAL_StatusTypeDef HAL_SMARTCARD_Receive(SMARTCARD_HandleTypeDef *hsc, uint8_t *pData, uint16_t Size, uint32_t Timeout);
-HAL_StatusTypeDef HAL_SMARTCARD_Transmit_IT(SMARTCARD_HandleTypeDef *hsc, uint8_t *pData, uint16_t Size);
+HAL_StatusTypeDef HAL_SMARTCARD_Transmit_IT(SMARTCARD_HandleTypeDef *hsc, const uint8_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_SMARTCARD_Receive_IT(SMARTCARD_HandleTypeDef *hsc, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_SMARTCARD_Transmit_DMA(SMARTCARD_HandleTypeDef *hsc, uint8_t *pData, uint16_t Size);
+HAL_StatusTypeDef HAL_SMARTCARD_Transmit_DMA(SMARTCARD_HandleTypeDef *hsc, const uint8_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_SMARTCARD_Receive_DMA(SMARTCARD_HandleTypeDef *hsc, uint8_t *pData, uint16_t Size);
/* Transfer Abort functions */
HAL_StatusTypeDef HAL_SMARTCARD_Abort(SMARTCARD_HandleTypeDef *hsc);
@@ -672,8 +671,8 @@ void HAL_SMARTCARD_AbortReceiveCpltCallback(SMARTCARD_HandleTypeDef *hsc);
* @{
*/
/* Peripheral State functions **************************************************/
-HAL_SMARTCARD_StateTypeDef HAL_SMARTCARD_GetState(SMARTCARD_HandleTypeDef *hsc);
-uint32_t HAL_SMARTCARD_GetError(SMARTCARD_HandleTypeDef *hsc);
+HAL_SMARTCARD_StateTypeDef HAL_SMARTCARD_GetState(const SMARTCARD_HandleTypeDef *hsc);
+uint32_t HAL_SMARTCARD_GetError(const SMARTCARD_HandleTypeDef *hsc);
/**
* @}
*/
@@ -754,4 +753,3 @@ uint32_t HAL_SMARTCARD_GetError(SMARTCARD_HandleTypeDef *hsc);
#endif /* __STM32L1xx_HAL_SMARTCARD_H */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_smbus.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_smbus.h
new file mode 100644
index 0000000000..692d88f28e
--- /dev/null
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_smbus.h
@@ -0,0 +1,721 @@
+/**
+ ******************************************************************************
+ * @file stm32l1xx_hal_smbus.h
+ * @author MCD Application Team
+ * @brief Header file of SMBUS HAL module.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32L1xx_HAL_SMBUS_H
+#define __STM32L1xx_HAL_SMBUS_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32l1xx_hal_def.h"
+
+/** @addtogroup STM32L1xx_HAL_Driver
+ * @{
+ */
+
+/** @addtogroup SMBUS
+ * @{
+ */
+
+/* Exported types ------------------------------------------------------------*/
+/** @defgroup SMBUS_Exported_Types SMBUS Exported Types
+ * @{
+ */
+
+/**
+ * @brief SMBUS Configuration Structure definition
+ */
+typedef struct
+{
+ uint32_t ClockSpeed; /*!< Specifies the clock frequency.
+ This parameter must be set to a value lower than 100kHz */
+
+ uint32_t AnalogFilter; /*!< Specifies if Analog Filter is enable or not.
+ This parameter can be a value of @ref SMBUS_Analog_Filter */
+
+ uint32_t OwnAddress1; /*!< Specifies the first device own address.
+ This parameter can be a 7-bit or 10-bit address. */
+
+ uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected.
+ This parameter can be a value of @ref SMBUS_addressing_mode */
+
+ uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected.
+ This parameter can be a value of @ref SMBUS_dual_addressing_mode */
+
+ uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is
+ selected. This parameter can be a 7-bit address. */
+
+ uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected.
+ This parameter can be a value of @ref SMBUS_general_call_addressing_mode */
+
+ uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected.
+ This parameter can be a value of @ref SMBUS_nostretch_mode */
+
+ uint32_t PacketErrorCheckMode; /*!< Specifies if Packet Error Check mode is selected.
+ This parameter can be a value of @ref SMBUS_packet_error_check_mode */
+
+ uint32_t PeripheralMode; /*!< Specifies which mode of Periphal is selected.
+ This parameter can be a value of @ref SMBUS_peripheral_mode */
+
+} SMBUS_InitTypeDef;
+
+/**
+ * @brief HAL State structure definition
+ * @note HAL SMBUS State value coding follow below described bitmap :
+ * b7-b6 Error information
+ * 00 : No Error
+ * 01 : Abort (Abort user request on going)
+ * 10 : Timeout
+ * 11 : Error
+ * b5 IP initialisation status
+ * 0 : Reset (IP not initialized)
+ * 1 : Init done (IP initialized and ready to use. HAL SMBUS Init function called)
+ * b4 (not used)
+ * x : Should be set to 0
+ * b3
+ * 0 : Ready or Busy (No Listen mode ongoing)
+ * 1 : Listen (IP in Address Listen Mode)
+ * b2 Intrinsic process state
+ * 0 : Ready
+ * 1 : Busy (IP busy with some configuration or internal operations)
+ * b1 Rx state
+ * 0 : Ready (no Rx operation ongoing)
+ * 1 : Busy (Rx operation ongoing)
+ * b0 Tx state
+ * 0 : Ready (no Tx operation ongoing)
+ * 1 : Busy (Tx operation ongoing)
+ */
+typedef enum
+{
+
+ HAL_SMBUS_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */
+ HAL_SMBUS_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use */
+ HAL_SMBUS_STATE_BUSY = 0x24U, /*!< An internal process is ongoing */
+ HAL_SMBUS_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing */
+ HAL_SMBUS_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */
+ HAL_SMBUS_STATE_LISTEN = 0x28U, /*!< Address Listen Mode is ongoing */
+ HAL_SMBUS_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission
+ process is ongoing */
+ HAL_SMBUS_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception
+ process is ongoing */
+ HAL_SMBUS_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */
+ HAL_SMBUS_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */
+ HAL_SMBUS_STATE_ERROR = 0xE0U /*!< Error */
+} HAL_SMBUS_StateTypeDef;
+
+/**
+ * @brief HAL Mode structure definition
+ * @note HAL SMBUS Mode value coding follow below described bitmap :
+ * b7 (not used)
+ * x : Should be set to 0
+ * b6 (not used)
+ * x : Should be set to 0
+ * b5
+ * 0 : None
+ * 1 : Slave (HAL SMBUS communication is in Slave/Device Mode)
+ * b4
+ * 0 : None
+ * 1 : Master (HAL SMBUS communication is in Master/Host Mode)
+ * b3-b2-b1-b0 (not used)
+ * xxxx : Should be set to 0000
+ */
+typedef enum
+{
+ HAL_SMBUS_MODE_NONE = 0x00U, /*!< No SMBUS communication on going */
+ HAL_SMBUS_MODE_MASTER = 0x10U, /*!< SMBUS communication is in Master Mode */
+ HAL_SMBUS_MODE_SLAVE = 0x20U, /*!< SMBUS communication is in Slave Mode */
+
+} HAL_SMBUS_ModeTypeDef;
+
+/**
+ * @brief SMBUS handle Structure definition
+ */
+typedef struct __SMBUS_HandleTypeDef
+{
+ I2C_TypeDef *Instance; /*!< SMBUS registers base address */
+
+ SMBUS_InitTypeDef Init; /*!< SMBUS communication parameters */
+
+ uint8_t *pBuffPtr; /*!< Pointer to SMBUS transfer buffer */
+
+ uint16_t XferSize; /*!< SMBUS transfer size */
+
+ __IO uint16_t XferCount; /*!< SMBUS transfer counter */
+
+ __IO uint32_t XferOptions; /*!< SMBUS transfer options this parameter can
+ be a value of @ref SMBUS_OPTIONS */
+
+ __IO uint32_t PreviousState; /*!< SMBUS communication Previous state and mode
+ context for internal usage */
+
+ HAL_LockTypeDef Lock; /*!< SMBUS locking object */
+
+ __IO HAL_SMBUS_StateTypeDef State; /*!< SMBUS communication state */
+
+ __IO HAL_SMBUS_ModeTypeDef Mode; /*!< SMBUS communication mode */
+
+ __IO uint32_t ErrorCode; /*!< SMBUS Error code */
+
+ __IO uint32_t Devaddress; /*!< SMBUS Target device address */
+
+ __IO uint32_t EventCount; /*!< SMBUS Event counter */
+
+ uint8_t XferPEC; /*!< SMBUS PEC data in reception mode */
+
+#if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)
+ void (* MasterTxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Master Tx Transfer completed callback */
+ void (* MasterRxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Master Rx Transfer completed callback */
+ void (* SlaveTxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Slave Tx Transfer completed callback */
+ void (* SlaveRxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Slave Rx Transfer completed callback */
+ void (* ListenCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Listen Complete callback */
+ void (* MemTxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Memory Tx Transfer completed callback */
+ void (* MemRxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Memory Rx Transfer completed callback */
+ void (* ErrorCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Error callback */
+ void (* AbortCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Abort callback */
+ void (* AddrCallback)(struct __SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< SMBUS Slave Address Match callback */
+ void (* MspInitCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Msp Init callback */
+ void (* MspDeInitCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Msp DeInit callback */
+
+#endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */
+} SMBUS_HandleTypeDef;
+
+#if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)
+/**
+ * @brief HAL SMBUS Callback ID enumeration definition
+ */
+typedef enum
+{
+ HAL_SMBUS_MASTER_TX_COMPLETE_CB_ID = 0x00U, /*!< SMBUS Master Tx Transfer completed callback ID */
+ HAL_SMBUS_MASTER_RX_COMPLETE_CB_ID = 0x01U, /*!< SMBUS Master Rx Transfer completed callback ID */
+ HAL_SMBUS_SLAVE_TX_COMPLETE_CB_ID = 0x02U, /*!< SMBUS Slave Tx Transfer completed callback ID */
+ HAL_SMBUS_SLAVE_RX_COMPLETE_CB_ID = 0x03U, /*!< SMBUS Slave Rx Transfer completed callback ID */
+ HAL_SMBUS_LISTEN_COMPLETE_CB_ID = 0x04U, /*!< SMBUS Listen Complete callback ID */
+ HAL_SMBUS_ERROR_CB_ID = 0x07U, /*!< SMBUS Error callback ID */
+ HAL_SMBUS_ABORT_CB_ID = 0x08U, /*!< SMBUS Abort callback ID */
+ HAL_SMBUS_MSPINIT_CB_ID = 0x09U, /*!< SMBUS Msp Init callback ID */
+ HAL_SMBUS_MSPDEINIT_CB_ID = 0x0AU /*!< SMBUS Msp DeInit callback ID */
+
+} HAL_SMBUS_CallbackIDTypeDef;
+
+/**
+ * @brief HAL SMBUS Callback pointer definition
+ */
+typedef void (*pSMBUS_CallbackTypeDef)(SMBUS_HandleTypeDef *hsmbus); /*!< pointer to an I2C callback function */
+typedef void (*pSMBUS_AddrCallbackTypeDef)(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< pointer to an I2C Address Match callback function */
+
+#endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */
+
+/**
+ * @}
+ */
+
+/* Exported constants --------------------------------------------------------*/
+/** @defgroup SMBUS_Exported_Constants SMBUS Exported Constants
+ * @{
+ */
+
+/** @defgroup SMBUS_Error_Code_definition SMBUS Error Code
+ * @brief SMBUS Error Code
+ * @{
+ */
+#define HAL_SMBUS_ERROR_NONE 0x00000000U /*!< No error */
+#define HAL_SMBUS_ERROR_BERR 0x00000001U /*!< BERR error */
+#define HAL_SMBUS_ERROR_ARLO 0x00000002U /*!< ARLO error */
+#define HAL_SMBUS_ERROR_AF 0x00000004U /*!< AF error */
+#define HAL_SMBUS_ERROR_OVR 0x00000008U /*!< OVR error */
+#define HAL_SMBUS_ERROR_TIMEOUT 0x00000010U /*!< Timeout Error */
+#define HAL_SMBUS_ERROR_ALERT 0x00000020U /*!< Alert error */
+#define HAL_SMBUS_ERROR_PECERR 0x00000040U /*!< PEC error */
+#if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)
+#define HAL_SMBUS_ERROR_INVALID_CALLBACK 0x00000080U /*!< Invalid Callback error */
+#endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */
+
+/**
+ * @}
+ */
+
+/** @defgroup SMBUS_Analog_Filter SMBUS Analog Filter
+ * @{
+ */
+#define SMBUS_ANALOGFILTER_ENABLE 0x00000000U
+#define SMBUS_ANALOGFILTER_DISABLE I2C_FLTR_ANOFF
+/**
+ * @}
+ */
+
+/** @defgroup SMBUS_addressing_mode SMBUS addressing mode
+ * @{
+ */
+#define SMBUS_ADDRESSINGMODE_7BIT 0x00004000U
+#define SMBUS_ADDRESSINGMODE_10BIT (I2C_OAR1_ADDMODE | 0x00004000U)
+/**
+ * @}
+ */
+
+/** @defgroup SMBUS_dual_addressing_mode SMBUS dual addressing mode
+ * @{
+ */
+#define SMBUS_DUALADDRESS_DISABLE 0x00000000U
+#define SMBUS_DUALADDRESS_ENABLE I2C_OAR2_ENDUAL
+/**
+ * @}
+ */
+
+/** @defgroup SMBUS_general_call_addressing_mode SMBUS general call addressing mode
+ * @{
+ */
+#define SMBUS_GENERALCALL_DISABLE 0x00000000U
+#define SMBUS_GENERALCALL_ENABLE I2C_CR1_ENGC
+/**
+ * @}
+ */
+
+/** @defgroup SMBUS_nostretch_mode SMBUS nostretch mode
+ * @{
+ */
+#define SMBUS_NOSTRETCH_DISABLE 0x00000000U
+#define SMBUS_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH
+/**
+ * @}
+ */
+
+/** @defgroup SMBUS_packet_error_check_mode SMBUS packet error check mode
+ * @{
+ */
+#define SMBUS_PEC_DISABLE 0x00000000U
+#define SMBUS_PEC_ENABLE I2C_CR1_ENPEC
+/**
+ * @}
+ */
+
+/** @defgroup SMBUS_peripheral_mode SMBUS peripheral mode
+* @{
+*/
+#define SMBUS_PERIPHERAL_MODE_SMBUS_HOST (uint32_t)(I2C_CR1_SMBUS | I2C_CR1_SMBTYPE | I2C_CR1_ENARP)
+#define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE I2C_CR1_SMBUS
+#define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP (uint32_t)(I2C_CR1_SMBUS | I2C_CR1_ENARP)
+/**
+* @}
+*/
+
+/** @defgroup SMBUS_XferDirection_definition SMBUS XferDirection definition
+ * @{
+ */
+#define SMBUS_DIRECTION_RECEIVE 0x00000000U
+#define SMBUS_DIRECTION_TRANSMIT 0x00000001U
+/**
+ * @}
+ */
+
+/** @defgroup SMBUS_XferOptions_definition SMBUS XferOptions definition
+ * @{
+ */
+#define SMBUS_FIRST_FRAME 0x00000001U
+#define SMBUS_NEXT_FRAME 0x00000002U
+#define SMBUS_FIRST_AND_LAST_FRAME_NO_PEC 0x00000003U
+#define SMBUS_LAST_FRAME_NO_PEC 0x00000004U
+#define SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC 0x00000005U
+#define SMBUS_LAST_FRAME_WITH_PEC 0x00000006U
+/**
+ * @}
+ */
+
+/** @defgroup SMBUS_Interrupt_configuration_definition SMBUS Interrupt configuration definition
+ * @{
+ */
+#define SMBUS_IT_BUF I2C_CR2_ITBUFEN
+#define SMBUS_IT_EVT I2C_CR2_ITEVTEN
+#define SMBUS_IT_ERR I2C_CR2_ITERREN
+/**
+ * @}
+ */
+
+/** @defgroup SMBUS_Flag_definition SMBUS Flag definition
+ * @{
+ */
+#define SMBUS_FLAG_SMBALERT 0x00018000U
+#define SMBUS_FLAG_TIMEOUT 0x00014000U
+#define SMBUS_FLAG_PECERR 0x00011000U
+#define SMBUS_FLAG_OVR 0x00010800U
+#define SMBUS_FLAG_AF 0x00010400U
+#define SMBUS_FLAG_ARLO 0x00010200U
+#define SMBUS_FLAG_BERR 0x00010100U
+#define SMBUS_FLAG_TXE 0x00010080U
+#define SMBUS_FLAG_RXNE 0x00010040U
+#define SMBUS_FLAG_STOPF 0x00010010U
+#define SMBUS_FLAG_ADD10 0x00010008U
+#define SMBUS_FLAG_BTF 0x00010004U
+#define SMBUS_FLAG_ADDR 0x00010002U
+#define SMBUS_FLAG_SB 0x00010001U
+#define SMBUS_FLAG_DUALF 0x00100080U
+#define SMBUS_FLAG_SMBHOST 0x00100040U
+#define SMBUS_FLAG_SMBDEFAULT 0x00100020U
+#define SMBUS_FLAG_GENCALL 0x00100010U
+#define SMBUS_FLAG_TRA 0x00100004U
+#define SMBUS_FLAG_BUSY 0x00100002U
+#define SMBUS_FLAG_MSL 0x00100001U
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/* Exported macro ------------------------------------------------------------*/
+/** @defgroup SMBUS_Exported_Macros SMBUS Exported Macros
+ * @{
+ */
+
+/** @brief Reset SMBUS handle state
+ * @param __HANDLE__ specifies the SMBUS Handle.
+ * This parameter can be SMBUS where x: 1, 2, or 3 to select the SMBUS peripheral.
+ * @retval None
+ */
+#if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)
+#define __HAL_SMBUS_RESET_HANDLE_STATE(__HANDLE__) do{ \
+ (__HANDLE__)->State = HAL_SMBUS_STATE_RESET; \
+ (__HANDLE__)->MspInitCallback = NULL; \
+ (__HANDLE__)->MspDeInitCallback = NULL; \
+ } while(0)
+#else
+#define __HAL_SMBUS_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SMBUS_STATE_RESET)
+#endif
+
+/** @brief Enable or disable the specified SMBUS interrupts.
+ * @param __HANDLE__ specifies the SMBUS Handle.
+ * This parameter can be SMBUS where x: 1, 2, or 3 to select the SMBUS peripheral.
+ * @param __INTERRUPT__ specifies the interrupt source to enable or disable.
+ * This parameter can be one of the following values:
+ * @arg SMBUS_IT_BUF: Buffer interrupt enable
+ * @arg SMBUS_IT_EVT: Event interrupt enable
+ * @arg SMBUS_IT_ERR: Error interrupt enable
+ * @retval None
+ */
+#define __HAL_SMBUS_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
+#define __HAL_SMBUS_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= (~(__INTERRUPT__)))
+
+/** @brief Checks if the specified SMBUS interrupt source is enabled or disabled.
+ * @param __HANDLE__ specifies the SMBUS Handle.
+ * This parameter can be SMBUS where x: 1, 2, or 3 to select the SMBUS peripheral.
+ * @param __INTERRUPT__ specifies the SMBUS interrupt source to check.
+ * This parameter can be one of the following values:
+ * @arg SMBUS_IT_BUF: Buffer interrupt enable
+ * @arg SMBUS_IT_EVT: Event interrupt enable
+ * @arg SMBUS_IT_ERR: Error interrupt enable
+ * @retval The new state of __INTERRUPT__ (TRUE or FALSE).
+ */
+#define __HAL_SMBUS_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
+
+/** @brief Checks whether the specified SMBUS flag is set or not.
+ * @param __HANDLE__ specifies the SMBUS Handle.
+ * This parameter can be SMBUS where x: 1, 2, or 3 to select the SMBUS peripheral.
+ * @param __FLAG__ specifies the flag to check.
+ * This parameter can be one of the following values:
+ * @arg SMBUS_FLAG_SMBALERT: SMBus Alert flag
+ * @arg SMBUS_FLAG_TIMEOUT: Timeout or Tlow error flag
+ * @arg SMBUS_FLAG_PECERR: PEC error in reception flag
+ * @arg SMBUS_FLAG_OVR: Overrun/Underrun flag
+ * @arg SMBUS_FLAG_AF: Acknowledge failure flag
+ * @arg SMBUS_FLAG_ARLO: Arbitration lost flag
+ * @arg SMBUS_FLAG_BERR: Bus error flag
+ * @arg SMBUS_FLAG_TXE: Data register empty flag
+ * @arg SMBUS_FLAG_RXNE: Data register not empty flag
+ * @arg SMBUS_FLAG_STOPF: Stop detection flag
+ * @arg SMBUS_FLAG_ADD10: 10-bit header sent flag
+ * @arg SMBUS_FLAG_BTF: Byte transfer finished flag
+ * @arg SMBUS_FLAG_ADDR: Address sent flag
+ * Address matched flag
+ * @arg SMBUS_FLAG_SB: Start bit flag
+ * @arg SMBUS_FLAG_DUALF: Dual flag
+ * @arg SMBUS_FLAG_SMBHOST: SMBus host header
+ * @arg SMBUS_FLAG_SMBDEFAULT: SMBus default header
+ * @arg SMBUS_FLAG_GENCALL: General call header flag
+ * @arg SMBUS_FLAG_TRA: Transmitter/Receiver flag
+ * @arg SMBUS_FLAG_BUSY: Bus busy flag
+ * @arg SMBUS_FLAG_MSL: Master/Slave flag
+ * @retval The new state of __FLAG__ (TRUE or FALSE).
+ */
+#define __HAL_SMBUS_GET_FLAG(__HANDLE__, __FLAG__) ((((uint8_t)((__FLAG__) >> 16U)) == 0x01U)?((((__HANDLE__)->Instance->SR1) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK)): \
+ ((((__HANDLE__)->Instance->SR2) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK)))
+
+/** @brief Clears the SMBUS pending flags which are cleared by writing 0 in a specific bit.
+ * @param __HANDLE__ specifies the SMBUS Handle.
+ * This parameter can be SMBUS where x: 1, 2, or 3 to select the SMBUS peripheral.
+ * @param __FLAG__ specifies the flag to clear.
+ * This parameter can be any combination of the following values:
+ * @arg SMBUS_FLAG_SMBALERT: SMBus Alert flag
+ * @arg SMBUS_FLAG_TIMEOUT: Timeout or Tlow error flag
+ * @arg SMBUS_FLAG_PECERR: PEC error in reception flag
+ * @arg SMBUS_FLAG_OVR: Overrun/Underrun flag (Slave mode)
+ * @arg SMBUS_FLAG_AF: Acknowledge failure flag
+ * @arg SMBUS_FLAG_ARLO: Arbitration lost flag (Master mode)
+ * @arg SMBUS_FLAG_BERR: Bus error flag
+ * @retval None
+ */
+#define __HAL_SMBUS_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR1 = ~((__FLAG__) & SMBUS_FLAG_MASK))
+
+/** @brief Clears the SMBUS ADDR pending flag.
+ * @param __HANDLE__ specifies the SMBUS Handle.
+ * This parameter can be SMBUS where x: 1, 2, or 3 to select the SMBUS peripheral.
+ * @retval None
+ */
+#define __HAL_SMBUS_CLEAR_ADDRFLAG(__HANDLE__) \
+ do{ \
+ __IO uint32_t tmpreg = 0x00U; \
+ tmpreg = (__HANDLE__)->Instance->SR1; \
+ tmpreg = (__HANDLE__)->Instance->SR2; \
+ UNUSED(tmpreg); \
+ } while(0)
+
+/** @brief Clears the SMBUS STOPF pending flag.
+ * @param __HANDLE__ specifies the SMBUS Handle.
+ * This parameter can be SMBUS where x: 1, 2, or 3 to select the SMBUS peripheral.
+ * @retval None
+ */
+#define __HAL_SMBUS_CLEAR_STOPFLAG(__HANDLE__) \
+ do{ \
+ __IO uint32_t tmpreg = 0x00U; \
+ tmpreg = (__HANDLE__)->Instance->SR1; \
+ (__HANDLE__)->Instance->CR1 |= I2C_CR1_PE; \
+ UNUSED(tmpreg); \
+ } while(0)
+
+/** @brief Enable the SMBUS peripheral.
+ * @param __HANDLE__ specifies the SMBUS Handle.
+ * This parameter can be SMBUSx where x: 1 or 2 to select the SMBUS peripheral.
+ * @retval None
+ */
+#define __HAL_SMBUS_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= I2C_CR1_PE)
+
+/** @brief Disable the SMBUS peripheral.
+ * @param __HANDLE__ specifies the SMBUS Handle.
+ * This parameter can be SMBUSx where x: 1 or 2 to select the SMBUS peripheral.
+ * @retval None
+ */
+#define __HAL_SMBUS_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~I2C_CR1_PE)
+
+/** @brief Generate a Non-Acknowledge SMBUS peripheral in Slave mode.
+ * @param __HANDLE__ specifies the SMBUS Handle.
+ * @retval None
+ */
+#define __HAL_SMBUS_GENERATE_NACK(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_ACK))
+
+/**
+ * @}
+ */
+
+/* Exported functions --------------------------------------------------------*/
+/** @addtogroup SMBUS_Exported_Functions
+ * @{
+ */
+
+/** @addtogroup SMBUS_Exported_Functions_Group1 Initialization and de-initialization functions
+ * @{
+ */
+
+/* Initialization/de-initialization functions **********************************/
+HAL_StatusTypeDef HAL_SMBUS_Init(SMBUS_HandleTypeDef *hsmbus);
+HAL_StatusTypeDef HAL_SMBUS_DeInit(SMBUS_HandleTypeDef *hsmbus);
+void HAL_SMBUS_MspInit(SMBUS_HandleTypeDef *hsmbus);
+void HAL_SMBUS_MspDeInit(SMBUS_HandleTypeDef *hsmbus);
+
+/* Callbacks Register/UnRegister functions ************************************/
+#if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)
+HAL_StatusTypeDef HAL_SMBUS_RegisterCallback(SMBUS_HandleTypeDef *hsmbus, HAL_SMBUS_CallbackIDTypeDef CallbackID, pSMBUS_CallbackTypeDef pCallback);
+HAL_StatusTypeDef HAL_SMBUS_UnRegisterCallback(SMBUS_HandleTypeDef *hsmbus, HAL_SMBUS_CallbackIDTypeDef CallbackID);
+
+HAL_StatusTypeDef HAL_SMBUS_RegisterAddrCallback(SMBUS_HandleTypeDef *hsmbus, pSMBUS_AddrCallbackTypeDef pCallback);
+HAL_StatusTypeDef HAL_SMBUS_UnRegisterAddrCallback(SMBUS_HandleTypeDef *hsmbus);
+#endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */
+
+/**
+ * @}
+ */
+
+/** @addtogroup SMBUS_Exported_Functions_Group2 Input and Output operation functions
+ * @{
+ */
+
+/* IO operation functions *****************************************************/
+/** @addtogroup Blocking_mode_Polling Blocking mode Polling
+ * @{
+ */
+/******* Blocking mode: Polling */
+HAL_StatusTypeDef HAL_SMBUS_IsDeviceReady(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
+/**
+ * @}
+ */
+
+/** @addtogroup Non-Blocking_mode_Interrupt Non-Blocking mode Interrupt
+ * @{
+ */
+/******* Non-Blocking mode: Interrupt */
+HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
+HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
+HAL_StatusTypeDef HAL_SMBUS_Master_Abort_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress);
+HAL_StatusTypeDef HAL_SMBUS_Slave_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
+HAL_StatusTypeDef HAL_SMBUS_Slave_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
+
+HAL_StatusTypeDef HAL_SMBUS_EnableAlert_IT(SMBUS_HandleTypeDef *hsmbus);
+HAL_StatusTypeDef HAL_SMBUS_DisableAlert_IT(SMBUS_HandleTypeDef *hsmbus);
+HAL_StatusTypeDef HAL_SMBUS_EnableListen_IT(SMBUS_HandleTypeDef *hsmbus);
+HAL_StatusTypeDef HAL_SMBUS_DisableListen_IT(SMBUS_HandleTypeDef *hsmbus);
+
+/****** Filter Configuration functions */
+/**
+ * @}
+ */
+
+/** @addtogroup SMBUS_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
+ * @{
+ */
+/******* SMBUS IRQHandler and Callbacks used in non blocking modes (Interrupt) */
+void HAL_SMBUS_EV_IRQHandler(SMBUS_HandleTypeDef *hsmbus);
+void HAL_SMBUS_ER_IRQHandler(SMBUS_HandleTypeDef *hsmbus);
+void HAL_SMBUS_MasterTxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
+void HAL_SMBUS_MasterRxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
+void HAL_SMBUS_SlaveTxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
+void HAL_SMBUS_SlaveRxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
+void HAL_SMBUS_AddrCallback(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode);
+void HAL_SMBUS_ListenCpltCallback(SMBUS_HandleTypeDef *hsmbus);
+void HAL_SMBUS_ErrorCallback(SMBUS_HandleTypeDef *hsmbus);
+void HAL_SMBUS_AbortCpltCallback(SMBUS_HandleTypeDef *hsmbus);
+
+/**
+ * @}
+ */
+
+/** @addtogroup SMBUS_Exported_Functions_Group3 Peripheral State, Mode and Error functions
+ * @{
+ */
+
+/* Peripheral State, mode and Errors functions **************************************************/
+HAL_SMBUS_StateTypeDef HAL_SMBUS_GetState(SMBUS_HandleTypeDef *hsmbus);
+HAL_SMBUS_ModeTypeDef HAL_SMBUS_GetMode(SMBUS_HandleTypeDef *hsmbus);
+uint32_t HAL_SMBUS_GetError(SMBUS_HandleTypeDef *hsmbus);
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+/* Private types -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private constants ---------------------------------------------------------*/
+/** @defgroup SMBUS_Private_Constants SMBUS Private Constants
+ * @{
+ */
+#define SMBUS_FLAG_MASK 0x0000FFFFU
+/**
+ * @}
+ */
+
+/* Private macros ------------------------------------------------------------*/
+/** @defgroup SMBUS_Private_Macros SMBUS Private Macros
+ * @{
+ */
+
+#define SMBUS_FREQRANGE(__PCLK__) ((__PCLK__)/1000000U)
+
+#define SMBUS_RISE_TIME(__FREQRANGE__) ( ((__FREQRANGE__) + 1U))
+
+#define SMBUS_SPEED_STANDARD(__PCLK__, __SPEED__) (((((__PCLK__)/((__SPEED__) << 1U)) & I2C_CCR_CCR) < 4U)? 4U:((__PCLK__) / ((__SPEED__) << 1U)))
+
+#define SMBUS_7BIT_ADD_WRITE(__ADDRESS__) ((uint8_t)((__ADDRESS__) & (~I2C_OAR1_ADD0)))
+
+#define SMBUS_7BIT_ADD_READ(__ADDRESS__) ((uint8_t)((__ADDRESS__) | I2C_OAR1_ADD0))
+
+#define SMBUS_10BIT_ADDRESS(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)0x00FF)))
+
+#define SMBUS_10BIT_HEADER_WRITE(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7) | (uint16_t)0x00F0)))
+
+#define SMBUS_10BIT_HEADER_READ(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7) | (uint16_t)(0x00F1))))
+
+#define SMBUS_GET_PEC_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR1 & I2C_CR1_ENPEC)
+
+#define SMBUS_GET_PEC_VALUE(__HANDLE__) ((__HANDLE__)->XferPEC)
+
+#define IS_SMBUS_ADDRESSING_MODE(ADDRESS) (((ADDRESS) == SMBUS_ADDRESSINGMODE_7BIT) || \
+ ((ADDRESS) == SMBUS_ADDRESSINGMODE_10BIT))
+
+#define IS_SMBUS_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == SMBUS_DUALADDRESS_DISABLE) || \
+ ((ADDRESS) == SMBUS_DUALADDRESS_ENABLE))
+
+#define IS_SMBUS_GENERAL_CALL(CALL) (((CALL) == SMBUS_GENERALCALL_DISABLE) || \
+ ((CALL) == SMBUS_GENERALCALL_ENABLE))
+
+#define IS_SMBUS_NO_STRETCH(STRETCH) (((STRETCH) == SMBUS_NOSTRETCH_DISABLE) || \
+ ((STRETCH) == SMBUS_NOSTRETCH_ENABLE))
+
+#define IS_SMBUS_PEC(PEC) (((PEC) == SMBUS_PEC_DISABLE) || \
+ ((PEC) == SMBUS_PEC_ENABLE))
+
+#define IS_SMBUS_PERIPHERAL_MODE(MODE) (((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_HOST) || \
+ ((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE) || \
+ ((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP))
+
+#define IS_SMBUS_CLOCK_SPEED(SPEED) (((SPEED) > 0U) && ((SPEED) <= 100000U))
+
+#define IS_SMBUS_OWN_ADDRESS1(ADDRESS1) (((ADDRESS1) & 0xFFFFFC00U) == 0U)
+
+#define IS_SMBUS_OWN_ADDRESS2(ADDRESS2) (((ADDRESS2) & 0xFFFFFF01U) == 0U)
+
+#define IS_SMBUS_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == SMBUS_FIRST_FRAME) || \
+ ((REQUEST) == SMBUS_NEXT_FRAME) || \
+ ((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_NO_PEC) || \
+ ((REQUEST) == SMBUS_LAST_FRAME_NO_PEC) || \
+ ((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC) || \
+ ((REQUEST) == SMBUS_LAST_FRAME_WITH_PEC))
+
+/**
+ * @}
+ */
+
+/* Private Functions ---------------------------------------------------------*/
+/** @defgroup SMBUS_Private_Functions SMBUS Private Functions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+* @}
+*/
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* __STM32L1xx_HAL_SMBUS_H */
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_spi.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_spi.h
index 6ec4766f55..d063e16187 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_spi.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_spi.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -288,7 +287,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to
#define SPI_TIMODE_DISABLE (0x00000000U)
#if defined(SPI_CR2_FRF)
#define SPI_TIMODE_ENABLE SPI_CR2_FRF
-#endif
+#endif /* SPI_CR2_FRF */
/**
* @}
*/
@@ -628,7 +627,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to
*/
#define IS_SPI_TIMODE(__MODE__) ((__MODE__) == SPI_TIMODE_DISABLE)
-#endif
+#endif /* SPI_I2SCFGR_I2SMOD */
/** @brief Checks if SPI CRC calculation enabled state is in allowed range.
* @param __CALCULATION__ specifies the SPI CRC calculation enable state.
* This parameter can be a value of @ref SPI_CRC_Calculation
@@ -672,7 +671,8 @@ void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi);
/* Callbacks Register/UnRegister functions ***********************************/
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
-HAL_StatusTypeDef HAL_SPI_RegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID, pSPI_CallbackTypeDef pCallback);
+HAL_StatusTypeDef HAL_SPI_RegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID,
+ pSPI_CallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_SPI_UnRegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID);
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
/**
@@ -743,4 +743,3 @@ uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi);
#endif /* STM32L1xx_HAL_SPI_H */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_sram.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_sram.h
index fa1c6a396d..15768fae24 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_sram.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_sram.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -231,5 +230,3 @@ HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram);
#endif
#endif /* STM32L1xx_HAL_SRAM_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_tim.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_tim.h
index 12b32e2e90..f49531636e 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_tim.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_tim.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -593,6 +592,15 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to
* @}
*/
+/** @defgroup TIM_CC_DMA_Request CCx DMA request selection
+ * @{
+ */
+#define TIM_CCDMAREQUEST_CC 0x00000000U /*!< CCx DMA request sent when capture or compare match event occurs */
+#define TIM_CCDMAREQUEST_UPDATE TIM_CR2_CCDS /*!< CCx DMA requests sent when update event occurs */
+/**
+ * @}
+ */
+
/** @defgroup TIM_Flag_definition TIM Flag Definition
* @{
*/
@@ -625,16 +633,16 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to
/** @defgroup TIM_Clock_Source TIM Clock Source
* @{
*/
-#define TIM_CLOCKSOURCE_ETRMODE2 TIM_SMCR_ETPS_1 /*!< External clock source mode 2 */
#define TIM_CLOCKSOURCE_INTERNAL TIM_SMCR_ETPS_0 /*!< Internal clock source */
+#define TIM_CLOCKSOURCE_ETRMODE1 TIM_TS_ETRF /*!< External clock source mode 1 (ETRF) */
+#define TIM_CLOCKSOURCE_ETRMODE2 TIM_SMCR_ETPS_1 /*!< External clock source mode 2 */
+#define TIM_CLOCKSOURCE_TI1ED TIM_TS_TI1F_ED /*!< External clock source mode 1 (TTI1FP1 + edge detect.) */
+#define TIM_CLOCKSOURCE_TI1 TIM_TS_TI1FP1 /*!< External clock source mode 1 (TTI1FP1) */
+#define TIM_CLOCKSOURCE_TI2 TIM_TS_TI2FP2 /*!< External clock source mode 1 (TTI2FP2) */
#define TIM_CLOCKSOURCE_ITR0 TIM_TS_ITR0 /*!< External clock source mode 1 (ITR0) */
#define TIM_CLOCKSOURCE_ITR1 TIM_TS_ITR1 /*!< External clock source mode 1 (ITR1) */
#define TIM_CLOCKSOURCE_ITR2 TIM_TS_ITR2 /*!< External clock source mode 1 (ITR2) */
#define TIM_CLOCKSOURCE_ITR3 TIM_TS_ITR3 /*!< External clock source mode 1 (ITR3) */
-#define TIM_CLOCKSOURCE_TI1ED TIM_TS_TI1F_ED /*!< External clock source mode 1 (TTI1FP1 + edge detect.) */
-#define TIM_CLOCKSOURCE_TI1 TIM_TS_TI1FP1 /*!< External clock source mode 1 (TTI1FP1) */
-#define TIM_CLOCKSOURCE_TI2 TIM_TS_TI2FP2 /*!< External clock source mode 1 (TTI2FP2) */
-#define TIM_CLOCKSOURCE_ETRMODE1 TIM_TS_ETRF /*!< External clock source mode 1 (ETRF) */
/**
* @}
*/
@@ -1294,6 +1302,17 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to
TIM_SET_CAPTUREPOLARITY((__HANDLE__), (__CHANNEL__), (__POLARITY__)); \
}while(0)
+/** @brief Select the Capture/compare DMA request source.
+ * @param __HANDLE__ specifies the TIM Handle.
+ * @param __CCDMA__ specifies Capture/compare DMA request source
+ * This parameter can be one of the following values:
+ * @arg TIM_CCDMAREQUEST_CC: CCx DMA request generated on Capture/Compare event
+ * @arg TIM_CCDMAREQUEST_UPDATE: CCx DMA request generated on Update event
+ * @retval None
+ */
+#define __HAL_TIM_SELECT_CCDMAREQUEST(__HANDLE__, __CCDMA__) \
+ MODIFY_REG((__HANDLE__)->Instance->CR2, TIM_CR2_CCDS, (__CCDMA__))
+
/**
* @}
*/
@@ -1392,16 +1411,19 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to
#define IS_TIM_OPM_CHANNELS(__CHANNEL__) (((__CHANNEL__) == TIM_CHANNEL_1) || \
((__CHANNEL__) == TIM_CHANNEL_2))
+#define IS_TIM_PERIOD(__HANDLE__, __PERIOD__) \
+ ((IS_TIM_32B_COUNTER_INSTANCE(((__HANDLE__)->Instance)) == 0U) ? (((__PERIOD__) > 0U) && ((__PERIOD__) <= 0x0000FFFFU)) : ((__PERIOD__) > 0U))
+
#define IS_TIM_CLOCKSOURCE(__CLOCK__) (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1))
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3))
#define IS_TIM_CLOCKPOLARITY(__POLARITY__) (((__POLARITY__) == TIM_CLOCKPOLARITY_INVERTED) || \
((__POLARITY__) == TIM_CLOCKPOLARITY_NONINVERTED) || \
@@ -1454,13 +1476,13 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to
((__MODE__) == TIM_OCMODE_FORCED_ACTIVE) || \
((__MODE__) == TIM_OCMODE_FORCED_INACTIVE))
-#define IS_TIM_TRIGGER_SELECTION(__SELECTION__) (((__SELECTION__) == TIM_TS_ITR0) || \
- ((__SELECTION__) == TIM_TS_ITR1) || \
- ((__SELECTION__) == TIM_TS_ITR2) || \
- ((__SELECTION__) == TIM_TS_ITR3) || \
+#define IS_TIM_TRIGGER_SELECTION(__SELECTION__) (((__SELECTION__) == TIM_TS_ITR0) || \
+ ((__SELECTION__) == TIM_TS_ITR1) || \
+ ((__SELECTION__) == TIM_TS_ITR2) || \
+ ((__SELECTION__) == TIM_TS_ITR3) || \
((__SELECTION__) == TIM_TS_TI1F_ED) || \
- ((__SELECTION__) == TIM_TS_TI1FP1) || \
- ((__SELECTION__) == TIM_TS_TI2FP2) || \
+ ((__SELECTION__) == TIM_TS_TI1FP1) || \
+ ((__SELECTION__) == TIM_TS_TI2FP2) || \
((__SELECTION__) == TIM_TS_ETRF))
#define IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(__SELECTION__) (((__SELECTION__) == TIM_TS_ITR0) || \
@@ -1547,11 +1569,11 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to
((__HANDLE__)->ChannelState[3] = (__CHANNEL_STATE__)))
#define TIM_CHANNEL_STATE_SET_ALL(__HANDLE__, __CHANNEL_STATE__) do { \
- (__HANDLE__)->ChannelState[0] = (__CHANNEL_STATE__); \
- (__HANDLE__)->ChannelState[1] = (__CHANNEL_STATE__); \
- (__HANDLE__)->ChannelState[2] = (__CHANNEL_STATE__); \
- (__HANDLE__)->ChannelState[3] = (__CHANNEL_STATE__); \
- } while(0)
+ (__HANDLE__)->ChannelState[0] = (__CHANNEL_STATE__); \
+ (__HANDLE__)->ChannelState[1] = (__CHANNEL_STATE__); \
+ (__HANDLE__)->ChannelState[2] = (__CHANNEL_STATE__); \
+ (__HANDLE__)->ChannelState[3] = (__CHANNEL_STATE__); \
+ } while(0)
/**
* @}
@@ -1582,7 +1604,7 @@ HAL_StatusTypeDef HAL_TIM_Base_Stop(TIM_HandleTypeDef *htim);
HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim);
HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim);
/* Non-Blocking mode: DMA */
-HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length);
+HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, const uint32_t *pData, uint16_t Length);
HAL_StatusTypeDef HAL_TIM_Base_Stop_DMA(TIM_HandleTypeDef *htim);
/**
* @}
@@ -1604,7 +1626,8 @@ HAL_StatusTypeDef HAL_TIM_OC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
/* Non-Blocking mode: DMA */
-HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
+HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData,
+ uint16_t Length);
HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
/**
* @}
@@ -1626,7 +1649,8 @@ HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
/* Non-Blocking mode: DMA */
-HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
+HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData,
+ uint16_t Length);
HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
/**
* @}
@@ -1678,7 +1702,7 @@ HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Out
* @{
*/
/* Timer Encoder functions ****************************************************/
-HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, TIM_Encoder_InitTypeDef *sConfig);
+HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, const TIM_Encoder_InitTypeDef *sConfig);
HAL_StatusTypeDef HAL_TIM_Encoder_DeInit(TIM_HandleTypeDef *htim);
void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef *htim);
void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef *htim);
@@ -1711,21 +1735,25 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim);
* @{
*/
/* Control functions *********************************************************/
-HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef *sConfig, uint32_t Channel);
-HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef *sConfig, uint32_t Channel);
-HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_IC_InitTypeDef *sConfig, uint32_t Channel);
+HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim, const TIM_OC_InitTypeDef *sConfig,
+ uint32_t Channel);
+HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, const TIM_OC_InitTypeDef *sConfig,
+ uint32_t Channel);
+HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *htim, const TIM_IC_InitTypeDef *sConfig,
+ uint32_t Channel);
HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OnePulse_InitTypeDef *sConfig,
uint32_t OutputChannel, uint32_t InputChannel);
-HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim, TIM_ClearInputConfigTypeDef *sClearInputConfig,
+HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim,
+ const TIM_ClearInputConfigTypeDef *sClearInputConfig,
uint32_t Channel);
-HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, TIM_ClockConfigTypeDef *sClockSourceConfig);
+HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef *sClockSourceConfig);
HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_Selection);
-HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro(TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef *sSlaveConfig);
-HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro_IT(TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef *sSlaveConfig);
+HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro(TIM_HandleTypeDef *htim, const TIM_SlaveConfigTypeDef *sSlaveConfig);
+HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro_IT(TIM_HandleTypeDef *htim, const TIM_SlaveConfigTypeDef *sSlaveConfig);
HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress,
- uint32_t BurstRequestSrc, uint32_t *BurstBuffer, uint32_t BurstLength);
+ uint32_t BurstRequestSrc, const uint32_t *BurstBuffer, uint32_t BurstLength);
HAL_StatusTypeDef HAL_TIM_DMABurst_MultiWriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress,
- uint32_t BurstRequestSrc, uint32_t *BurstBuffer,
+ uint32_t BurstRequestSrc, const uint32_t *BurstBuffer,
uint32_t BurstLength, uint32_t DataLength);
HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc);
HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress,
@@ -1735,7 +1763,7 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_MultiReadStart(TIM_HandleTypeDef *htim, uint3
uint32_t BurstLength, uint32_t DataLength);
HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc);
HAL_StatusTypeDef HAL_TIM_GenerateEvent(TIM_HandleTypeDef *htim, uint32_t EventSource);
-uint32_t HAL_TIM_ReadCapturedValue(TIM_HandleTypeDef *htim, uint32_t Channel);
+uint32_t HAL_TIM_ReadCapturedValue(const TIM_HandleTypeDef *htim, uint32_t Channel);
/**
* @}
*/
@@ -1772,17 +1800,17 @@ HAL_StatusTypeDef HAL_TIM_UnRegisterCallback(TIM_HandleTypeDef *htim, HAL_TIM_Ca
* @{
*/
/* Peripheral State functions ************************************************/
-HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(TIM_HandleTypeDef *htim);
-HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(TIM_HandleTypeDef *htim);
-HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(TIM_HandleTypeDef *htim);
-HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(TIM_HandleTypeDef *htim);
-HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(TIM_HandleTypeDef *htim);
-HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(TIM_HandleTypeDef *htim);
+HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(const TIM_HandleTypeDef *htim);
+HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(const TIM_HandleTypeDef *htim);
+HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(const TIM_HandleTypeDef *htim);
+HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(const TIM_HandleTypeDef *htim);
+HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(const TIM_HandleTypeDef *htim);
+HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(const TIM_HandleTypeDef *htim);
/* Peripheral Channel state functions ************************************************/
-HAL_TIM_ActiveChannel HAL_TIM_GetActiveChannel(TIM_HandleTypeDef *htim);
-HAL_TIM_ChannelStateTypeDef HAL_TIM_GetChannelState(TIM_HandleTypeDef *htim, uint32_t Channel);
-HAL_TIM_DMABurstStateTypeDef HAL_TIM_DMABurstState(TIM_HandleTypeDef *htim);
+HAL_TIM_ActiveChannel HAL_TIM_GetActiveChannel(const TIM_HandleTypeDef *htim);
+HAL_TIM_ChannelStateTypeDef HAL_TIM_GetChannelState(const TIM_HandleTypeDef *htim, uint32_t Channel);
+HAL_TIM_DMABurstStateTypeDef HAL_TIM_DMABurstState(const TIM_HandleTypeDef *htim);
/**
* @}
*/
@@ -1822,5 +1850,3 @@ void TIM_ResetCallback(TIM_HandleTypeDef *htim);
#endif
#endif /* STM32L1xx_HAL_TIM_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_tim_ex.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_tim_ex.h
index c6c8e2f0ab..6e7a0a8a36 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_tim_ex.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_tim_ex.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -153,7 +152,7 @@ extern "C" {
*/
/* Extended Control functions ************************************************/
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
- TIM_MasterConfigTypeDef *sMasterConfig);
+ const TIM_MasterConfigTypeDef *sMasterConfig);
HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap);
/**
* @}
@@ -178,5 +177,3 @@ HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap)
#endif /* STM32L1xx_HAL_TIM_EX_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_uart.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_uart.h
index 96dd147a43..cd664f1973 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_uart.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_uart.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -138,12 +137,23 @@ typedef enum
/**
* @brief HAL UART Reception type definition
* @note HAL UART Reception type value aims to identify which type of Reception is ongoing.
- * It is expected to admit following values :
+ * This parameter can be a value of @ref UART_Reception_Type_Values :
* HAL_UART_RECEPTION_STANDARD = 0x00U,
* HAL_UART_RECEPTION_TOIDLE = 0x01U,
*/
typedef uint32_t HAL_UART_RxTypeTypeDef;
+/**
+ * @brief HAL UART Rx Event type definition
+ * @note HAL UART Rx Event type value aims to identify which type of Event has occurred
+ * leading to call of the RxEvent callback.
+ * This parameter can be a value of @ref UART_RxEvent_Type_Values :
+ * HAL_UART_RXEVENT_TC = 0x00U,
+ * HAL_UART_RXEVENT_HT = 0x01U,
+ * HAL_UART_RXEVENT_IDLE = 0x02U,
+ */
+typedef uint32_t HAL_UART_RxEventTypeTypeDef;
+
/**
* @brief UART handle Structure definition
*/
@@ -153,7 +163,7 @@ typedef struct __UART_HandleTypeDef
UART_InitTypeDef Init; /*!< UART communication parameters */
- uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */
+ const uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */
uint16_t TxXferSize; /*!< UART Tx Transfer size */
@@ -167,6 +177,8 @@ typedef struct __UART_HandleTypeDef
__IO HAL_UART_RxTypeTypeDef ReceptionType; /*!< Type of ongoing reception */
+ __IO HAL_UART_RxEventTypeTypeDef RxEventType; /*!< Type of Rx Event */
+
DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */
DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */
@@ -382,7 +394,7 @@ typedef void (*pUART_RxEventCallbackTypeDef)(struct __UART_HandleTypeDef *huart
* @}
*/
-/** @defgroup UART_RECEPTION_TYPE_Values UART Reception type values
+/** @defgroup UART_Reception_Type_Values UART Reception type values
* @{
*/
#define HAL_UART_RECEPTION_STANDARD (0x00000000U) /*!< Standard reception */
@@ -391,6 +403,16 @@ typedef void (*pUART_RxEventCallbackTypeDef)(struct __UART_HandleTypeDef *huart
* @}
*/
+/** @defgroup UART_RxEvent_Type_Values UART RxEvent type values
+ * @{
+ */
+#define HAL_UART_RXEVENT_TC (0x00000000U) /*!< RxEvent linked to Transfer Complete event */
+#define HAL_UART_RXEVENT_HT (0x00000001U) /*!< RxEvent linked to Half Transfer event */
+#define HAL_UART_RXEVENT_IDLE (0x00000002U)
+/**
+ * @}
+ */
+
/**
* @}
*/
@@ -573,7 +595,7 @@ typedef void (*pUART_RxEventCallbackTypeDef)(struct __UART_HandleTypeDef *huart
* @retval The new state of __IT__ (TRUE or FALSE).
*/
#define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28U) == UART_CR1_REG_INDEX)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28U) == UART_CR2_REG_INDEX)? \
- (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & UART_IT_MASK))
+ (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & UART_IT_MASK))
/** @brief Enable CTS flow control
* @note This macro allows to enable CTS hardware flow control for a given UART instance,
@@ -591,7 +613,7 @@ typedef void (*pUART_RxEventCallbackTypeDef)(struct __UART_HandleTypeDef *huart
*/
#define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \
do{ \
- SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
+ ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
(__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \
} while(0U)
@@ -611,7 +633,7 @@ typedef void (*pUART_RxEventCallbackTypeDef)(struct __UART_HandleTypeDef *huart
*/
#define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \
do{ \
- CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
+ ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
(__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \
} while(0U)
@@ -631,7 +653,7 @@ typedef void (*pUART_RxEventCallbackTypeDef)(struct __UART_HandleTypeDef *huart
*/
#define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \
do{ \
- SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
+ ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
(__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \
} while(0U)
@@ -651,7 +673,7 @@ typedef void (*pUART_RxEventCallbackTypeDef)(struct __UART_HandleTypeDef *huart
*/
#define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \
do{ \
- CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
+ ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
(__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \
} while(0U)
@@ -665,7 +687,8 @@ typedef void (*pUART_RxEventCallbackTypeDef)(struct __UART_HandleTypeDef *huart
* @param __HANDLE__ specifies the UART Handle.
* @retval None
*/
-#define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT))
+#define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3\
+ &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT))
/** @brief Enable UART
* @param __HANDLE__ specifies the UART Handle.
@@ -702,7 +725,8 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef *huart);
/* Callbacks Register/UnRegister functions ***********************************/
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
-HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, pUART_CallbackTypeDef pCallback);
+HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID,
+ pUART_CallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID);
HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback);
@@ -718,20 +742,23 @@ HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart);
*/
/* IO operation functions *******************************************************/
-HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
+HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout);
HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
-HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
+HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
+HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart);
-HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint16_t *RxLen, uint32_t Timeout);
+HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint16_t *RxLen,
+ uint32_t Timeout);
HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
+HAL_UART_RxEventTypeTypeDef HAL_UARTEx_GetRxEventType(UART_HandleTypeDef *huart);
+
/* Transfer Abort functions */
HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart);
HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart);
@@ -773,8 +800,8 @@ HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart);
* @{
*/
/* Peripheral State functions **************************************************/
-HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart);
-uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart);
+HAL_UART_StateTypeDef HAL_UART_GetState(const UART_HandleTypeDef *huart);
+uint32_t HAL_UART_GetError(const UART_HandleTypeDef *huart);
/**
* @}
*/
@@ -832,20 +859,22 @@ uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart);
#define UART_DIV_SAMPLING16(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(4U*(_BAUD_)))
#define UART_DIVMANT_SAMPLING16(_PCLK_, _BAUD_) (UART_DIV_SAMPLING16((_PCLK_), (_BAUD_))/100U)
-#define UART_DIVFRAQ_SAMPLING16(_PCLK_, _BAUD_) ((((UART_DIV_SAMPLING16((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) * 100U)) * 16U) + 50U) / 100U)
+#define UART_DIVFRAQ_SAMPLING16(_PCLK_, _BAUD_) ((((UART_DIV_SAMPLING16((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) * 100U)) * 16U)\
+ + 50U) / 100U)
/* UART BRR = mantissa + overflow + fraction
= (UART DIVMANT << 4) + (UART DIVFRAQ & 0xF0) + (UART DIVFRAQ & 0x0FU) */
#define UART_BRR_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) << 4U) + \
- (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0xF0U)) + \
+ (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0xF0U)) + \
(UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0x0FU))
#define UART_DIV_SAMPLING8(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(2U*(_BAUD_)))
#define UART_DIVMANT_SAMPLING8(_PCLK_, _BAUD_) (UART_DIV_SAMPLING8((_PCLK_), (_BAUD_))/100U)
-#define UART_DIVFRAQ_SAMPLING8(_PCLK_, _BAUD_) ((((UART_DIV_SAMPLING8((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) * 100U)) * 8U) + 50U) / 100U)
+#define UART_DIVFRAQ_SAMPLING8(_PCLK_, _BAUD_) ((((UART_DIV_SAMPLING8((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) * 100U)) * 8U)\
+ + 50U) / 100U)
/* UART BRR = mantissa + overflow + fraction
= (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07U) */
#define UART_BRR_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) << 4U) + \
- ((UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0xF8U) << 1U)) + \
+ ((UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0xF8U) << 1U)) + \
(UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0x07U))
/**
@@ -878,4 +907,3 @@ HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pDa
#endif /* __STM32L1xx_HAL_UART_H */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_usart.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_usart.h
index 70bb88f51e..269727c23d 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_usart.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_usart.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -102,7 +101,7 @@ typedef struct __USART_HandleTypeDef
USART_InitTypeDef Init; /*!< Usart communication parameters */
- uint8_t *pTxBuffPtr; /*!< Pointer to Usart Tx transfer Buffer */
+ const uint8_t *pTxBuffPtr; /*!< Pointer to Usart Tx transfer Buffer */
uint16_t TxXferSize; /*!< Usart Tx Transfer size */
@@ -430,10 +429,10 @@ typedef void (*pUSART_CallbackTypeDef)(USART_HandleTypeDef *husart); /*!< poin
*/
#define __HAL_USART_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == USART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & USART_IT_MASK)): \
(((__INTERRUPT__) >> 28U) == USART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & USART_IT_MASK)): \
- ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & USART_IT_MASK)))
+ ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & USART_IT_MASK)))
#define __HAL_USART_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == USART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & USART_IT_MASK)): \
(((__INTERRUPT__) >> 28U) == USART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & USART_IT_MASK)): \
- ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & USART_IT_MASK)))
+ ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & USART_IT_MASK)))
/** @brief Checks whether the specified USART interrupt has occurred or not.
* @param __HANDLE__ specifies the USART Handle.
@@ -449,7 +448,7 @@ typedef void (*pUSART_CallbackTypeDef)(USART_HandleTypeDef *husart); /*!< poin
* @retval The new state of __IT__ (TRUE or FALSE).
*/
#define __HAL_USART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28U) == USART_CR1_REG_INDEX)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28U) == USART_CR2_REG_INDEX)? \
- (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & USART_IT_MASK))
+ (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & USART_IT_MASK))
/** @brief Macro to enable the USART's one bit sample method
* @param __HANDLE__ specifies the USART Handle.
@@ -461,7 +460,8 @@ typedef void (*pUSART_CallbackTypeDef)(USART_HandleTypeDef *husart); /*!< poin
* @param __HANDLE__ specifies the USART Handle.
* @retval None
*/
-#define __HAL_USART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT))
+#define __HAL_USART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3\
+ &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT))
/** @brief Enable USART
* @param __HANDLE__ specifies the USART Handle.
@@ -496,7 +496,8 @@ void HAL_USART_MspDeInit(USART_HandleTypeDef *husart);
/* Callbacks Register/UnRegister functions ***********************************/
#if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
-HAL_StatusTypeDef HAL_USART_RegisterCallback(USART_HandleTypeDef *husart, HAL_USART_CallbackIDTypeDef CallbackID, pUSART_CallbackTypeDef pCallback);
+HAL_StatusTypeDef HAL_USART_RegisterCallback(USART_HandleTypeDef *husart, HAL_USART_CallbackIDTypeDef CallbackID,
+ pUSART_CallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_USART_UnRegisterCallback(USART_HandleTypeDef *husart, HAL_USART_CallbackIDTypeDef CallbackID);
#endif /* USE_HAL_USART_REGISTER_CALLBACKS */
@@ -508,15 +509,18 @@ HAL_StatusTypeDef HAL_USART_UnRegisterCallback(USART_HandleTypeDef *husart, HAL_
* @{
*/
/* IO operation functions *******************************************************/
-HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size, uint32_t Timeout);
+HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint16_t Size, uint32_t Timeout);
HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
-HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
-HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size);
+HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint8_t *pRxData,
+ uint16_t Size, uint32_t Timeout);
+HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint16_t Size);
HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size);
-HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
-HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size);
+HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint8_t *pRxData,
+ uint16_t Size);
+HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint16_t Size);
HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size);
-HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
+HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint8_t *pRxData,
+ uint16_t Size);
HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart);
HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart);
HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart);
@@ -540,8 +544,8 @@ void HAL_USART_AbortCpltCallback(USART_HandleTypeDef *husart);
* @{
*/
/* Peripheral State functions ************************************************/
-HAL_USART_StateTypeDef HAL_USART_GetState(USART_HandleTypeDef *husart);
-uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart);
+HAL_USART_StateTypeDef HAL_USART_GetState(const USART_HandleTypeDef *husart);
+uint32_t HAL_USART_GetError(const USART_HandleTypeDef *husart);
/**
* @}
*/
@@ -559,7 +563,7 @@ uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart);
*
*/
#define USART_IT_MASK ((uint32_t) USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE | USART_CR1_RXNEIE | \
- USART_CR1_IDLEIE | USART_CR2_LBDIE | USART_CR3_CTSIE | USART_CR3_EIE )
+ USART_CR1_IDLEIE | USART_CR2_LBDIE | USART_CR3_CTSIE | USART_CR3_EIE )
#define USART_CR1_REG_INDEX 1U
#define USART_CR2_REG_INDEX 2U
@@ -613,14 +617,14 @@ uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart);
= (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07U) */
#define USART_BRR(_PCLK_, _BAUD_) (((USART_DIVMANT((_PCLK_), (_BAUD_)) << 4U) + \
- ((USART_DIVFRAQ((_PCLK_), (_BAUD_)) & 0xF8U) << 1U)) + \
- (USART_DIVFRAQ((_PCLK_), (_BAUD_)) & 0x07U))
+ ((USART_DIVFRAQ((_PCLK_), (_BAUD_)) & 0xF8U) << 1U)) + \
+ (USART_DIVFRAQ((_PCLK_), (_BAUD_)) & 0x07U))
/**
* @}
*/
/* Private functions ---------------------------------------------------------*/
-/** @defgroup USART_Private_Functions USART Private Functions
+/** @addtogroup USART_Private_Functions
* @{
*/
@@ -642,4 +646,3 @@ uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart);
#endif /* __STM32L1xx_HAL_USART_H */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_wwdg.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_wwdg.h
index 6714088d12..659656a71c 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_wwdg.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_wwdg.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -184,7 +183,7 @@ typedef void (*pWWDG_CallbackTypeDef)(WWDG_HandleTypeDef *hppp); /*!< pointer t
/**
* @brief Enable the WWDG early wakeup interrupt.
- * @param __HANDLE__: WWDG handle
+ * @param __HANDLE__ WWDG handle
* @param __INTERRUPT__ specifies the interrupt to enable.
* This parameter can be one of the following values:
* @arg WWDG_IT_EWI: Early wakeup interrupt
@@ -297,5 +296,3 @@ void HAL_WWDG_EarlyWakeupCallback(WWDG_HandleTypeDef *hwwdg);
#endif
#endif /* STM32L1xx_HAL_WWDG_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_adc.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_adc.h
index fcbec4f0c8..15c0f96662 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_adc.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_adc.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -393,9 +392,9 @@ typedef struct
{
uint32_t CommonClock; /*!< Set parameter common to several ADC: Clock source and prescaler.
This parameter can be a value of @ref ADC_LL_EC_COMMON_CLOCK_SOURCE
- @note On this STM32 serie, HSI RC oscillator is the only clock source for ADC.
+ @note On this STM32 series, HSI RC oscillator is the only clock source for ADC.
Therefore, HSI RC oscillator must be preliminarily enabled at RCC top level.
- @note On this STM32 serie, some clock ratio constraints between ADC clock and APB clock
+ @note On this STM32 series, some clock ratio constraints between ADC clock and APB clock
must be respected:
- In all cases: if APB clock frequency is too low compared ADC clock frequency, a delay between conversions must be inserted.
- If ADC group injected is used: ADC clock frequency should be lower than APB clock frequency /4 for resolution 12 or 10 bits, APB clock frequency /3 for resolution 8 bits, APB clock frequency /2 for resolution 6 bits.
@@ -472,7 +471,7 @@ typedef struct
{
uint32_t TriggerSource; /*!< Set ADC group regular conversion trigger source: internal (SW start) or from external IP (timer event, external interrupt line).
This parameter can be a value of @ref ADC_LL_EC_REG_TRIGGER_SOURCE
- @note On this STM32 serie, setting of external trigger edge is performed
+ @note On this STM32 series, setting of external trigger edge is performed
using function @ref LL_ADC_REG_StartConversionExtTrig().
This feature can be modified afterwards using unitary function @ref LL_ADC_REG_SetTriggerSource(). */
@@ -526,7 +525,7 @@ typedef struct
{
uint32_t TriggerSource; /*!< Set ADC group injected conversion trigger source: internal (SW start) or from external IP (timer event, external interrupt line).
This parameter can be a value of @ref ADC_LL_EC_INJ_TRIGGER_SOURCE
- @note On this STM32 serie, setting of external trigger edge is performed
+ @note On this STM32 series, setting of external trigger edge is performed
using function @ref LL_ADC_INJ_StartConversionExtTrig().
This feature can be modified afterwards using unitary function @ref LL_ADC_INJ_SetTriggerSource(). */
@@ -571,7 +570,7 @@ typedef struct
#define LL_ADC_FLAG_EOCS ADC_SR_EOC /*!< ADC flag ADC group regular end of unitary conversion or sequence conversions (to configure flag of end of conversion, use function @ref LL_ADC_REG_SetFlagEndOfConversion() ) */
#define LL_ADC_FLAG_OVR ADC_SR_OVR /*!< ADC flag ADC group regular overrun */
#define LL_ADC_FLAG_JSTRT ADC_SR_JSTRT /*!< ADC flag ADC group injected conversion start */
-#define LL_ADC_FLAG_JEOS ADC_SR_JEOC /*!< ADC flag ADC group injected end of sequence conversions (Note: on this STM32 serie, there is no flag ADC group injected end of unitary conversion. Flag noted as "JEOC" is corresponding to flag "JEOS" in other STM32 families) */
+#define LL_ADC_FLAG_JEOS ADC_SR_JEOC /*!< ADC flag ADC group injected end of sequence conversions (Note: on this STM32 series, there is no flag ADC group injected end of unitary conversion. Flag noted as "JEOC" is corresponding to flag "JEOS" in other STM32 families) */
#define LL_ADC_FLAG_AWD1 ADC_SR_AWD /*!< ADC flag ADC analog watchdog 1 */
/**
* @}
@@ -583,7 +582,7 @@ typedef struct
*/
#define LL_ADC_IT_EOCS ADC_CR1_EOCIE /*!< ADC interruption ADC group regular end of unitary conversion or sequence conversions (to configure flag of end of conversion, use function @ref LL_ADC_REG_SetFlagEndOfConversion() ) */
#define LL_ADC_IT_OVR ADC_CR1_OVRIE /*!< ADC interruption ADC group regular overrun */
-#define LL_ADC_IT_JEOS ADC_CR1_JEOCIE /*!< ADC interruption ADC group injected end of sequence conversions (Note: on this STM32 serie, there is no flag ADC group injected end of unitary conversion. Flag noted as "JEOC" is corresponding to flag "JEOS" in other STM32 families) */
+#define LL_ADC_IT_JEOS ADC_CR1_JEOCIE /*!< ADC interruption ADC group injected end of sequence conversions (Note: on this STM32 series, there is no flag ADC group injected end of unitary conversion. Flag noted as "JEOC" is corresponding to flag "JEOS" in other STM32 families) */
#define LL_ADC_IT_AWD1 ADC_CR1_AWDIE /*!< ADC interruption ADC analog watchdog 1 */
/**
* @}
@@ -618,7 +617,7 @@ typedef struct
/* If they are not listed below, they do not require any specific */
/* path enable. In this case, Access to measurement path is done */
/* only by selecting the corresponding ADC internal channel. */
-#define LL_ADC_PATH_INTERNAL_NONE 0x00000000U /*!< ADC measurement pathes all disabled */
+#define LL_ADC_PATH_INTERNAL_NONE 0x00000000U /*!< ADC measurement paths all disabled */
#define LL_ADC_PATH_INTERNAL_VREFINT (ADC_CCR_TSVREFE) /*!< ADC measurement path to internal channel VrefInt */
#define LL_ADC_PATH_INTERNAL_TEMPSENSOR (ADC_CCR_TSVREFE) /*!< ADC measurement path to internal channel temperature sensor */
/**
@@ -640,7 +639,7 @@ typedef struct
* @{
*/
#define LL_ADC_DATA_ALIGN_RIGHT 0x00000000U /*!< ADC conversion data alignment: right aligned (alignment on data register LSB bit 0)*/
-#define LL_ADC_DATA_ALIGN_LEFT (ADC_CR2_ALIGN) /*!< ADC conversion data alignment: left aligned (aligment on data register MSB bit 15)*/
+#define LL_ADC_DATA_ALIGN_LEFT (ADC_CR2_ALIGN) /*!< ADC conversion data alignment: left aligned (alignment on data register MSB bit 15)*/
/**
* @}
*/
@@ -814,21 +813,35 @@ typedef struct
* @{
*/
#define LL_ADC_REG_SEQ_SCAN_DISABLE 0x00000000U /*!< ADC group regular sequencer disable (equivalent to sequencer of 1 rank: ADC conversion on only 1 channel) */
-#define LL_ADC_REG_SEQ_SCAN_ENABLE_2RANKS ( ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 2 ranks in the sequence */
-#define LL_ADC_REG_SEQ_SCAN_ENABLE_3RANKS ( ADC_SQR1_L_1 ) /*!< ADC group regular sequencer enable with 3 ranks in the sequence */
-#define LL_ADC_REG_SEQ_SCAN_ENABLE_4RANKS ( ADC_SQR1_L_1 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 4 ranks in the sequence */
-#define LL_ADC_REG_SEQ_SCAN_ENABLE_5RANKS ( ADC_SQR1_L_2 ) /*!< ADC group regular sequencer enable with 5 ranks in the sequence */
-#define LL_ADC_REG_SEQ_SCAN_ENABLE_6RANKS ( ADC_SQR1_L_2 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 6 ranks in the sequence */
-#define LL_ADC_REG_SEQ_SCAN_ENABLE_7RANKS ( ADC_SQR1_L_2 | ADC_SQR1_L_1 ) /*!< ADC group regular sequencer enable with 7 ranks in the sequence */
-#define LL_ADC_REG_SEQ_SCAN_ENABLE_8RANKS ( ADC_SQR1_L_2 | ADC_SQR1_L_1 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 8 ranks in the sequence */
-#define LL_ADC_REG_SEQ_SCAN_ENABLE_9RANKS (ADC_SQR1_L_3 ) /*!< ADC group regular sequencer enable with 9 ranks in the sequence */
-#define LL_ADC_REG_SEQ_SCAN_ENABLE_10RANKS (ADC_SQR1_L_3 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 10 ranks in the sequence */
-#define LL_ADC_REG_SEQ_SCAN_ENABLE_11RANKS (ADC_SQR1_L_3 | ADC_SQR1_L_1 ) /*!< ADC group regular sequencer enable with 11 ranks in the sequence */
-#define LL_ADC_REG_SEQ_SCAN_ENABLE_12RANKS (ADC_SQR1_L_3 | ADC_SQR1_L_1 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 12 ranks in the sequence */
-#define LL_ADC_REG_SEQ_SCAN_ENABLE_13RANKS (ADC_SQR1_L_3 | ADC_SQR1_L_2 ) /*!< ADC group regular sequencer enable with 13 ranks in the sequence */
-#define LL_ADC_REG_SEQ_SCAN_ENABLE_14RANKS (ADC_SQR1_L_3 | ADC_SQR1_L_2 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 14 ranks in the sequence */
-#define LL_ADC_REG_SEQ_SCAN_ENABLE_15RANKS (ADC_SQR1_L_3 | ADC_SQR1_L_2 | ADC_SQR1_L_1 ) /*!< ADC group regular sequencer enable with 15 ranks in the sequence */
-#define LL_ADC_REG_SEQ_SCAN_ENABLE_16RANKS (ADC_SQR1_L_3 | ADC_SQR1_L_2 | ADC_SQR1_L_1 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 16 ranks in the sequence */
+#define LL_ADC_REG_SEQ_SCAN_ENABLE_2RANKS ( ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 2 ranks in the sequence */
+#define LL_ADC_REG_SEQ_SCAN_ENABLE_3RANKS ( ADC_SQR1_L_1 ) /*!< ADC group regular sequencer enable with 3 ranks in the sequence */
+#define LL_ADC_REG_SEQ_SCAN_ENABLE_4RANKS ( ADC_SQR1_L_1 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 4 ranks in the sequence */
+#define LL_ADC_REG_SEQ_SCAN_ENABLE_5RANKS ( ADC_SQR1_L_2 ) /*!< ADC group regular sequencer enable with 5 ranks in the sequence */
+#define LL_ADC_REG_SEQ_SCAN_ENABLE_6RANKS ( ADC_SQR1_L_2 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 6 ranks in the sequence */
+#define LL_ADC_REG_SEQ_SCAN_ENABLE_7RANKS ( ADC_SQR1_L_2 | ADC_SQR1_L_1 ) /*!< ADC group regular sequencer enable with 7 ranks in the sequence */
+#define LL_ADC_REG_SEQ_SCAN_ENABLE_8RANKS ( ADC_SQR1_L_2 | ADC_SQR1_L_1 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 8 ranks in the sequence */
+#define LL_ADC_REG_SEQ_SCAN_ENABLE_9RANKS ( ADC_SQR1_L_3 ) /*!< ADC group regular sequencer enable with 9 ranks in the sequence */
+#define LL_ADC_REG_SEQ_SCAN_ENABLE_10RANKS ( ADC_SQR1_L_3 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 10 ranks in the sequence */
+#define LL_ADC_REG_SEQ_SCAN_ENABLE_11RANKS ( ADC_SQR1_L_3 | ADC_SQR1_L_1 ) /*!< ADC group regular sequencer enable with 11 ranks in the sequence */
+#define LL_ADC_REG_SEQ_SCAN_ENABLE_12RANKS ( ADC_SQR1_L_3 | ADC_SQR1_L_1 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 12 ranks in the sequence */
+#define LL_ADC_REG_SEQ_SCAN_ENABLE_13RANKS ( ADC_SQR1_L_3 | ADC_SQR1_L_2 ) /*!< ADC group regular sequencer enable with 13 ranks in the sequence */
+#define LL_ADC_REG_SEQ_SCAN_ENABLE_14RANKS ( ADC_SQR1_L_3 | ADC_SQR1_L_2 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 14 ranks in the sequence */
+#define LL_ADC_REG_SEQ_SCAN_ENABLE_15RANKS ( ADC_SQR1_L_3 | ADC_SQR1_L_2 | ADC_SQR1_L_1 ) /*!< ADC group regular sequencer enable with 15 ranks in the sequence */
+#define LL_ADC_REG_SEQ_SCAN_ENABLE_16RANKS ( ADC_SQR1_L_3 | ADC_SQR1_L_2 | ADC_SQR1_L_1 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 16 ranks in the sequence */
+#define LL_ADC_REG_SEQ_SCAN_ENABLE_17RANKS (ADC_SQR1_L_4 ) /*!< ADC group regular sequencer enable with 17 ranks in the sequence */
+#define LL_ADC_REG_SEQ_SCAN_ENABLE_18RANKS (ADC_SQR1_L_4 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 18 ranks in the sequence */
+#define LL_ADC_REG_SEQ_SCAN_ENABLE_19RANKS (ADC_SQR1_L_4 | ADC_SQR1_L_1 ) /*!< ADC group regular sequencer enable with 19 ranks in the sequence */
+#define LL_ADC_REG_SEQ_SCAN_ENABLE_20RANKS (ADC_SQR1_L_4 | ADC_SQR1_L_1 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 20 ranks in the sequence */
+#define LL_ADC_REG_SEQ_SCAN_ENABLE_21RANKS (ADC_SQR1_L_4 | ADC_SQR1_L_2 ) /*!< ADC group regular sequencer enable with 21 ranks in the sequence */
+#define LL_ADC_REG_SEQ_SCAN_ENABLE_22RANKS (ADC_SQR1_L_4 | ADC_SQR1_L_2 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 22 ranks in the sequence */
+#define LL_ADC_REG_SEQ_SCAN_ENABLE_23RANKS (ADC_SQR1_L_4 | ADC_SQR1_L_2 | ADC_SQR1_L_1 ) /*!< ADC group regular sequencer enable with 23 ranks in the sequence */
+#define LL_ADC_REG_SEQ_SCAN_ENABLE_24RANKS (ADC_SQR1_L_4 | ADC_SQR1_L_2 | ADC_SQR1_L_1 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 24 ranks in the sequence */
+#define LL_ADC_REG_SEQ_SCAN_ENABLE_25RANKS (ADC_SQR1_L_4 | ADC_SQR1_L_3 ) /*!< ADC group regular sequencer enable with 25 ranks in the sequence */
+#define LL_ADC_REG_SEQ_SCAN_ENABLE_26RANKS (ADC_SQR1_L_4 | ADC_SQR1_L_3 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 26 ranks in the sequence */
+#define LL_ADC_REG_SEQ_SCAN_ENABLE_27RANKS (ADC_SQR1_L_4 | ADC_SQR1_L_3 | ADC_SQR1_L_1 ) /*!< ADC group regular sequencer enable with 27 ranks in the sequence */
+#if defined (STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined (STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined (STM32L151xE) || defined (STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
+#define LL_ADC_REG_SEQ_SCAN_ENABLE_28RANKS (ADC_SQR1_L_4 | ADC_SQR1_L_3 | ADC_SQR1_L_1 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 28 ranks in the sequence */
+#endif
/**
* @}
*/
@@ -1156,7 +1169,7 @@ typedef struct
/* configuration (system clock versus ADC clock), */
/* and therefore must be defined in user application. */
/* Indications for estimation of ADC timeout delays, for this */
-/* STM32 serie: */
+/* STM32 series: */
/* - ADC enable time: maximum delay is 3.5us */
/* (refer to device datasheet, parameter "tSTAB") */
/* - ADC conversion time: duration depending on ADC clock and ADC */
@@ -1936,7 +1949,7 @@ typedef struct
* connected to pin Vref+.
* On devices with small package, the pin Vref+ is not present
* and internally bonded to pin Vdda.
- * @note On this STM32 serie, calibration data of internal voltage reference
+ * @note On this STM32 series, calibration data of internal voltage reference
* VrefInt corresponds to a resolution of 12 bits,
* this is the recommended ADC resolution to convert voltage of
* internal voltage reference VrefInt.
@@ -1990,7 +2003,7 @@ typedef struct
* @note Analog reference voltage (Vref+) must be either known from
* user board environment or can be calculated using ADC measurement
* and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE().
- * @note On this STM32 serie, calibration data of temperature sensor
+ * @note On this STM32 series, calibration data of temperature sensor
* corresponds to a resolution of 12 bits,
* this is the recommended ADC resolution to convert voltage of
* temperature sensor.
@@ -2147,9 +2160,9 @@ __STATIC_INLINE uint32_t LL_ADC_DMA_GetRegAddr(ADC_TypeDef *ADCx, uint32_t Regis
/**
* @brief Set parameter common to several ADC: Clock source and prescaler.
- * @note On this STM32 serie, HSI RC oscillator is the only clock source for ADC.
+ * @note On this STM32 series, HSI RC oscillator is the only clock source for ADC.
* Therefore, HSI RC oscillator must be preliminarily enabled at RCC top level.
- * @note On this STM32 serie, some clock ratio constraints between ADC clock and APB clock
+ * @note On this STM32 series, some clock ratio constraints between ADC clock and APB clock
* must be respected:
* - In all cases: if APB clock frequency is too low compared ADC clock frequency, a delay between conversions must be inserted.
* - If ADC group injected is used: ADC clock frequency should be lower than APB clock frequency /4 for resolution 12 or 10 bits, APB clock frequency /3 for resolution 8 bits, APB clock frequency /2 for resolution 6 bits.
@@ -2471,7 +2484,7 @@ __STATIC_INLINE uint32_t LL_ADC_GetLowPowerModeAutoPowerOff(ADC_TypeDef *ADCx)
* each ADC group (sequencer scan length, ...).
* Refer to function @ref LL_ADC_REG_SetSequencerLength()
* and to function @ref LL_ADC_INJ_SetSequencerLength().
- * @note On this STM32 serie, setting of this feature is conditioned to
+ * @note On this STM32 series, setting of this feature is conditioned to
* ADC state:
* ADC must be disabled or enabled without conversion on going
* on either groups regular or injected.
@@ -2519,7 +2532,7 @@ __STATIC_INLINE uint32_t LL_ADC_GetSequencersScanMode(ADC_TypeDef *ADCx)
* (independently of channel mapped on ADC group regular
* or group injected).
* @note Banks availability depends on devices categories.
- * @note On this STM32 serie, setting of this feature is conditioned to
+ * @note On this STM32 series, setting of this feature is conditioned to
* ADC state:
* ADC must be disabled or enabled without conversion on going
* on either groups regular or injected.
@@ -2565,7 +2578,7 @@ __STATIC_INLINE uint32_t LL_ADC_GetChannelsBank(ADC_TypeDef *ADCx)
* @brief Set ADC group regular conversion trigger source:
* internal (SW start) or from external IP (timer event,
* external interrupt line).
- * @note On this STM32 serie, setting of external trigger edge is performed
+ * @note On this STM32 series, setting of external trigger edge is performed
* using function @ref LL_ADC_REG_StartConversionExtTrig().
* @note Availability of parameters of trigger sources from timer
* depends on timers availability on the selected device.
@@ -2590,7 +2603,7 @@ __STATIC_INLINE uint32_t LL_ADC_GetChannelsBank(ADC_TypeDef *ADCx)
*/
__STATIC_INLINE void LL_ADC_REG_SetTriggerSource(ADC_TypeDef *ADCx, uint32_t TriggerSource)
{
-/* Note: On this STM32 serie, ADC group regular external trigger edge */
+/* Note: On this STM32 series, ADC group regular external trigger edge */
/* is used to perform a ADC conversion start. */
/* This function does not set external trigger edge. */
/* This feature is set using function */
@@ -2663,7 +2676,7 @@ __STATIC_INLINE uint32_t LL_ADC_REG_IsTriggerSourceSWStart(ADC_TypeDef *ADCx)
/**
* @brief Get ADC group regular conversion trigger polarity.
* @note Applicable only for trigger source set to external trigger.
- * @note On this STM32 serie, setting of external trigger edge is performed
+ * @note On this STM32 series, setting of external trigger edge is performed
* using function @ref LL_ADC_REG_StartConversionExtTrig().
* @rmtoll CR2 EXTEN LL_ADC_REG_GetTriggerEdge
* @param ADCx ADC instance
@@ -2705,7 +2718,7 @@ __STATIC_INLINE uint32_t LL_ADC_REG_GetTriggerEdge(ADC_TypeDef *ADCx)
* highest channel number).
* Sequencer ranks are selected using
* function "LL_ADC_REG_SetSequencerChannels()".
- * @note On this STM32 serie, group regular sequencer configuration
+ * @note On this STM32 series, group regular sequencer configuration
* is conditioned to ADC instance sequencer mode.
* If ADC instance sequencer mode is disabled, sequencers of
* all groups (group regular, group injected) can be configured
@@ -2732,6 +2745,20 @@ __STATIC_INLINE uint32_t LL_ADC_REG_GetTriggerEdge(ADC_TypeDef *ADCx)
* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_14RANKS
* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_15RANKS
* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_16RANKS
+ * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_17RANKS
+ * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_18ANKS
+ * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_19RANKS
+ * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_20RANKS
+ * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_21RANKS
+ * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_22RANKS
+ * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_23RANKS
+ * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_24RANKS
+ * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_25RANKS
+ * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_26RANKS
+ * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_27RANKS
+ * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_28RANKS (1)
+ *
+ * (1) On STM32L1, parameter not available on all devices: only on STM32L1 Cat.3, Cat.4 and Cat.5.
* @retval None
*/
__STATIC_INLINE void LL_ADC_REG_SetSequencerLength(ADC_TypeDef *ADCx, uint32_t SequencerNbRanks)
@@ -2766,7 +2793,7 @@ __STATIC_INLINE void LL_ADC_REG_SetSequencerLength(ADC_TypeDef *ADCx, uint32_t S
* highest channel number).
* Sequencer ranks are selected using
* function "LL_ADC_REG_SetSequencerChannels()".
- * @note On this STM32 serie, group regular sequencer configuration
+ * @note On this STM32 series, group regular sequencer configuration
* is conditioned to ADC instance sequencer mode.
* If ADC instance sequencer mode is disabled, sequencers of
* all groups (group regular, group injected) can be configured
@@ -2793,6 +2820,20 @@ __STATIC_INLINE void LL_ADC_REG_SetSequencerLength(ADC_TypeDef *ADCx, uint32_t S
* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_14RANKS
* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_15RANKS
* @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_16RANKS
+ * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_17RANKS
+ * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_18ANKS
+ * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_19RANKS
+ * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_20RANKS
+ * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_21RANKS
+ * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_22RANKS
+ * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_23RANKS
+ * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_24RANKS
+ * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_25RANKS
+ * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_26RANKS
+ * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_27RANKS
+ * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_28RANKS (1)
+ *
+ * (1) On STM32L1, parameter not available on all devices: only on STM32L1 Cat.3, Cat.4 and Cat.5.
*/
__STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerLength(ADC_TypeDef *ADCx)
{
@@ -2856,13 +2897,13 @@ __STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerDiscont(ADC_TypeDef *ADCx)
* @note This function performs configuration of:
* - Channels ordering into each rank of scan sequence:
* whatever channel can be placed into whatever rank.
- * @note On this STM32 serie, ADC group regular sequencer is
+ * @note On this STM32 series, ADC group regular sequencer is
* fully configurable: sequencer length and each rank
* affectation to a channel are configurable.
* Refer to description of function @ref LL_ADC_REG_SetSequencerLength().
* @note Depending on devices and packages, some channels may not be available.
* Refer to device datasheet for channels availability.
- * @note On this STM32 serie, to measure internal channels (VrefInt,
+ * @note On this STM32 series, to measure internal channels (VrefInt,
* TempSensor, ...), measurement paths to internal channels must be
* enabled separately.
* This can be done using function @ref LL_ADC_SetCommonPathInternalCh().
@@ -2989,7 +3030,7 @@ __STATIC_INLINE void LL_ADC_REG_SetSequencerRanks(ADC_TypeDef *ADCx, uint32_t Ra
/**
* @brief Get ADC group regular sequence: channel on the selected
* scan sequence rank.
- * @note On this STM32 serie, ADC group regular sequencer is
+ * @note On this STM32 series, ADC group regular sequencer is
* fully configurable: sequencer length and each rank
* affectation to a channel are configurable.
* Refer to description of function @ref LL_ADC_REG_SetSequencerLength().
@@ -3278,7 +3319,7 @@ __STATIC_INLINE uint32_t LL_ADC_REG_GetFlagEndOfConversion(ADC_TypeDef *ADCx)
* @brief Set ADC group injected conversion trigger source:
* internal (SW start) or from external IP (timer event,
* external interrupt line).
- * @note On this STM32 serie, setting of external trigger edge is performed
+ * @note On this STM32 series, setting of external trigger edge is performed
* using function @ref LL_ADC_INJ_StartConversionExtTrig().
* @note Availability of parameters of trigger sources from timer
* depends on timers availability on the selected device.
@@ -3303,7 +3344,7 @@ __STATIC_INLINE uint32_t LL_ADC_REG_GetFlagEndOfConversion(ADC_TypeDef *ADCx)
*/
__STATIC_INLINE void LL_ADC_INJ_SetTriggerSource(ADC_TypeDef *ADCx, uint32_t TriggerSource)
{
-/* Note: On this STM32 serie, ADC group injected external trigger edge */
+/* Note: On this STM32 series, ADC group injected external trigger edge */
/* is used to perform a ADC conversion start. */
/* This function does not set external trigger edge. */
/* This feature is set using function */
@@ -3394,7 +3435,7 @@ __STATIC_INLINE uint32_t LL_ADC_INJ_GetTriggerEdge(ADC_TypeDef *ADCx)
* - Sequence length: Number of ranks in the scan sequence.
* - Sequence direction: Unless specified in parameters, sequencer
* scan direction is forward (from rank 1 to rank n).
- * @note On this STM32 serie, group injected sequencer configuration
+ * @note On this STM32 series, group injected sequencer configuration
* is conditioned to ADC instance sequencer mode.
* If ADC instance sequencer mode is disabled, sequencers of
* all groups (group regular, group injected) can be configured
@@ -3422,7 +3463,7 @@ __STATIC_INLINE void LL_ADC_INJ_SetSequencerLength(ADC_TypeDef *ADCx, uint32_t S
* - Sequence length: Number of ranks in the scan sequence.
* - Sequence direction: Unless specified in parameters, sequencer
* scan direction is forward (from rank 1 to rank n).
- * @note On this STM32 serie, group injected sequencer configuration
+ * @note On this STM32 series, group injected sequencer configuration
* is conditioned to ADC instance sequencer mode.
* If ADC instance sequencer mode is disabled, sequencers of
* all groups (group regular, group injected) can be configured
@@ -3481,7 +3522,7 @@ __STATIC_INLINE uint32_t LL_ADC_INJ_GetSequencerDiscont(ADC_TypeDef *ADCx)
* sequence rank.
* @note Depending on devices and packages, some channels may not be available.
* Refer to device datasheet for channels availability.
- * @note On this STM32 serie, to measure internal channels (VrefInt,
+ * @note On this STM32 series, to measure internal channels (VrefInt,
* TempSensor, ...), measurement paths to internal channels must be
* enabled separately.
* This can be done using function @ref LL_ADC_SetCommonPathInternalCh().
@@ -3764,7 +3805,7 @@ __STATIC_INLINE uint32_t LL_ADC_INJ_GetOffset(ADC_TypeDef *ADCx, uint32_t Rank)
* TS_temp, ...).
* @note Conversion time is the addition of sampling time and processing time.
* Refer to reference manual for ADC processing time of
- * this STM32 serie.
+ * this STM32 series.
* @note In case of ADC conversion of internal channel (VrefInt,
* temperature sensor, ...), a sampling time minimum value
* is required.
@@ -3878,7 +3919,7 @@ __STATIC_INLINE void LL_ADC_SetChannelSamplingTime(ADC_TypeDef *ADCx, uint32_t C
* of channel mapped on ADC group regular or injected.
* @note Conversion time is the addition of sampling time and processing time.
* Refer to reference manual for ADC processing time of
- * this STM32 serie.
+ * this STM32 series.
* @rmtoll SMPR0 SMP31 LL_ADC_GetChannelSamplingTime\n
* SMPR0 SMP30 LL_ADC_GetChannelSamplingTime\n
* SMPR1 SMP29 LL_ADC_GetChannelSamplingTime\n
@@ -4070,7 +4111,7 @@ __STATIC_INLINE uint32_t LL_ADC_GetChannelRouting(ADC_TypeDef *ADCx, uint32_t Ch
* @note In case of need to define a single channel to monitor
* with analog watchdog from sequencer channel definition,
* use helper macro @ref __LL_ADC_ANALOGWD_CHANNEL_GROUP().
- * @note On this STM32 serie, there is only 1 kind of analog watchdog
+ * @note On this STM32 series, there is only 1 kind of analog watchdog
* instance:
* - AWD standard (instance AWD1):
* - channels monitored: can monitor 1 channel or all channels.
@@ -4230,7 +4271,7 @@ __STATIC_INLINE void LL_ADC_SetAnalogWDMonitChannels(ADC_TypeDef *ADCx, uint32_t
* @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB().
* Applicable only when the analog watchdog is set to monitor
* one channel.
- * @note On this STM32 serie, there is only 1 kind of analog watchdog
+ * @note On this STM32 series, there is only 1 kind of analog watchdog
* instance:
* - AWD standard (instance AWD1):
* - channels monitored: can monitor 1 channel or all channels.
@@ -4359,7 +4400,7 @@ __STATIC_INLINE uint32_t LL_ADC_GetAnalogWDMonitChannels(ADC_TypeDef *ADCx)
* @note In case of ADC resolution different of 12 bits,
* analog watchdog thresholds data require a specific shift.
* Use helper macro @ref __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION().
- * @note On this STM32 serie, there is only 1 kind of analog watchdog
+ * @note On this STM32 series, there is only 1 kind of analog watchdog
* instance:
* - AWD standard (instance AWD1):
* - channels monitored: can monitor 1 channel or all channels.
@@ -4415,7 +4456,7 @@ __STATIC_INLINE uint32_t LL_ADC_GetAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_
/**
* @brief Enable the selected ADC instance.
- * @note On this STM32 serie, after ADC enable, a delay for
+ * @note On this STM32 series, after ADC enable, a delay for
* ADC internal analog stabilization is required before performing a
* ADC conversion start.
* Refer to device datasheet, parameter tSTAB.
@@ -4478,7 +4519,7 @@ __STATIC_INLINE uint32_t LL_ADC_IsEnabled(ADC_TypeDef *ADCx)
/**
* @brief Start ADC group regular conversion.
- * @note On this STM32 serie, this function is relevant only for
+ * @note On this STM32 series, this function is relevant only for
* internal trigger (SW start), not for external trigger:
* - If ADC trigger has been set to software start, ADC conversion
* starts immediately.
@@ -4501,7 +4542,7 @@ __STATIC_INLINE void LL_ADC_REG_StartConversionSWStart(ADC_TypeDef *ADCx)
* @brief Start ADC group regular conversion from external trigger.
* @note ADC conversion will start at next trigger event (on the selected
* trigger edge) following the ADC start conversion command.
- * @note On this STM32 serie, this function is relevant for
+ * @note On this STM32 series, this function is relevant for
* ADC conversion start from external trigger.
* If internal trigger (SW start) is needed, perform ADC conversion
* start using function @ref LL_ADC_REG_StartConversionSWStart().
@@ -4523,7 +4564,7 @@ __STATIC_INLINE void LL_ADC_REG_StartConversionExtTrig(ADC_TypeDef *ADCx, uint32
* @note No more ADC conversion will start at next trigger event
* following the ADC stop conversion command.
* If a conversion is on-going, it will be completed.
- * @note On this STM32 serie, there is no specific command
+ * @note On this STM32 series, there is no specific command
* to stop a conversion on-going or to stop ADC converting
* in continuous mode. These actions can be performed
* using function @ref LL_ADC_Disable().
@@ -4620,7 +4661,7 @@ __STATIC_INLINE uint8_t LL_ADC_REG_ReadConversionData6(ADC_TypeDef *ADCx)
/**
* @brief Start ADC group injected conversion.
- * @note On this STM32 serie, this function is relevant only for
+ * @note On this STM32 series, this function is relevant only for
* internal trigger (SW start), not for external trigger:
* - If ADC trigger has been set to software start, ADC conversion
* starts immediately.
@@ -4643,7 +4684,7 @@ __STATIC_INLINE void LL_ADC_INJ_StartConversionSWStart(ADC_TypeDef *ADCx)
* @brief Start ADC group injected conversion from external trigger.
* @note ADC conversion will start at next trigger event (on the selected
* trigger edge) following the ADC start conversion command.
- * @note On this STM32 serie, this function is relevant for
+ * @note On this STM32 series, this function is relevant for
* ADC conversion start from external trigger.
* If internal trigger (SW start) is needed, perform ADC conversion
* start using function @ref LL_ADC_INJ_StartConversionSWStart().
@@ -4665,7 +4706,7 @@ __STATIC_INLINE void LL_ADC_INJ_StartConversionExtTrig(ADC_TypeDef *ADCx, uint32
* @note No more ADC conversion will start at next trigger event
* following the ADC stop conversion command.
* If a conversion is on-going, it will be completed.
- * @note On this STM32 serie, there is no specific command
+ * @note On this STM32 series, there is no specific command
* to stop a conversion on-going or to stop ADC converting
* in continuous mode. These actions can be performed
* using function @ref LL_ADC_Disable().
@@ -4866,7 +4907,7 @@ __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_OVR(ADC_TypeDef *ADCx)
*/
__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_JEOS(ADC_TypeDef *ADCx)
{
- /* Note: on this STM32 serie, there is no flag ADC group injected */
+ /* Note: on this STM32 series, there is no flag ADC group injected */
/* end of unitary conversion. */
/* Flag noted as "JEOC" is corresponding to flag "JEOS" */
/* in other STM32 families). */
@@ -4919,7 +4960,7 @@ __STATIC_INLINE void LL_ADC_ClearFlag_OVR(ADC_TypeDef *ADCx)
*/
__STATIC_INLINE void LL_ADC_ClearFlag_JEOS(ADC_TypeDef *ADCx)
{
- /* Note: on this STM32 serie, there is no flag ADC group injected */
+ /* Note: on this STM32 series, there is no flag ADC group injected */
/* end of unitary conversion. */
/* Flag noted as "JEOC" is corresponding to flag "JEOS" */
/* in other STM32 families). */
@@ -4980,7 +5021,7 @@ __STATIC_INLINE void LL_ADC_EnableIT_OVR(ADC_TypeDef *ADCx)
*/
__STATIC_INLINE void LL_ADC_EnableIT_JEOS(ADC_TypeDef *ADCx)
{
- /* Note: on this STM32 serie, there is no flag ADC group injected */
+ /* Note: on this STM32 series, there is no flag ADC group injected */
/* end of unitary conversion. */
/* Flag noted as "JEOC" is corresponding to flag "JEOS" */
/* in other STM32 families). */
@@ -5033,7 +5074,7 @@ __STATIC_INLINE void LL_ADC_DisableIT_OVR(ADC_TypeDef *ADCx)
*/
__STATIC_INLINE void LL_ADC_DisableIT_JEOS(ADC_TypeDef *ADCx)
{
- /* Note: on this STM32 serie, there is no flag ADC group injected */
+ /* Note: on this STM32 series, there is no flag ADC group injected */
/* end of unitary conversion. */
/* Flag noted as "JEOC" is corresponding to flag "JEOS" */
/* in other STM32 families). */
@@ -5089,7 +5130,7 @@ __STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_OVR(ADC_TypeDef *ADCx)
*/
__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_JEOS(ADC_TypeDef *ADCx)
{
- /* Note: on this STM32 serie, there is no flag ADC group injected */
+ /* Note: on this STM32 series, there is no flag ADC group injected */
/* end of unitary conversion. */
/* Flag noted as "JEOC" is corresponding to flag "JEOS" */
/* in other STM32 families). */
@@ -5162,5 +5203,3 @@ void LL_ADC_INJ_StructInit(LL_ADC_INJ_InitTypeDef *ADC_INJ_InitStruct);
#endif
#endif /* __STM32L1xx_LL_ADC_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_bus.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_bus.h
index c4c1e0a6a6..0d058618c5 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_bus.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_bus.h
@@ -23,14 +23,12 @@
******************************************************************************
* @attention
*
- *
© Copyright(c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
*
+ * This software is licensed under terms that can be found in the LICENSE file in
+ * the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
******************************************************************************
*/
@@ -1100,4 +1098,3 @@ __STATIC_INLINE void LL_APB2_GRP1_DisableClockSleep(uint32_t Periphs)
#endif /* __STM32L1xx_LL_BUS_H */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_comp.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_comp.h
index 0c50b769ea..a702ba8518 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_comp.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_comp.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -562,7 +561,7 @@ __STATIC_INLINE uint32_t LL_COMP_GetInputPlus(COMP_TypeDef *COMPx)
*/
__STATIC_INLINE void LL_COMP_SetInputMinus(COMP_TypeDef *COMPx, uint32_t InputMinus)
{
- /* On this STM32 serie, only COMP instance COMP1 input minus is fixed to */
+ /* On this STM32 series, only COMP instance COMP1 input minus is fixed to */
/* VrefInt. Check of comparator instance is implemented to modify register */
/* only if COMP2 is selected. */
MODIFY_REG(COMP->CSR,
@@ -590,7 +589,7 @@ __STATIC_INLINE void LL_COMP_SetInputMinus(COMP_TypeDef *COMPx, uint32_t InputMi
*/
__STATIC_INLINE uint32_t LL_COMP_GetInputMinus(COMP_TypeDef *COMPx)
{
- /* On this STM32 serie, only COMP instance COMP1 input minus is fixed to */
+ /* On this STM32 series, only COMP instance COMP1 input minus is fixed to */
/* VrefInt. Check of comparator instance is implemented to return */
/* the comparator input plus depending on COMP instance selected. */
return (uint32_t)((READ_BIT(COMP->CSR, COMP_CSR_INSEL) * __COMP_IS_INSTANCE_EVEN(COMPx))
@@ -616,7 +615,7 @@ __STATIC_INLINE uint32_t LL_COMP_GetInputMinus(COMP_TypeDef *COMPx)
*/
__STATIC_INLINE void LL_COMP_SetInputPullingResistor(COMP_TypeDef *COMPx, uint32_t InputPullingResistor)
{
- /* On this STM32 serie, only COMP instance COMP1 has input pulling */
+ /* On this STM32 series, only COMP instance COMP1 has input pulling */
/* resistor. Check of comparator instance is implemented to modify register */
/* only if COMP1 is selected. */
MODIFY_REG(COMP->CSR,
@@ -642,11 +641,11 @@ __STATIC_INLINE void LL_COMP_SetInputPullingResistor(COMP_TypeDef *COMPx, uint32
*/
__STATIC_INLINE uint32_t LL_COMP_GetInputPullingResistor(COMP_TypeDef *COMPx)
{
- /* On this STM32 serie, only COMP instance COMP1 has input pulling */
+ /* On this STM32 series, only COMP instance COMP1 has input pulling */
/* resistor. Check of comparator instance is implemented to return */
/* the comparator input pulling resistor depending on COMP instance */
/* selected. */
- /* On this STM32 serie, only COMP instance COMP1 input minus is fixed to */
+ /* On this STM32 series, only COMP instance COMP1 input minus is fixed to */
/* VrefInt. Check of comparator instance is implemented to return */
/* the comparator input plus depending on COMP instance selected. */
return (uint32_t)((READ_BIT(COMP->CSR, (COMP_CSR_10KPU | COMP_CSR_400KPU | COMP_CSR_10KPD | COMP_CSR_400KPD)) * __COMP_IS_INSTANCE_ODD(COMPx))
@@ -684,7 +683,7 @@ __STATIC_INLINE uint32_t LL_COMP_GetInputPullingResistor(COMP_TypeDef *COMPx)
*/
__STATIC_INLINE void LL_COMP_SetOutputSelection(COMP_TypeDef *COMPx, uint32_t OutputSelection)
{
- /* On this STM32 serie, only COMP instance COMP2 has feature output */
+ /* On this STM32 series, only COMP instance COMP2 has feature output */
/* selection. Check of comparator instance is implemented to modify register*/
/* only if COMP2 is selected. */
MODIFY_REG(COMP->CSR,
@@ -714,7 +713,7 @@ __STATIC_INLINE void LL_COMP_SetOutputSelection(COMP_TypeDef *COMPx, uint32_t Ou
*/
__STATIC_INLINE uint32_t LL_COMP_GetOutputSelection(COMP_TypeDef *COMPx)
{
- /* On this STM32 serie, only COMP instance COMP2 has feature output */
+ /* On this STM32 series, only COMP instance COMP2 has feature output */
/* selection. Check of comparator instance is implemented to return */
/* the comparator output depending on COMP instance selected. */
return (uint32_t)((READ_BIT(COMP->CSR, COMP_CSR_OUTSEL) * __COMP_IS_INSTANCE_EVEN(COMPx))
@@ -738,7 +737,7 @@ __STATIC_INLINE uint32_t LL_COMP_GetOutputSelection(COMP_TypeDef *COMPx)
* CSR COMP_CSR_INSEL LL_COMP_Enable
* @param COMPx Comparator instance (1)
*
- * (1) On this STM32 serie, the only COMP instance that can be enabled
+ * (1) On this STM32 series, the only COMP instance that can be enabled
* using this function is COMP1.
* COMP2 is enabled by setting input minus.
* Refer to function @ref LL_COMP_SetInputMinus().
@@ -746,7 +745,7 @@ __STATIC_INLINE uint32_t LL_COMP_GetOutputSelection(COMP_TypeDef *COMPx)
*/
__STATIC_INLINE void LL_COMP_Enable(COMP_TypeDef *COMPx)
{
- /* On this STM32 serie, only COMP instance COMP1 has a dedicated bit */
+ /* On this STM32 series, only COMP instance COMP1 has a dedicated bit */
/* for comparator enable. Check of comparator instance is implemented */
/* to modify register only if COMP1 is selected. */
SET_BIT(COMP->CSR, __COMP_IS_INSTANCE_ODD(COMPx) << LL_COMP_ENABLE_COMP1_BITOFFSET_POS);
@@ -754,7 +753,7 @@ __STATIC_INLINE void LL_COMP_Enable(COMP_TypeDef *COMPx)
/**
* @brief Disable comparator instance.
- * @note On this STM32 serie, COMP2 is disabled by clearing input minus
+ * @note On this STM32 series, COMP2 is disabled by clearing input minus
* selection. If COMP2 must be enabled afterwards, input minus must
* be set. Refer to function @ref LL_COMP_SetInputMinus().
* @rmtoll CSR COMP1EN LL_COMP_Disable\n
@@ -764,7 +763,7 @@ __STATIC_INLINE void LL_COMP_Enable(COMP_TypeDef *COMPx)
*/
__STATIC_INLINE void LL_COMP_Disable(COMP_TypeDef *COMPx)
{
- /* Note: On this STM32 serie, COMP2 is enabled by setting input minus. */
+ /* Note: On this STM32 series, COMP2 is enabled by setting input minus. */
/* Refer to function @ref LL_COMP_SetInputMinus(). */
/* To disable COMP2, bitfield of input minus selection is reset. */
CLEAR_BIT(COMP->CSR, (COMP_CSR_CMP1EN * __COMP_IS_INSTANCE_ODD(COMPx)) | (COMP_CSR_INSEL * __COMP_IS_INSTANCE_EVEN(COMPx)));
@@ -785,7 +784,7 @@ __STATIC_INLINE uint32_t LL_COMP_IsEnabled(COMP_TypeDef *COMPx)
/**
* @brief Read comparator instance output level.
- * @note On this STM32 serie, comparator polarity is not settable
+ * @note On this STM32 series, comparator polarity is not settable
* and not inverted:
* - Comparator output is low when the input plus
* is at a lower voltage than the input minus
@@ -844,4 +843,3 @@ void LL_COMP_StructInit(LL_COMP_InitTypeDef *COMP_InitStruct);
#endif /* __STM32L1xx_LL_COMP_H */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_cortex.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_cortex.h
index c08339efb9..f2100160cb 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_cortex.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_cortex.h
@@ -10,7 +10,7 @@
[..]
The LL CORTEX driver contains a set of generic APIs that can be
used by user:
- (+) SYSTICK configuration used by @ref LL_mDelay and @ref LL_Init1msTick
+ (+) SYSTICK configuration used by LL_mDelay and LL_Init1msTick
functions
(+) Low power mode configuration (SCB register of Cortex-MCU)
(+) MPU API to configure and enable regions
@@ -21,13 +21,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file in
+ * the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -636,4 +635,3 @@ __STATIC_INLINE void LL_MPU_DisableRegion(uint32_t Region)
#endif /* __STM32L1xx_LL_CORTEX_H */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_crc.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_crc.h
index f91f010539..bd9661cbb0 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_crc.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_crc.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -136,7 +135,7 @@ __STATIC_INLINE void LL_CRC_FeedData32(CRC_TypeDef *CRCx, uint32_t InData)
* @param CRCx CRC Instance
* @retval Current CRC calculation result as stored in CRC_DR register (32 bits).
*/
-__STATIC_INLINE uint32_t LL_CRC_ReadData32(CRC_TypeDef *CRCx)
+__STATIC_INLINE uint32_t LL_CRC_ReadData32(const CRC_TypeDef *CRCx)
{
return (uint32_t)(READ_REG(CRCx->DR));
}
@@ -174,7 +173,7 @@ __STATIC_INLINE void LL_CRC_Write_IDR(CRC_TypeDef *CRCx, uint32_t InData)
* @{
*/
-ErrorStatus LL_CRC_DeInit(CRC_TypeDef *CRCx);
+ErrorStatus LL_CRC_DeInit(const CRC_TypeDef *CRCx);
/**
* @}
@@ -200,5 +199,3 @@ ErrorStatus LL_CRC_DeInit(CRC_TypeDef *CRCx);
#endif
#endif /* STM32L1xx_LL_CRC_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_dac.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_dac.h
index 9d161fe13a..f1330f27bd 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_dac.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_dac.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -471,12 +470,10 @@ typedef struct
* @arg @ref LL_DAC_RESOLUTION_8B
* @retval DAC conversion data (unit: digital value)
*/
-#define __LL_DAC_CALC_VOLTAGE_TO_DATA(__VREFANALOG_VOLTAGE__,\
- __DAC_VOLTAGE__,\
- __DAC_RESOLUTION__) \
-((__DAC_VOLTAGE__) * __LL_DAC_DIGITAL_SCALE(__DAC_RESOLUTION__) \
- / (__VREFANALOG_VOLTAGE__) \
-)
+#define __LL_DAC_CALC_VOLTAGE_TO_DATA(__VREFANALOG_VOLTAGE__, __DAC_VOLTAGE__, __DAC_RESOLUTION__) \
+ ((__DAC_VOLTAGE__) * __LL_DAC_DIGITAL_SCALE(__DAC_RESOLUTION__) \
+ / (__VREFANALOG_VOLTAGE__) \
+ )
/**
* @}
@@ -491,6 +488,7 @@ typedef struct
/** @defgroup DAC_LL_Exported_Functions DAC Exported Functions
* @{
*/
+
/**
* @brief Set the conversion trigger source for the selected DAC channel.
* @note For conversion trigger source to be effective, DAC trigger
@@ -543,7 +541,7 @@ __STATIC_INLINE void LL_DAC_SetTriggerSource(DAC_TypeDef *DACx, uint32_t DAC_Cha
* @arg @ref LL_DAC_TRIG_EXT_TIM9_TRGO
* @arg @ref LL_DAC_TRIG_EXT_EXTI_LINE9
*/
-__STATIC_INLINE uint32_t LL_DAC_GetTriggerSource(DAC_TypeDef *DACx, uint32_t DAC_Channel)
+__STATIC_INLINE uint32_t LL_DAC_GetTriggerSource(const DAC_TypeDef *DACx, uint32_t DAC_Channel)
{
return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_TSEL1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
>> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
@@ -586,7 +584,7 @@ __STATIC_INLINE void LL_DAC_SetWaveAutoGeneration(DAC_TypeDef *DACx, uint32_t DA
* @arg @ref LL_DAC_WAVE_AUTO_GENERATION_NOISE
* @arg @ref LL_DAC_WAVE_AUTO_GENERATION_TRIANGLE
*/
-__STATIC_INLINE uint32_t LL_DAC_GetWaveAutoGeneration(DAC_TypeDef *DACx, uint32_t DAC_Channel)
+__STATIC_INLINE uint32_t LL_DAC_GetWaveAutoGeneration(const DAC_TypeDef *DACx, uint32_t DAC_Channel)
{
return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_WAVE1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
>> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
@@ -652,7 +650,7 @@ __STATIC_INLINE void LL_DAC_SetWaveNoiseLFSR(DAC_TypeDef *DACx, uint32_t DAC_Cha
* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS10_0
* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS11_0
*/
-__STATIC_INLINE uint32_t LL_DAC_GetWaveNoiseLFSR(DAC_TypeDef *DACx, uint32_t DAC_Channel)
+__STATIC_INLINE uint32_t LL_DAC_GetWaveNoiseLFSR(const DAC_TypeDef *DACx, uint32_t DAC_Channel)
{
return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
>> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
@@ -719,7 +717,7 @@ __STATIC_INLINE void LL_DAC_SetWaveTriangleAmplitude(DAC_TypeDef *DACx, uint32_t
* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_2047
* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_4095
*/
-__STATIC_INLINE uint32_t LL_DAC_GetWaveTriangleAmplitude(DAC_TypeDef *DACx, uint32_t DAC_Channel)
+__STATIC_INLINE uint32_t LL_DAC_GetWaveTriangleAmplitude(const DAC_TypeDef *DACx, uint32_t DAC_Channel)
{
return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
>> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
@@ -758,7 +756,7 @@ __STATIC_INLINE void LL_DAC_SetOutputBuffer(DAC_TypeDef *DACx, uint32_t DAC_Chan
* @arg @ref LL_DAC_OUTPUT_BUFFER_ENABLE
* @arg @ref LL_DAC_OUTPUT_BUFFER_DISABLE
*/
-__STATIC_INLINE uint32_t LL_DAC_GetOutputBuffer(DAC_TypeDef *DACx, uint32_t DAC_Channel)
+__STATIC_INLINE uint32_t LL_DAC_GetOutputBuffer(const DAC_TypeDef *DACx, uint32_t DAC_Channel)
{
return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_BOFF1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
>> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
@@ -820,7 +818,7 @@ __STATIC_INLINE void LL_DAC_DisableDMAReq(DAC_TypeDef *DACx, uint32_t DAC_Channe
* @arg @ref LL_DAC_CHANNEL_2
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_DAC_IsDMAReqEnabled(DAC_TypeDef *DACx, uint32_t DAC_Channel)
+__STATIC_INLINE uint32_t LL_DAC_IsDMAReqEnabled(const DAC_TypeDef *DACx, uint32_t DAC_Channel)
{
return ((READ_BIT(DACx->CR,
DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
@@ -859,7 +857,7 @@ __STATIC_INLINE uint32_t LL_DAC_IsDMAReqEnabled(DAC_TypeDef *DACx, uint32_t DAC_
* @arg @ref LL_DAC_DMA_REG_DATA_8BITS_RIGHT_ALIGNED
* @retval DAC register address
*/
-__STATIC_INLINE uint32_t LL_DAC_DMA_GetRegAddr(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Register)
+__STATIC_INLINE uint32_t LL_DAC_DMA_GetRegAddr(const DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Register)
{
/* Retrieve address of register DHR12Rx, DHR12Lx or DHR8Rx depending on */
/* DAC channel selected. */
@@ -920,7 +918,7 @@ __STATIC_INLINE void LL_DAC_Disable(DAC_TypeDef *DACx, uint32_t DAC_Channel)
* @arg @ref LL_DAC_CHANNEL_2
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_DAC_IsEnabled(DAC_TypeDef *DACx, uint32_t DAC_Channel)
+__STATIC_INLINE uint32_t LL_DAC_IsEnabled(const DAC_TypeDef *DACx, uint32_t DAC_Channel)
{
return ((READ_BIT(DACx->CR,
DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
@@ -978,7 +976,7 @@ __STATIC_INLINE void LL_DAC_DisableTrigger(DAC_TypeDef *DACx, uint32_t DAC_Chann
* @arg @ref LL_DAC_CHANNEL_2
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_DAC_IsTriggerEnabled(DAC_TypeDef *DACx, uint32_t DAC_Channel)
+__STATIC_INLINE uint32_t LL_DAC_IsTriggerEnabled(const DAC_TypeDef *DACx, uint32_t DAC_Channel)
{
return ((READ_BIT(DACx->CR,
DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
@@ -1151,7 +1149,7 @@ __STATIC_INLINE void LL_DAC_ConvertDualData8RightAligned(DAC_TypeDef *DACx, uint
* @arg @ref LL_DAC_CHANNEL_2
* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
*/
-__STATIC_INLINE uint32_t LL_DAC_RetrieveOutputData(DAC_TypeDef *DACx, uint32_t DAC_Channel)
+__STATIC_INLINE uint32_t LL_DAC_RetrieveOutputData(const DAC_TypeDef *DACx, uint32_t DAC_Channel)
{
__IO uint32_t const *preg = __DAC_PTR_REG_OFFSET(DACx->DOR1, (DAC_Channel >> DAC_REG_DORX_REGOFFSET_BITOFFSET_POS)
& DAC_REG_DORX_REGOFFSET_MASK_POSBIT0);
@@ -1173,7 +1171,7 @@ __STATIC_INLINE uint32_t LL_DAC_RetrieveOutputData(DAC_TypeDef *DACx, uint32_t D
* @param DACx DAC instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_DAC_IsActiveFlag_DMAUDR1(DAC_TypeDef *DACx)
+__STATIC_INLINE uint32_t LL_DAC_IsActiveFlag_DMAUDR1(const DAC_TypeDef *DACx)
{
return ((READ_BIT(DACx->SR, LL_DAC_FLAG_DMAUDR1) == (LL_DAC_FLAG_DMAUDR1)) ? 1UL : 0UL);
}
@@ -1185,7 +1183,7 @@ __STATIC_INLINE uint32_t LL_DAC_IsActiveFlag_DMAUDR1(DAC_TypeDef *DACx)
* @param DACx DAC instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_DAC_IsActiveFlag_DMAUDR2(DAC_TypeDef *DACx)
+__STATIC_INLINE uint32_t LL_DAC_IsActiveFlag_DMAUDR2(const DAC_TypeDef *DACx)
{
return ((READ_BIT(DACx->SR, LL_DAC_FLAG_DMAUDR2) == (LL_DAC_FLAG_DMAUDR2)) ? 1UL : 0UL);
}
@@ -1277,7 +1275,7 @@ __STATIC_INLINE void LL_DAC_DisableIT_DMAUDR2(DAC_TypeDef *DACx)
* @param DACx DAC instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_DAC_IsEnabledIT_DMAUDR1(DAC_TypeDef *DACx)
+__STATIC_INLINE uint32_t LL_DAC_IsEnabledIT_DMAUDR1(const DAC_TypeDef *DACx)
{
return ((READ_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE1) == (LL_DAC_IT_DMAUDRIE1)) ? 1UL : 0UL);
}
@@ -1289,7 +1287,7 @@ __STATIC_INLINE uint32_t LL_DAC_IsEnabledIT_DMAUDR1(DAC_TypeDef *DACx)
* @param DACx DAC instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_DAC_IsEnabledIT_DMAUDR2(DAC_TypeDef *DACx)
+__STATIC_INLINE uint32_t LL_DAC_IsEnabledIT_DMAUDR2(const DAC_TypeDef *DACx)
{
return ((READ_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE2) == (LL_DAC_IT_DMAUDRIE2)) ? 1UL : 0UL);
}
@@ -1304,8 +1302,8 @@ __STATIC_INLINE uint32_t LL_DAC_IsEnabledIT_DMAUDR2(DAC_TypeDef *DACx)
* @{
*/
-ErrorStatus LL_DAC_DeInit(DAC_TypeDef *DACx);
-ErrorStatus LL_DAC_Init(DAC_TypeDef *DACx, uint32_t DAC_Channel, LL_DAC_InitTypeDef *DAC_InitStruct);
+ErrorStatus LL_DAC_DeInit(const DAC_TypeDef *DACx);
+ErrorStatus LL_DAC_Init(DAC_TypeDef *DACx, uint32_t DAC_Channel, const LL_DAC_InitTypeDef *DAC_InitStruct);
void LL_DAC_StructInit(LL_DAC_InitTypeDef *DAC_InitStruct);
/**
@@ -1332,5 +1330,3 @@ void LL_DAC_StructInit(LL_DAC_InitTypeDef *DAC_InitStruct);
#endif
#endif /* STM32L1xx_LL_DAC_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_dma.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_dma.h
index c66e4ba869..9aebdeed88 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_dma.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_dma.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -945,7 +944,7 @@ __STATIC_INLINE uint32_t LL_DMA_GetDataLength(DMA_TypeDef *DMAx, uint32_t Channe
/**
* @brief Configure the Source and Destination addresses.
* @note This API must not be called when the DMA channel is enabled.
- * @note Each IP using DMA provides an API to get directly the register adress (LL_PPP_DMA_GetRegAddr).
+ * @note Each IP using DMA provides an API to get directly the register address (LL_PPP_DMA_GetRegAddr).
* @rmtoll CPAR PA LL_DMA_ConfigAddresses\n
* CMAR MA LL_DMA_ConfigAddresses
* @param DMAx DMAx Instance
@@ -1994,4 +1993,3 @@ void LL_DMA_StructInit(LL_DMA_InitTypeDef *DMA_InitStruct);
#endif /* __STM32L1xx_LL_DMA_H */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_exti.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_exti.h
index e6b20d0937..77d8e63fe3 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_exti.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_exti.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_fsmc.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_fsmc.h
index 62d1bded95..ea4e7cecbd 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_fsmc.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_fsmc.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -529,5 +528,3 @@ HAL_StatusTypeDef FSMC_NORSRAM_WriteOperation_Disable(FSMC_NORSRAM_TypeDef *Dev
#endif
#endif /* STM32L1xx_LL_FSMC_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_gpio.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_gpio.h
index 60938461a2..2de80e7de7 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_gpio.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_gpio.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -986,4 +985,3 @@ void LL_GPIO_StructInit(LL_GPIO_InitTypeDef *GPIO_InitStruct);
#endif /* __STM32L1xx_LL_GPIO_H */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_i2c.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_i2c.h
index 7ad74e8334..b8649b3a4b 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_i2c.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_i2c.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -241,7 +240,7 @@ typedef struct
* @}
*/
-/** @defgroup I2C_LL_EM_Exported_Macros_Helper Exported_Macros_Helper
+/** @defgroup I2C_LL_EM_Exported_Macros_Helper Exported Macros Helper
* @{
*/
@@ -762,7 +761,7 @@ __STATIC_INLINE void LL_I2C_ConfigSpeed(I2C_TypeDef *I2Cx, uint32_t PeriphClock,
/**
* @brief Configure peripheral mode.
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll CR1 SMBUS LL_I2C_SetMode\n
* CR1 SMBTYPE LL_I2C_SetMode\n
@@ -782,7 +781,7 @@ __STATIC_INLINE void LL_I2C_SetMode(I2C_TypeDef *I2Cx, uint32_t PeripheralMode)
/**
* @brief Get peripheral mode.
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll CR1 SMBUS LL_I2C_GetMode\n
* CR1 SMBTYPE LL_I2C_GetMode\n
@@ -801,7 +800,7 @@ __STATIC_INLINE uint32_t LL_I2C_GetMode(I2C_TypeDef *I2Cx)
/**
* @brief Enable SMBus alert (Host or Device mode)
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @note SMBus Device mode:
* - SMBus Alert pin is drived low and
@@ -819,7 +818,7 @@ __STATIC_INLINE void LL_I2C_EnableSMBusAlert(I2C_TypeDef *I2Cx)
/**
* @brief Disable SMBus alert (Host or Device mode)
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @note SMBus Device mode:
* - SMBus Alert pin is not drived (can be used as a standard GPIO) and
@@ -837,7 +836,7 @@ __STATIC_INLINE void LL_I2C_DisableSMBusAlert(I2C_TypeDef *I2Cx)
/**
* @brief Check if SMBus alert (Host or Device mode) is enabled or disabled.
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll CR1 ALERT LL_I2C_IsEnabledSMBusAlert
* @param I2Cx I2C Instance.
@@ -850,7 +849,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusAlert(I2C_TypeDef *I2Cx)
/**
* @brief Enable SMBus Packet Error Calculation (PEC).
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll CR1 ENPEC LL_I2C_EnableSMBusPEC
* @param I2Cx I2C Instance.
@@ -863,7 +862,7 @@ __STATIC_INLINE void LL_I2C_EnableSMBusPEC(I2C_TypeDef *I2Cx)
/**
* @brief Disable SMBus Packet Error Calculation (PEC).
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll CR1 ENPEC LL_I2C_DisableSMBusPEC
* @param I2Cx I2C Instance.
@@ -876,7 +875,7 @@ __STATIC_INLINE void LL_I2C_DisableSMBusPEC(I2C_TypeDef *I2Cx)
/**
* @brief Check if SMBus Packet Error Calculation (PEC) is enabled or disabled.
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll CR1 ENPEC LL_I2C_IsEnabledSMBusPEC
* @param I2Cx I2C Instance.
@@ -1059,7 +1058,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_BUF(I2C_TypeDef *I2Cx)
/**
* @brief Enable Error interrupts.
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @note Any of these errors will generate interrupt :
* Bus Error detection (BERR)
@@ -1080,7 +1079,7 @@ __STATIC_INLINE void LL_I2C_EnableIT_ERR(I2C_TypeDef *I2Cx)
/**
* @brief Disable Error interrupts.
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @note Any of these errors will generate interrupt :
* Bus Error detection (BERR)
@@ -1263,7 +1262,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_OVR(I2C_TypeDef *I2Cx)
/**
* @brief Indicate the status of SMBus PEC error flag in reception.
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll SR1 PECERR LL_I2C_IsActiveSMBusFlag_PECERR
* @param I2Cx I2C Instance.
@@ -1276,7 +1275,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_PECERR(I2C_TypeDef *I2Cx)
/**
* @brief Indicate the status of SMBus Timeout detection flag.
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll SR1 TIMEOUT LL_I2C_IsActiveSMBusFlag_TIMEOUT
* @param I2Cx I2C Instance.
@@ -1289,7 +1288,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_TIMEOUT(I2C_TypeDef *I2Cx)
/**
* @brief Indicate the status of SMBus alert flag.
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll SR1 SMBALERT LL_I2C_IsActiveSMBusFlag_ALERT
* @param I2Cx I2C Instance.
@@ -1328,7 +1327,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_DUAL(I2C_TypeDef *I2Cx)
/**
* @brief Indicate the status of SMBus Host address reception (Slave mode).
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @note RESET: No SMBus Host address
* SET: SMBus Host address received.
@@ -1344,7 +1343,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_SMBHOST(I2C_TypeDef *I2Cx)
/**
* @brief Indicate the status of SMBus Device default address reception (Slave mode).
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @note RESET: No SMBus Device default address
* SET: SMBus Device default address received.
@@ -1476,7 +1475,7 @@ __STATIC_INLINE void LL_I2C_ClearSMBusFlag_PECERR(I2C_TypeDef *I2Cx)
/**
* @brief Clear SMBus Timeout detection flag.
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll SR1 TIMEOUT LL_I2C_ClearSMBusFlag_TIMEOUT
* @param I2Cx I2C Instance.
@@ -1489,7 +1488,7 @@ __STATIC_INLINE void LL_I2C_ClearSMBusFlag_TIMEOUT(I2C_TypeDef *I2Cx)
/**
* @brief Clear SMBus Alert flag.
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll SR1 SMBALERT LL_I2C_ClearSMBusFlag_ALERT
* @param I2Cx I2C Instance.
@@ -1667,7 +1666,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsEnabledLastDMA(I2C_TypeDef *I2Cx)
/**
* @brief Enable transfer or internal comparison of the SMBus Packet Error byte (transmission or reception mode).
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @note This feature is cleared by hardware when the PEC byte is transferred or compared,
* or by a START or STOP condition, it is also cleared by software.
@@ -1682,7 +1681,7 @@ __STATIC_INLINE void LL_I2C_EnableSMBusPECCompare(I2C_TypeDef *I2Cx)
/**
* @brief Disable transfer or internal comparison of the SMBus Packet Error byte (transmission or reception mode).
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll CR1 PEC LL_I2C_DisableSMBusPECCompare
* @param I2Cx I2C Instance.
@@ -1695,7 +1694,7 @@ __STATIC_INLINE void LL_I2C_DisableSMBusPECCompare(I2C_TypeDef *I2Cx)
/**
* @brief Check if the SMBus Packet Error byte transfer or internal comparison is requested or not.
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll CR1 PEC LL_I2C_IsEnabledSMBusPECCompare
* @param I2Cx I2C Instance.
@@ -1708,7 +1707,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusPECCompare(I2C_TypeDef *I2Cx)
/**
* @brief Get the SMBus Packet Error byte calculated.
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll SR2 PEC LL_I2C_GetSMBusPEC
* @param I2Cx I2C Instance.
@@ -1781,4 +1780,3 @@ void LL_I2C_StructInit(LL_I2C_InitTypeDef *I2C_InitStruct);
#endif /* __STM32L1xx_LL_I2C_H */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_iwdg.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_iwdg.h
index 00d607087e..3f09e065a8 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_iwdg.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_iwdg.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -301,5 +300,3 @@ __STATIC_INLINE uint32_t LL_IWDG_IsReady(IWDG_TypeDef *IWDGx)
#endif
#endif /* STM32L1xx_LL_IWDG_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_opamp.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_opamp.h
index da3814dd02..5e793939f8 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_opamp.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_opamp.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -175,8 +174,8 @@ typedef struct
/** @defgroup OPAMP_LL_EC_POWERSUPPLY_RANGE OPAMP power supply range
* @{
*/
-#define LL_OPAMP_POWERSUPPLY_RANGE_LOW (0x00000000U) /*!< Power supply range low. On STM32L1 serie: Vdda lower than 2.4V. */
-#define LL_OPAMP_POWERSUPPLY_RANGE_HIGH (OPAMP_CSR_AOP_RANGE) /*!< Power supply range high. On STM32L1 serie: Vdda higher than 2.4V. */
+#define LL_OPAMP_POWERSUPPLY_RANGE_LOW (0x00000000U) /*!< Power supply range low. On STM32L1 series: Vdda lower than 2.4V. */
+#define LL_OPAMP_POWERSUPPLY_RANGE_HIGH (OPAMP_CSR_AOP_RANGE) /*!< Power supply range high. On STM32L1 series: Vdda higher than 2.4V. */
/**
* @}
*/
@@ -194,7 +193,7 @@ typedef struct
* @{
*/
#define LL_OPAMP_MODE_FUNCTIONAL (0x00000000U) /*!< OPAMP functional mode */
-#define LL_OPAMP_MODE_CALIBRATION (OPAMP_CSR_S3SEL1 | OPAMP_CSR_S4SEL1 | OPAMP_CSR_S5SEL1 | OPAMP_CSR_S6SEL1 | OPAMP_CSR_S7SEL2) /*!< OPAMP calibration mode (on STM32L1 serie, it corresponds to all OPAMP input internal switches opened) */
+#define LL_OPAMP_MODE_CALIBRATION (OPAMP_CSR_S3SEL1 | OPAMP_CSR_S4SEL1 | OPAMP_CSR_S5SEL1 | OPAMP_CSR_S6SEL1 | OPAMP_CSR_S7SEL2) /*!< OPAMP calibration mode (on STM32L1 series, it corresponds to all OPAMP input internal switches opened) */
/**
* @}
*/
@@ -202,8 +201,8 @@ typedef struct
/** @defgroup OPAMP_LL_EC_FUNCTIONAL_MODE OPAMP functional mode
* @{
*/
-#define LL_OPAMP_MODE_STANDALONE (0x00000000U) /*!< OPAMP functional mode, OPAMP operation in standalone (on STM32L1 serie, it corresponds to OPAMP internal switches S3 opened (switch SanB state depends on switch S4 state)) */
-#define LL_OPAMP_MODE_FOLLOWER (OPAMP_CSR_S3SEL1) /*!< OPAMP functional mode, OPAMP operation in follower (on STM32L1 serie, it corresponds to OPAMP internal switches S3 and SanB closed) */
+#define LL_OPAMP_MODE_STANDALONE (0x00000000U) /*!< OPAMP functional mode, OPAMP operation in standalone (on STM32L1 series, it corresponds to OPAMP internal switches S3 opened (switch SanB state depends on switch S4 state)) */
+#define LL_OPAMP_MODE_FOLLOWER (OPAMP_CSR_S3SEL1) /*!< OPAMP functional mode, OPAMP operation in follower (on STM32L1 series, it corresponds to OPAMP internal switches S3 and SanB closed) */
/**
* @}
*/
@@ -225,7 +224,7 @@ typedef struct
* @{
*/
#define LL_OPAMP_INPUT_INVERT_IO0 (OPAMP_CSR_S4SEL1) /*!< OPAMP inverting input connected to GPIO pin (low leakage input). Note: OPAMP inverting input is used with OPAMP in mode standalone. Otherwise (OPAMP in mode follower), OPAMP inverting input is not used (not connected to GPIO pin). */
-#define LL_OPAMP_INPUT_INVERT_IO1 (OPAMP_CSR_ANAWSEL1) /*!< OPAMP inverting input connected to GPIO pin (alternative IO pin, not low leakage, availability depends on STM32L1 serie devices packages). Note: OPAMP inverting input is used with OPAMP in mode standalone. Otherwise (OPAMP in mode follower), OPAMP inverting input is not used (not connected to GPIO pin). */
+#define LL_OPAMP_INPUT_INVERT_IO1 (OPAMP_CSR_ANAWSEL1) /*!< OPAMP inverting input connected to GPIO pin (alternative IO pin, not low leakage, availability depends on STM32L1 series devices packages). Note: OPAMP inverting input is used with OPAMP in mode standalone. Otherwise (OPAMP in mode follower), OPAMP inverting input is not used (not connected to GPIO pin). */
#define LL_OPAMP_INPUT_INVERT_CONNECT_NO (0x00000000U) /*!< OPAMP inverting input not externally connected (intended for OPAMP in mode follower) */
/**
* @}
@@ -251,7 +250,7 @@ typedef struct
*/
/** @defgroup OPAMP_LL_EC_HW_DELAYS Definitions of OPAMP hardware constraints delays
- * @note Only OPAMP IP HW delays are defined in OPAMP LL driver driver,
+ * @note Only OPAMP peripheral HW delays are defined in OPAMP LL driver driver,
* not timeout values.
* For details on delays values, refer to descriptions in source code
* above each literal definition.
@@ -369,7 +368,7 @@ typedef struct
* @brief Set OPAMP power range.
* @note The OPAMP power range applies to several OPAMP instances
* (if several OPAMP instances available on the selected device).
- * @note On this STM32 serie, setting of this feature is conditioned to
+ * @note On this STM32 series, setting of this feature is conditioned to
* OPAMP state:
* All OPAMP instances of the OPAMP common group must be disabled.
* This check can be done with function @ref LL_OPAMP_IsEnabled() for each
@@ -466,8 +465,8 @@ __STATIC_INLINE uint32_t LL_OPAMP_GetPowerMode(OPAMP_TypeDef *OPAMPx)
* @ref LL_OPAMP_SetFunctionalMode().
* - calibration mode: offset calibration of the selected
* transistors differential pair NMOS or PMOS.
- * @note On this STM32 serie, entering in calibration mode makes
- * loosing OPAMP internal switches configuration.
+ * @note On this STM32 series, entering in calibration mode makes
+ * losing OPAMP internal switches configuration.
* Therefore, when going back to functional mode,
* functional mode must be set again using
* @ref LL_OPAMP_SetFunctionalMode().
@@ -619,7 +618,7 @@ __STATIC_INLINE uint32_t LL_OPAMP_GetInputNonInverting(OPAMP_TypeDef *OPAMPx)
* @arg @ref LL_OPAMP_INPUT_INVERT_IO1 (1)
* @arg @ref LL_OPAMP_INPUT_INVERT_CONNECT_NO
*
- * (1) Alternative IO pin, not low leakage, availability depends on STM32L1 serie devices packages.
+ * (1) Alternative IO pin, not low leakage, availability depends on STM32L1 series devices packages.
* @retval None
*/
__STATIC_INLINE void LL_OPAMP_SetInputInverting(OPAMP_TypeDef *OPAMPx, uint32_t InputInverting)
@@ -640,7 +639,7 @@ __STATIC_INLINE void LL_OPAMP_SetInputInverting(OPAMP_TypeDef *OPAMPx, uint32_t
* @arg @ref LL_OPAMP_INPUT_INVERT_IO1 (1)
* @arg @ref LL_OPAMP_INPUT_INVERT_CONNECT_NO
*
- * (1) Alternative IO pin, not low leakage, availability depends on STM32L1 serie devices packages.
+ * (1) Alternative IO pin, not low leakage, availability depends on STM32L1 series devices packages.
*/
__STATIC_INLINE uint32_t LL_OPAMP_GetInputInverting(OPAMP_TypeDef *OPAMPx)
{
@@ -680,7 +679,7 @@ __STATIC_INLINE uint32_t LL_OPAMP_GetInputInverting(OPAMP_TypeDef *OPAMPx)
*/
__STATIC_INLINE void LL_OPAMP_SetCommonTrimmingMode(OPAMP_Common_TypeDef *OPAMPxy_COMMON, uint32_t TrimmingMode)
{
- /* Note: On STM32L1 serie, OPAMP trimming mode bit "OPAMP_OTR_OT_USER" is */
+ /* Note: On STM32L1 series, OPAMP trimming mode bit "OPAMP_OTR_OT_USER" is */
/* write only, cannot be read. */
MODIFY_REG(OPAMPxy_COMMON->OTR,
OPAMP_OTR_OT_USER,
@@ -771,7 +770,7 @@ __STATIC_INLINE uint32_t LL_OPAMP_IsCalibrationOutputSet(OPAMP_TypeDef *OPAMPx)
* @brief Set OPAMP trimming factor for the selected transistors
* differential pair NMOS or PMOS, corresponding to the selected
* power mode.
- * @note On STM32L1 serie, OPAMP trimming mode must be re-configured
+ * @note On STM32L1 series, OPAMP trimming mode must be re-configured
* at each update of trimming values in power mode normal.
* Refer to function @ref LL_OPAMP_SetCommonTrimmingMode().
* @rmtoll OTR AOx_OPT_OFFSET_TRIM_HIGH LL_OPAMP_SetTrimmingValue\n
@@ -790,7 +789,7 @@ __STATIC_INLINE uint32_t LL_OPAMP_IsCalibrationOutputSet(OPAMP_TypeDef *OPAMPx)
*/
__STATIC_INLINE void LL_OPAMP_SetTrimmingValue(OPAMP_TypeDef* OPAMPx, uint32_t PowerMode, uint32_t TransistorsDiffPair, uint32_t TrimmingValue)
{
- uint32_t *preg = __OPAMP_PTR_REG_OFFSET(OPAMP->OTR, (PowerMode & OPAMP_POWERMODE_OTR_REGOFFSET_MASK));
+ __IO uint32_t *preg = __OPAMP_PTR_REG_OFFSET(OPAMP->OTR, (PowerMode & OPAMP_POWERMODE_OTR_REGOFFSET_MASK));
/* Set bits with position in register depending on parameter */
/* "TransistorsDiffPair". */
@@ -820,7 +819,7 @@ __STATIC_INLINE void LL_OPAMP_SetTrimmingValue(OPAMP_TypeDef* OPAMPx, uint32_t P
*/
__STATIC_INLINE uint32_t LL_OPAMP_GetTrimmingValue(OPAMP_TypeDef* OPAMPx, uint32_t PowerMode, uint32_t TransistorsDiffPair)
{
- uint32_t *preg = __OPAMP_PTR_REG_OFFSET(OPAMP->OTR, (PowerMode & OPAMP_POWERMODE_OTR_REGOFFSET_MASK));
+ const __IO uint32_t *preg = __OPAMP_PTR_REG_OFFSET(OPAMP->OTR, (PowerMode & OPAMP_POWERMODE_OTR_REGOFFSET_MASK));
/* Retrieve bits with position in register depending on parameter */
/* "TransistorsDiffPair". */
@@ -841,7 +840,7 @@ __STATIC_INLINE uint32_t LL_OPAMP_GetTrimmingValue(OPAMP_TypeDef* OPAMPx, uint32
/**
* @brief Enable OPAMP instance.
* @note After enable from off state, OPAMP requires a delay
- * to fullfill wake up time specification.
+ * to fulfill wake up time specification.
* Refer to device datasheet, parameter "tWAKEUP".
* @rmtoll CSR OPAxPD LL_OPAMP_Enable
* @param OPAMPx OPAMP instance
@@ -914,4 +913,3 @@ void LL_OPAMP_StructInit(LL_OPAMP_InitTypeDef *OPAMP_InitStruct);
#endif /* __STM32L1xx_LL_OPAMP_H */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_pwr.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_pwr.h
index 18b64d1d55..f7b5742bf0 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_pwr.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_pwr.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -717,5 +716,3 @@ ErrorStatus LL_PWR_DeInit(void);
#endif
#endif /* __STM32L1xx_LL_PWR_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_rcc.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_rcc.h
index b04bbd9f8a..1fdbcd83be 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_rcc.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_rcc.h
@@ -6,14 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright(c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
*
+ * This software is licensed under terms that can be found in the LICENSE file in
+ * the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
******************************************************************************
*/
@@ -1796,4 +1794,3 @@ void LL_RCC_GetSystemClocksFreq(LL_RCC_ClocksTypeDef *RCC_Clocks);
#endif /* __STM32L1xx_LL_RCC_H */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_rtc.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_rtc.h
index 2276b08949..07fea433f1 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_rtc.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_rtc.h
@@ -6,20 +6,19 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L1xx_LL_RTC_H
-#define __STM32L1xx_LL_RTC_H
+#ifndef STM32L1xx_LL_RTC_H
+#define STM32L1xx_LL_RTC_H
#ifdef __cplusplus
extern "C" {
@@ -45,7 +44,8 @@ extern "C" {
* @{
*/
/* Masks Definition */
-#define LL_RTC_INIT_MASK 0xFFFFFFFFU
+#define RTC_INIT_MASK 0xFFFFFFFFU
+#define RTC_RSF_MASK ((uint32_t)~(RTC_ISR_INIT | RTC_ISR_RSF))
/* Write protection defines */
#define RTC_WRITE_PROTECTION_DISABLE ((uint8_t)0xFFU)
@@ -167,7 +167,7 @@ typedef struct
This parameter can be a value of @ref RTC_LL_EC_ALMA_MASK for ALARM A or @ref RTC_LL_EC_ALMB_MASK for ALARM B.
This feature can be modified afterwards using unitary function @ref LL_RTC_ALMA_SetMask() for ALARM A
- or @ref LL_RTC_ALMB_SetMask() for ALARM B
+ or @ref LL_RTC_ALMB_SetMask() for ALARM B.
*/
uint32_t AlarmDateWeekDaySel; /*!< Specifies the RTC Alarm is on day or WeekDay.
@@ -204,8 +204,8 @@ typedef struct
/** @defgroup RTC_LL_EC_FORMAT FORMAT
* @{
*/
-#define LL_RTC_FORMAT_BIN 0x000000000U /*!< Binary data format */
-#define LL_RTC_FORMAT_BCD 0x000000001U /*!< BCD data format */
+#define LL_RTC_FORMAT_BIN 0x00000000U /*!< Binary data format */
+#define LL_RTC_FORMAT_BCD 0x00000001U /*!< BCD data format */
/**
* @}
*/
@@ -237,8 +237,12 @@ typedef struct
#if defined(RTC_SMOOTHCALIB_SUPPORT)
#define LL_RTC_ISR_RECALPF RTC_ISR_RECALPF
#endif /* RTC_SMOOTHCALIB_SUPPORT */
+#if defined(RTC_TAMPER3_SUPPORT)
#define LL_RTC_ISR_TAMP3F RTC_ISR_TAMP3F
+#endif /* RTC_TAMPER3_SUPPORT */
+#if defined(RTC_TAMPER2_SUPPORT)
#define LL_RTC_ISR_TAMP2F RTC_ISR_TAMP2F
+#endif /* RTC_TAMPER2_SUPPORT */
#define LL_RTC_ISR_TAMP1F RTC_ISR_TAMP1F
#define LL_RTC_ISR_TSOVF RTC_ISR_TSOVF
#define LL_RTC_ISR_TSF RTC_ISR_TSF
@@ -349,7 +353,7 @@ typedef struct
* @}
*/
-#if defined(RTC_SHIFTR_ADD1S)
+#if defined(RTC_SUBSECOND_SUPPORT)
/** @defgroup RTC_LL_EC_SHIFT_SECOND SHIFT SECOND
* @{
*/
@@ -358,7 +362,7 @@ typedef struct
/**
* @}
*/
-#endif /* RTC_SHIFTR_ADD1S */
+#endif /* RTC_SUBSECOND_SUPPORT */
/** @defgroup RTC_LL_EC_ALMA_MASK ALARMA MASK
* @{
@@ -385,11 +389,11 @@ typedef struct
/** @defgroup RTC_LL_EC_ALMB_MASK ALARMB MASK
* @{
*/
-#define LL_RTC_ALMB_MASK_NONE 0x00000000U /*!< No masks applied on Alarm B*/
+#define LL_RTC_ALMB_MASK_NONE 0x00000000U /*!< No masks applied on Alarm B */
#define LL_RTC_ALMB_MASK_DATEWEEKDAY RTC_ALRMBR_MSK4 /*!< Date/day do not care in Alarm B comparison */
-#define LL_RTC_ALMB_MASK_HOURS RTC_ALRMBR_MSK3 /*!< Hours do not care in Alarm B comparison */
-#define LL_RTC_ALMB_MASK_MINUTES RTC_ALRMBR_MSK2 /*!< Minutes do not care in Alarm B comparison */
-#define LL_RTC_ALMB_MASK_SECONDS RTC_ALRMBR_MSK1 /*!< Seconds do not care in Alarm B comparison */
+#define LL_RTC_ALMB_MASK_HOURS RTC_ALRMBR_MSK3 /*!< Hours do not care in Alarm B comparison */
+#define LL_RTC_ALMB_MASK_MINUTES RTC_ALRMBR_MSK2 /*!< Minutes do not care in Alarm B comparison */
+#define LL_RTC_ALMB_MASK_SECONDS RTC_ALRMBR_MSK1 /*!< Seconds do not care in Alarm B comparison */
#define LL_RTC_ALMB_MASK_ALL (RTC_ALRMBR_MSK4 | RTC_ALRMBR_MSK3 | RTC_ALRMBR_MSK2 | RTC_ALRMBR_MSK1) /*!< Masks all */
/**
* @}
@@ -425,9 +429,7 @@ typedef struct
/** @defgroup RTC_LL_EC_TAMPER TAMPER
* @{
*/
-#if defined(RTC_TAMPER1_SUPPORT)
#define LL_RTC_TAMPER_1 RTC_TAFCR_TAMP1E /*!< RTC_TAMP1 input detection */
-#endif /* RTC_TAMPER1_SUPPORT */
#if defined(RTC_TAMPER2_SUPPORT)
#define LL_RTC_TAMPER_2 RTC_TAFCR_TAMP2E /*!< RTC_TAMP2 input detection */
#endif /* RTC_TAMPER2_SUPPORT */
@@ -438,39 +440,7 @@ typedef struct
* @}
*/
-/** @defgroup RTC_LL_EC_TAMPER_MASK TAMPER MASK
- * @{
- */
-#if defined(RTC_TAMPER1_SUPPORT)
-#define LL_RTC_TAMPER_MASK_TAMPER1 RTC_TAFCR_TAMP1MF /*!< Tamper 1 event generates a trigger event. TAMP1F is masked and internally cleared by hardware.The backup registers are not erased */
-#endif /* RTC_TAMPER1_SUPPORT */
-#if defined(RTC_TAMPER2_SUPPORT)
-#define LL_RTC_TAMPER_MASK_TAMPER2 RTC_TAFCR_TAMP2MF /*!< Tamper 2 event generates a trigger event. TAMP2F is masked and internally cleared by hardware. The backup registers are not erased. */
-#endif /* RTC_TAMPER2_SUPPORT */
-#if defined(RTC_TAMPER3_SUPPORT)
-#define LL_RTC_TAMPER_MASK_TAMPER3 RTC_TAFCR_TAMP3MF /*!< Tamper 3 event generates a trigger event. TAMP3F is masked and internally cleared by hardware. The backup registers are not erased */
-#endif /* RTC_TAMPER3_SUPPORT */
-/**
- * @}
- */
-
-/** @defgroup RTC_LL_EC_TAMPER_NOERASE TAMPER NO ERASE
- * @{
- */
-#if defined(RTC_TAMPER1_SUPPORT)
-#define LL_RTC_TAMPER_NOERASE_TAMPER1 RTC_TAFCR_TAMP1NOERASE /*!< Tamper 1 event does not erase the backup registers. */
-#endif /* RTC_TAMPER1_SUPPORT */
-#if defined(RTC_TAMPER2_SUPPORT)
-#define LL_RTC_TAMPER_NOERASE_TAMPER2 RTC_TAFCR_TAMP2NOERASE /*!< Tamper 2 event does not erase the backup registers. */
-#endif /* RTC_TAMPER2_SUPPORT */
-#if defined(RTC_TAMPER3_SUPPORT)
-#define LL_RTC_TAMPER_NOERASE_TAMPER3 RTC_TAFCR_TAMP3NOERASE /*!< Tamper 3 event does not erase the backup registers. */
-#endif /* RTC_TAMPER3_SUPPORT */
-/**
- * @}
- */
-
-#if defined(RTC_TAFCR_TAMPPRCH)
+#if defined(RTC_TAFCR_TAMPFLT)
/** @defgroup RTC_LL_EC_TAMPER_DURATION TAMPER DURATION
* @{
*/
@@ -481,9 +451,7 @@ typedef struct
/**
* @}
*/
-#endif /* RTC_TAFCR_TAMPPRCH */
-#if defined(RTC_TAFCR_TAMPFLT)
/** @defgroup RTC_LL_EC_TAMPER_FILTER TAMPER FILTER
* @{
*/
@@ -494,9 +462,7 @@ typedef struct
/**
* @}
*/
-#endif /* RTC_TAFCR_TAMPFLT */
-#if defined(RTC_TAFCR_TAMPFREQ)
/** @defgroup RTC_LL_EC_TAMPER_SAMPLFREQDIV TAMPER SAMPLING FREQUENCY DIVIDER
* @{
*/
@@ -511,19 +477,17 @@ typedef struct
/**
* @}
*/
-#endif /* RTC_TAFCR_TAMPFREQ */
+#endif /* RTC_TAFCR_TAMPFLT */
/** @defgroup RTC_LL_EC_TAMPER_ACTIVELEVEL TAMPER ACTIVE LEVEL
* @{
*/
-#if defined(RTC_TAMPER1_SUPPORT)
-#define LL_RTC_TAMPER_ACTIVELEVEL_TAMP1 RTC_TAFCR_TAMP1TRG /*!< RTC_TAMP1 input falling edge (if TAMPFLT = 00) or staying high (if TAMPFLT != 00) triggers a tamper detection event*/
-#endif /* RTC_TAMPER1_SUPPORT */
+#define LL_RTC_TAMPER_ACTIVELEVEL_TAMP1 RTC_TAFCR_TAMP1TRG /*!< RTC_TAMP1 input falling edge (if TAMPFLT = 00) or staying high (if TAMPFLT != 00) triggers a tamper detection event */
#if defined(RTC_TAMPER2_SUPPORT)
-#define LL_RTC_TAMPER_ACTIVELEVEL_TAMP2 RTC_TAFCR_TAMP2TRG /*!< RTC_TAMP2 input falling edge (if TAMPFLT = 00) or staying high (if TAMPFLT != 00) triggers a tamper detection event*/
+#define LL_RTC_TAMPER_ACTIVELEVEL_TAMP2 RTC_TAFCR_TAMP2TRG /*!< RTC_TAMP2 input falling edge (if TAMPFLT = 00) or staying high (if TAMPFLT != 00) triggers a tamper detection event */
#endif /* RTC_TAMPER2_SUPPORT */
#if defined(RTC_TAMPER3_SUPPORT)
-#define LL_RTC_TAMPER_ACTIVELEVEL_TAMP3 RTC_TAFCR_TAMP3TRG /*!< RTC_TAMP3 input falling edge (if TAMPFLT = 00) or staying high (if TAMPFLT != 00) triggers a tamper detection event*/
+#define LL_RTC_TAMPER_ACTIVELEVEL_TAMP3 RTC_TAFCR_TAMP3TRG /*!< RTC_TAMP3 input falling edge (if TAMPFLT = 00) or staying high (if TAMPFLT != 00) triggers a tamper detection event */
#endif /* RTC_TAMPER3_SUPPORT */
/**
* @}
@@ -542,7 +506,6 @@ typedef struct
* @}
*/
-#if defined(RTC_BACKUP_SUPPORT)
/** @defgroup RTC_LL_EC_BKP BACKUP
* @{
*/
@@ -551,7 +514,7 @@ typedef struct
#define LL_RTC_BKP_DR2 0x00000002U
#define LL_RTC_BKP_DR3 0x00000003U
#define LL_RTC_BKP_DR4 0x00000004U
-#if RTC_BKP_NUMBER > 5
+#if RTC_BKP_NUMBER > 5U
#define LL_RTC_BKP_DR5 0x00000005U
#define LL_RTC_BKP_DR6 0x00000006U
#define LL_RTC_BKP_DR7 0x00000007U
@@ -563,16 +526,12 @@ typedef struct
#define LL_RTC_BKP_DR13 0x0000000DU
#define LL_RTC_BKP_DR14 0x0000000EU
#define LL_RTC_BKP_DR15 0x0000000FU
-#endif /* RTC_BKP_NUMBER > 5 */
-
-#if RTC_BKP_NUMBER > 16
+#if RTC_BKP_NUMBER > 16U
#define LL_RTC_BKP_DR16 0x00000010U
#define LL_RTC_BKP_DR17 0x00000011U
#define LL_RTC_BKP_DR18 0x00000012U
#define LL_RTC_BKP_DR19 0x00000013U
-#endif /* RTC_BKP_NUMBER > 16 */
-
-#if RTC_BKP_NUMBER > 20
+#if RTC_BKP_NUMBER > 20U
#define LL_RTC_BKP_DR20 0x00000014U
#define LL_RTC_BKP_DR21 0x00000015U
#define LL_RTC_BKP_DR22 0x00000016U
@@ -585,11 +544,12 @@ typedef struct
#define LL_RTC_BKP_DR29 0x0000001DU
#define LL_RTC_BKP_DR30 0x0000001EU
#define LL_RTC_BKP_DR31 0x0000001FU
-#endif /* RTC_BKP_NUMBER > 20 */
+#endif /* RTC_BKP_NUMBER > 20U */
+#endif /* RTC_BKP_NUMBER > 16U */
+#endif /* RTC_BKP_NUMBER > 5U */
/**
* @}
*/
-#endif /* RTC_BACKUP_SUPPORT */
/** @defgroup RTC_LL_EC_CALIB_OUTPUT Calibration output
* @{
@@ -597,7 +557,7 @@ typedef struct
#define LL_RTC_CALIB_OUTPUT_NONE 0x00000000U /*!< Calibration output disabled */
#if defined(RTC_CR_COSEL)
#define LL_RTC_CALIB_OUTPUT_1HZ (RTC_CR_COE | RTC_CR_COSEL) /*!< Calibration output is 1 Hz */
-#endif
+#endif /* RTC_CR_COSEL */
#define LL_RTC_CALIB_OUTPUT_512HZ (RTC_CR_COE) /*!< Calibration output is 512 Hz */
/**
* @}
@@ -651,7 +611,7 @@ typedef struct
* @param __VALUE__ Value to be written in the register
* @retval None
*/
-#define LL_RTC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG((__INSTANCE__)->__REG__, __VALUE__)
+#define LL_RTC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
/**
* @brief Read a value in RTC register
@@ -659,7 +619,7 @@ typedef struct
* @param __REG__ Register to be read
* @retval Register value
*/
-#define LL_RTC_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->__REG__)
+#define LL_RTC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
/**
* @}
*/
@@ -680,7 +640,7 @@ typedef struct
* @param __VALUE__ BCD value to be converted
* @retval Converted byte
*/
-#define __LL_RTC_CONVERT_BCD2BIN(__VALUE__) ((uint8_t)((((uint8_t)((__VALUE__) & (uint8_t)0xF0U) >> (uint8_t)0x4U) * 10U) + ((__VALUE__) & (uint8_t)0x0FU)))
+#define __LL_RTC_CONVERT_BCD2BIN(__VALUE__) (uint8_t)(((uint8_t)((__VALUE__) & (uint8_t)0xF0U) >> (uint8_t)0x4U) * 10U + ((__VALUE__) & (uint8_t)0x0FU))
/**
* @}
@@ -885,7 +845,7 @@ __STATIC_INLINE uint32_t LL_RTC_GetAlarmOutputType(RTC_TypeDef *RTCx)
__STATIC_INLINE void LL_RTC_EnableInitMode(RTC_TypeDef *RTCx)
{
/* Set the Initialization mode */
- WRITE_REG(RTCx->ISR, LL_RTC_INIT_MASK);
+ WRITE_REG(RTCx->ISR, RTC_INIT_MASK);
}
/**
@@ -962,8 +922,8 @@ __STATIC_INLINE uint32_t LL_RTC_IsShadowRegBypassEnabled(RTC_TypeDef *RTCx)
{
return ((READ_BIT(RTCx->CR, RTC_CR_BYPSHAD) == (RTC_CR_BYPSHAD)) ? 1UL : 0UL);
}
-
#endif /* RTC_CR_BYPSHAD */
+
/**
* @brief Enable RTC_REFIN reference clock detection (50 or 60 Hz)
* @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
@@ -1230,10 +1190,10 @@ __STATIC_INLINE void LL_RTC_TIME_Config(RTC_TypeDef *RTCx, uint32_t Format12_24,
{
uint32_t temp;
- temp = Format12_24 | \
- (((Hours & 0xF0U) << (RTC_TR_HT_Pos - 4U)) | ((Hours & 0x0FU) << RTC_TR_HU_Pos)) | \
+ temp = Format12_24 | \
+ (((Hours & 0xF0U) << (RTC_TR_HT_Pos - 4U)) | ((Hours & 0x0FU) << RTC_TR_HU_Pos)) | \
(((Minutes & 0xF0U) << (RTC_TR_MNT_Pos - 4U)) | ((Minutes & 0x0FU) << RTC_TR_MNU_Pos)) | \
- (((Seconds & 0xF0U) << (RTC_TR_ST_Pos - 4U)) | ((Seconds & 0x0FU) << RTC_TR_SU_Pos));
+ (((Seconds & 0xF0U) << (RTC_TR_ST_Pos - 4U)) | ((Seconds & 0x0FU) << RTC_TR_SU_Pos));
MODIFY_REG(RTCx->TR, (RTC_TR_PM | RTC_TR_HT | RTC_TR_HU | RTC_TR_MNT | RTC_TR_MNU | RTC_TR_ST | RTC_TR_SU), temp);
}
@@ -1256,12 +1216,7 @@ __STATIC_INLINE void LL_RTC_TIME_Config(RTC_TypeDef *RTCx, uint32_t Format12_24,
*/
__STATIC_INLINE uint32_t LL_RTC_TIME_Get(RTC_TypeDef *RTCx)
{
- uint32_t temp;
-
- temp = READ_BIT(RTCx->TR, (RTC_TR_HT | RTC_TR_HU | RTC_TR_MNT | RTC_TR_MNU | RTC_TR_ST | RTC_TR_SU));
- return (uint32_t)((((((temp & RTC_TR_HT) >> RTC_TR_HT_Pos) << 4U) | ((temp & RTC_TR_HU) >> RTC_TR_HU_Pos)) << RTC_OFFSET_HOUR) | \
- (((((temp & RTC_TR_MNT) >> RTC_TR_MNT_Pos) << 4U) | ((temp & RTC_TR_MNU) >> RTC_TR_MNU_Pos)) << RTC_OFFSET_MINUTE) | \
- ((((temp & RTC_TR_ST) >> RTC_TR_ST_Pos) << 4U) | ((temp & RTC_TR_SU) >> RTC_TR_SU_Pos)));
+ return (uint32_t)(READ_BIT(RTCx->TR, (RTC_TR_HT | RTC_TR_HU | RTC_TR_MNT | RTC_TR_MNU | RTC_TR_ST | RTC_TR_SU)));
}
/**
@@ -1325,25 +1280,24 @@ __STATIC_INLINE void LL_RTC_TIME_IncHour(RTC_TypeDef *RTCx)
#if defined(RTC_SUBSECOND_SUPPORT)
/**
- * @brief Get Sub second value in the synchronous prescaler counter.
+ * @brief Get subseconds value in the synchronous prescaler counter.
* @note You can use both SubSeconds value and SecondFraction (PREDIV_S through
* LL_RTC_GetSynchPrescaler function) terms returned to convert Calendar
* SubSeconds value in second fraction ratio with time unit following
* generic formula:
- * ==> Seconds fraction ratio * time_unit= [(SecondFraction-SubSeconds)/(SecondFraction+1)] * time_unit
+ * ==> Seconds fraction ratio * time_unit =
+ * [(SecondFraction-SubSeconds)/(SecondFraction+1)] * time_unit
* This conversion can be performed only if no shift operation is pending
* (ie. SHFP=0) when PREDIV_S >= SS.
* @rmtoll SSR SS LL_RTC_TIME_GetSubSecond
* @param RTCx RTC Instance
- * @retval Sub second value (number between 0 and 65535)
+ * @retval Subseconds value (number between 0 and 65535)
*/
__STATIC_INLINE uint32_t LL_RTC_TIME_GetSubSecond(RTC_TypeDef *RTCx)
{
return (uint32_t)(READ_BIT(RTCx->SSR, RTC_SSR_SS));
}
-#endif /* RTC_SUBSECOND_SUPPORT */
-#if defined(RTC_SHIFTR_ADD1S)
/**
* @brief Synchronize to a remote clock with a high degree of precision.
* @note This operation effectively subtracts from (delays) or advance the clock of a fraction of a second.
@@ -1362,7 +1316,7 @@ __STATIC_INLINE void LL_RTC_TIME_Synchronize(RTC_TypeDef *RTCx, uint32_t ShiftSe
{
WRITE_REG(RTCx->SHIFTR, ShiftSecond | Fraction);
}
-#endif /* RTC_SHIFTR_ADD1S */
+#endif /* RTC_SUBSECOND_SUPPORT */
/**
* @}
@@ -1564,10 +1518,10 @@ __STATIC_INLINE void LL_RTC_DATE_Config(RTC_TypeDef *RTCx, uint32_t WeekDay, uin
{
uint32_t temp;
- temp = (WeekDay << RTC_DR_WDU_Pos) | \
- (((Year & 0xF0U) << (RTC_DR_YT_Pos - 4U)) | ((Year & 0x0FU) << RTC_DR_YU_Pos)) | \
+ temp = ( WeekDay << RTC_DR_WDU_Pos) | \
+ (((Year & 0xF0U) << (RTC_DR_YT_Pos - 4U)) | ((Year & 0x0FU) << RTC_DR_YU_Pos)) | \
(((Month & 0xF0U) << (RTC_DR_MT_Pos - 4U)) | ((Month & 0x0FU) << RTC_DR_MU_Pos)) | \
- (((Day & 0xF0U) << (RTC_DR_DT_Pos - 4U)) | ((Day & 0x0FU) << RTC_DR_DU_Pos));
+ (((Day & 0xF0U) << (RTC_DR_DT_Pos - 4U)) | ((Day & 0x0FU) << RTC_DR_DU_Pos));
MODIFY_REG(RTCx->DR, (RTC_DR_WDU | RTC_DR_MT | RTC_DR_MU | RTC_DR_DT | RTC_DR_DU | RTC_DR_YT | RTC_DR_YU), temp);
}
@@ -1593,10 +1547,11 @@ __STATIC_INLINE uint32_t LL_RTC_DATE_Get(RTC_TypeDef *RTCx)
uint32_t temp;
temp = READ_BIT(RTCx->DR, (RTC_DR_WDU | RTC_DR_MT | RTC_DR_MU | RTC_DR_DT | RTC_DR_DU | RTC_DR_YT | RTC_DR_YU));
- return (uint32_t)((((temp & RTC_DR_WDU) >> RTC_DR_WDU_Pos) << RTC_OFFSET_WEEKDAY) | \
- (((((temp & RTC_DR_DT) >> RTC_DR_DT_Pos) << 4U) | ((temp & RTC_DR_DU) >> RTC_DR_DU_Pos)) << RTC_OFFSET_DAY) | \
- (((((temp & RTC_DR_MT) >> RTC_DR_MT_Pos) << 4U) | ((temp & RTC_DR_MU) >> RTC_DR_MU_Pos)) << RTC_OFFSET_MONTH) | \
- ((((temp & RTC_DR_YT) >> RTC_DR_YT_Pos) << 4U) | ((temp & RTC_DR_YU) >> RTC_DR_YU_Pos)));
+
+ return (uint32_t)((((temp & RTC_DR_WDU) >> RTC_DR_WDU_Pos) << RTC_OFFSET_WEEKDAY) | \
+ (((temp & (RTC_DR_DT | RTC_DR_DU)) >> RTC_DR_DU_Pos) << RTC_OFFSET_DAY) | \
+ (((temp & (RTC_DR_MT | RTC_DR_MU)) >> RTC_DR_MU_Pos) << RTC_OFFSET_MONTH) | \
+ ((temp & (RTC_DR_YT | RTC_DR_YU)) >> RTC_DR_YU_Pos));
}
/**
@@ -1892,9 +1847,10 @@ __STATIC_INLINE void LL_RTC_ALMA_ConfigTime(RTC_TypeDef *RTCx, uint32_t Format12
{
uint32_t temp;
- temp = Format12_24 | (((Hours & 0xF0U) << (RTC_ALRMAR_HT_Pos - 4U)) | ((Hours & 0x0FU) << RTC_ALRMAR_HU_Pos)) | \
+ temp = Format12_24 | \
+ (((Hours & 0xF0U) << (RTC_ALRMAR_HT_Pos - 4U)) | ((Hours & 0x0FU) << RTC_ALRMAR_HU_Pos)) | \
(((Minutes & 0xF0U) << (RTC_ALRMAR_MNT_Pos - 4U)) | ((Minutes & 0x0FU) << RTC_ALRMAR_MNU_Pos)) | \
- (((Seconds & 0xF0U) << (RTC_ALRMAR_ST_Pos - 4U)) | ((Seconds & 0x0FU) << RTC_ALRMAR_SU_Pos));
+ (((Seconds & 0xF0U) << (RTC_ALRMAR_ST_Pos - 4U)) | ((Seconds & 0x0FU) << RTC_ALRMAR_SU_Pos));
MODIFY_REG(RTCx->ALRMAR, RTC_ALRMAR_PM | RTC_ALRMAR_HT | RTC_ALRMAR_HU | RTC_ALRMAR_MNT | RTC_ALRMAR_MNU | RTC_ALRMAR_ST | RTC_ALRMAR_SU, temp);
}
@@ -1919,7 +1875,8 @@ __STATIC_INLINE uint32_t LL_RTC_ALMA_GetTime(RTC_TypeDef *RTCx)
#if defined(RTC_SUBSECOND_SUPPORT)
/**
- * @brief Set Alarm A Mask the most-significant bits starting at this bit
+ * @brief Mask the most-significant bits of the subseconds field starting from
+ * the bit specified in parameter Mask
* @note This register can be written only when ALRAE is reset in RTC_CR register,
* or in initialization mode.
* @rmtoll ALRMASSR MASKSS LL_RTC_ALMA_SetSubSecondMask
@@ -1933,7 +1890,7 @@ __STATIC_INLINE void LL_RTC_ALMA_SetSubSecondMask(RTC_TypeDef *RTCx, uint32_t Ma
}
/**
- * @brief Get Alarm A Mask the most-significant bits starting at this bit
+ * @brief Get Alarm A subseconds mask
* @rmtoll ALRMASSR MASKSS LL_RTC_ALMA_GetSubSecondMask
* @param RTCx RTC Instance
* @retval Value between Min_Data=0x00 and Max_Data=0xF
@@ -1944,7 +1901,7 @@ __STATIC_INLINE uint32_t LL_RTC_ALMA_GetSubSecondMask(RTC_TypeDef *RTCx)
}
/**
- * @brief Set Alarm A Sub seconds value
+ * @brief Set Alarm A subseconds value
* @rmtoll ALRMASSR SS LL_RTC_ALMA_SetSubSecond
* @param RTCx RTC Instance
* @param Subsecond Value between Min_Data=0x00 and Max_Data=0x7FFF
@@ -1956,7 +1913,7 @@ __STATIC_INLINE void LL_RTC_ALMA_SetSubSecond(RTC_TypeDef *RTCx, uint32_t Subsec
}
/**
- * @brief Get Alarm A Sub seconds value
+ * @brief Get Alarm A subseconds value
* @rmtoll ALRMASSR SS LL_RTC_ALMA_GetSubSecond
* @param RTCx RTC Instance
* @retval Value between Min_Data=0x00 and Max_Data=0x7FFF
@@ -2260,9 +2217,10 @@ __STATIC_INLINE void LL_RTC_ALMB_ConfigTime(RTC_TypeDef *RTCx, uint32_t Format12
{
uint32_t temp;
- temp = Format12_24 | (((Hours & 0xF0U) << (RTC_ALRMBR_HT_Pos - 4U)) | ((Hours & 0x0FU) << RTC_ALRMBR_HU_Pos)) | \
+ temp = Format12_24 | \
+ (((Hours & 0xF0U) << (RTC_ALRMBR_HT_Pos - 4U)) | ((Hours & 0x0FU) << RTC_ALRMBR_HU_Pos)) | \
(((Minutes & 0xF0U) << (RTC_ALRMBR_MNT_Pos - 4U)) | ((Minutes & 0x0FU) << RTC_ALRMBR_MNU_Pos)) | \
- (((Seconds & 0xF0U) << (RTC_ALRMBR_ST_Pos - 4U)) | ((Seconds & 0x0FU) << RTC_ALRMBR_SU_Pos));
+ (((Seconds & 0xF0U) << (RTC_ALRMBR_ST_Pos - 4U)) | ((Seconds & 0x0FU) << RTC_ALRMBR_SU_Pos));
MODIFY_REG(RTCx->ALRMBR, RTC_ALRMBR_PM | RTC_ALRMBR_HT | RTC_ALRMBR_HU | RTC_ALRMBR_MNT | RTC_ALRMBR_MNU | RTC_ALRMBR_ST | RTC_ALRMBR_SU, temp);
}
@@ -2287,7 +2245,8 @@ __STATIC_INLINE uint32_t LL_RTC_ALMB_GetTime(RTC_TypeDef *RTCx)
#if defined(RTC_SUBSECOND_SUPPORT)
/**
- * @brief Set Alarm B Mask the most-significant bits starting at this bit
+ * @brief Mask the most-significant bits of the subseconds field starting from
+ * the bit specified in parameter Mask
* @note This register can be written only when ALRBE is reset in RTC_CR register,
* or in initialization mode.
* @rmtoll ALRMBSSR MASKSS LL_RTC_ALMB_SetSubSecondMask
@@ -2301,7 +2260,7 @@ __STATIC_INLINE void LL_RTC_ALMB_SetSubSecondMask(RTC_TypeDef *RTCx, uint32_t Ma
}
/**
- * @brief Get Alarm B Mask the most-significant bits starting at this bit
+ * @brief Get Alarm B subseconds mask
* @rmtoll ALRMBSSR MASKSS LL_RTC_ALMB_GetSubSecondMask
* @param RTCx RTC Instance
* @retval Value between Min_Data=0x00 and Max_Data=0xF
@@ -2312,7 +2271,7 @@ __STATIC_INLINE uint32_t LL_RTC_ALMB_GetSubSecondMask(RTC_TypeDef *RTCx)
}
/**
- * @brief Set Alarm B Sub seconds value
+ * @brief Set Alarm B subseconds value
* @rmtoll ALRMBSSR SS LL_RTC_ALMB_SetSubSecond
* @param RTCx RTC Instance
* @param Subsecond Value between Min_Data=0x00 and Max_Data=0x7FFF
@@ -2324,7 +2283,7 @@ __STATIC_INLINE void LL_RTC_ALMB_SetSubSecond(RTC_TypeDef *RTCx, uint32_t Subsec
}
/**
- * @brief Get Alarm B Sub seconds value
+ * @brief Get Alarm B subseconds value
* @rmtoll ALRMBSSR SS LL_RTC_ALMB_GetSubSecond
* @param RTCx RTC Instance
* @retval Value between Min_Data=0x00 and Max_Data=0x7FFF
@@ -2543,7 +2502,7 @@ __STATIC_INLINE uint32_t LL_RTC_TS_GetDate(RTC_TypeDef *RTCx)
#if defined(RTC_SUBSECOND_SUPPORT)
/**
- * @brief Get time-stamp sub second value
+ * @brief Get time-stamp subseconds value
* @rmtoll TSSSR SS LL_RTC_TS_GetSubSecond
* @param RTCx RTC Instance
* @retval Value between Min_Data=0x00 and Max_Data=0xFFFF
@@ -2597,7 +2556,7 @@ __STATIC_INLINE void LL_RTC_TS_DisableOnTamper(RTC_TypeDef *RTCx)
* @arg @ref LL_RTC_TAMPER_2 (*)
* @arg @ref LL_RTC_TAMPER_3 (*)
*
- * (*) value not defined in all devices.
+ * (*) value not applicable to all devices.
* @retval None
*/
__STATIC_INLINE void LL_RTC_TAMPER_Enable(RTC_TypeDef *RTCx, uint32_t Tamper)
@@ -2616,7 +2575,7 @@ __STATIC_INLINE void LL_RTC_TAMPER_Enable(RTC_TypeDef *RTCx, uint32_t Tamper)
* @arg @ref LL_RTC_TAMPER_2 (*)
* @arg @ref LL_RTC_TAMPER_3 (*)
*
- * (*) value not defined in all devices.
+ * (*) value not applicable to all devices.
* @retval None
*/
__STATIC_INLINE void LL_RTC_TAMPER_Disable(RTC_TypeDef *RTCx, uint32_t Tamper)
@@ -2624,7 +2583,7 @@ __STATIC_INLINE void LL_RTC_TAMPER_Disable(RTC_TypeDef *RTCx, uint32_t Tamper)
CLEAR_BIT(RTCx->TAFCR, Tamper);
}
-#if defined(RTC_TAFCR_TAMPPUDIS)
+#if defined(RTC_TAFCR_TAMPFLT)
/**
* @brief Disable RTC_TAMPx pull-up disable (Disable precharge of RTC_TAMPx pins)
* @rmtoll TAFCR TAMPPUDIS LL_RTC_TAMPER_DisablePullUp
@@ -2646,9 +2605,7 @@ __STATIC_INLINE void LL_RTC_TAMPER_EnablePullUp(RTC_TypeDef *RTCx)
{
CLEAR_BIT(RTCx->TAFCR, RTC_TAFCR_TAMPPUDIS);
}
-#endif /* RTC_TAFCR_TAMPPUDIS */
-#if defined(RTC_TAFCR_TAMPPRCH)
/**
* @brief Set RTC_TAMPx precharge duration
* @rmtoll TAFCR TAMPPRCH LL_RTC_TAMPER_SetPrecharge
@@ -2679,9 +2636,7 @@ __STATIC_INLINE uint32_t LL_RTC_TAMPER_GetPrecharge(RTC_TypeDef *RTCx)
{
return (uint32_t)(READ_BIT(RTCx->TAFCR, RTC_TAFCR_TAMPPRCH));
}
-#endif /* RTC_TAFCR_TAMPPRCH */
-#if defined(RTC_TAFCR_TAMPFLT)
/**
* @brief Set RTC_TAMPx filter count
* @rmtoll TAFCR TAMPFLT LL_RTC_TAMPER_SetFilterCount
@@ -2712,9 +2667,7 @@ __STATIC_INLINE uint32_t LL_RTC_TAMPER_GetFilterCount(RTC_TypeDef *RTCx)
{
return (uint32_t)(READ_BIT(RTCx->TAFCR, RTC_TAFCR_TAMPFLT));
}
-#endif /* RTC_TAFCR_TAMPFLT */
-#if defined(RTC_TAFCR_TAMPFREQ)
/**
* @brief Set Tamper sampling frequency
* @rmtoll TAFCR TAMPFREQ LL_RTC_TAMPER_SetSamplingFreq
@@ -2753,7 +2706,7 @@ __STATIC_INLINE uint32_t LL_RTC_TAMPER_GetSamplingFreq(RTC_TypeDef *RTCx)
{
return (uint32_t)(READ_BIT(RTCx->TAFCR, RTC_TAFCR_TAMPFREQ));
}
-#endif /* RTC_TAFCR_TAMPFREQ */
+#endif /* RTC_TAFCR_TAMPFLT */
/**
* @brief Enable Active level for Tamper input
@@ -2766,7 +2719,7 @@ __STATIC_INLINE uint32_t LL_RTC_TAMPER_GetSamplingFreq(RTC_TypeDef *RTCx)
* @arg @ref LL_RTC_TAMPER_ACTIVELEVEL_TAMP2 (*)
* @arg @ref LL_RTC_TAMPER_ACTIVELEVEL_TAMP3 (*)
*
- * (*) value not defined in all devices.
+ * (*) value not applicable to all devices.
* @retval None
*/
__STATIC_INLINE void LL_RTC_TAMPER_EnableActiveLevel(RTC_TypeDef *RTCx, uint32_t Tamper)
@@ -2785,7 +2738,7 @@ __STATIC_INLINE void LL_RTC_TAMPER_EnableActiveLevel(RTC_TypeDef *RTCx, uint32_t
* @arg @ref LL_RTC_TAMPER_ACTIVELEVEL_TAMP2 (*)
* @arg @ref LL_RTC_TAMPER_ACTIVELEVEL_TAMP3 (*)
*
- * (*) value not defined in all devices.
+ * (*) value not applicable to all devices.
* @retval None
*/
__STATIC_INLINE void LL_RTC_TAMPER_DisableActiveLevel(RTC_TypeDef *RTCx, uint32_t Tamper)
@@ -2797,7 +2750,6 @@ __STATIC_INLINE void LL_RTC_TAMPER_DisableActiveLevel(RTC_TypeDef *RTCx, uint32_
* @}
*/
-#if defined(RTC_WAKEUP_SUPPORT)
/** @defgroup RTC_LL_EF_Wakeup Wakeup
* @{
*/
@@ -2840,7 +2792,7 @@ __STATIC_INLINE uint32_t LL_RTC_WAKEUP_IsEnabled(RTC_TypeDef *RTCx)
/**
* @brief Select Wakeup clock
* @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
- * @note Bit can be written only when RTC_CR WUTE bit = 0 and RTC_ISR WUTWF bit = 1
+ * @note Bit can be written only when RTC_CR WUTE bit = 0 and RTC_ISR WUTWF bit = 1
* @rmtoll CR WUCKSEL LL_RTC_WAKEUP_SetClock
* @param RTCx RTC Instance
* @param WakeupClock This parameter can be one of the following values:
@@ -2876,7 +2828,7 @@ __STATIC_INLINE uint32_t LL_RTC_WAKEUP_GetClock(RTC_TypeDef *RTCx)
/**
* @brief Set Wakeup auto-reload value
- * @note Bit can be written only when WUTWF is set to 1 in RTC_ISR
+ * @note Bit can be written only when WUTWF is set to 1 in RTC_ISR
* @rmtoll WUTR WUT LL_RTC_WAKEUP_SetAutoReload
* @param RTCx RTC Instance
* @param Value Value between Min_Data=0x00 and Max_Data=0xFFFF
@@ -2901,9 +2853,7 @@ __STATIC_INLINE uint32_t LL_RTC_WAKEUP_GetAutoReload(RTC_TypeDef *RTCx)
/**
* @}
*/
-#endif /* RTC_WAKEUP_SUPPORT */
-#if defined(RTC_BACKUP_SUPPORT)
/** @defgroup RTC_LL_EF_Backup_Registers Backup_Registers
* @{
*/
@@ -2946,19 +2896,19 @@ __STATIC_INLINE uint32_t LL_RTC_WAKEUP_GetAutoReload(RTC_TypeDef *RTCx)
* @arg @ref LL_RTC_BKP_DR30 (*)
* @arg @ref LL_RTC_BKP_DR31 (*)
*
- * (*) value not defined in all devices.
+ * (*) value not applicable to all devices.
* @param Data Value between Min_Data=0x00 and Max_Data=0xFFFFFFFF
* @retval None
*/
__STATIC_INLINE void LL_RTC_BAK_SetRegister(RTC_TypeDef *RTCx, uint32_t BackupRegister, uint32_t Data)
{
- uint32_t tmp = 0U;
+ uint32_t temp;
- tmp = (uint32_t)(&(RTCx->BKP0R));
- tmp += (BackupRegister * 4U);
+ temp = (uint32_t)(&(RTCx->BKP0R));
+ temp += (BackupRegister * 4U);
/* Write the specified register */
- *(__IO uint32_t *)tmp = (uint32_t)Data;
+ *(__IO uint32_t *)temp = (uint32_t)Data;
}
/**
@@ -2999,24 +2949,23 @@ __STATIC_INLINE void LL_RTC_BAK_SetRegister(RTC_TypeDef *RTCx, uint32_t BackupRe
* @arg @ref LL_RTC_BKP_DR30 (*)
* @arg @ref LL_RTC_BKP_DR31 (*)
*
- * (*) value not defined in all devices.
+ * (*) value not applicable to all devices.
* @retval Value between Min_Data=0x00 and Max_Data=0xFFFFFFFF
*/
__STATIC_INLINE uint32_t LL_RTC_BAK_GetRegister(RTC_TypeDef *RTCx, uint32_t BackupRegister)
{
- uint32_t tmp = 0U;
+ uint32_t temp;
- tmp = (uint32_t)(&(RTCx->BKP0R));
- tmp += (BackupRegister * 4U);
+ temp = (uint32_t)(&(RTCx->BKP0R));
+ temp += (BackupRegister * 4U);
/* Read the specified register */
- return (*(__IO uint32_t *)tmp);
+ return (*(__IO uint32_t *)temp);
}
/**
* @}
*/
-#endif /* RTC_BACKUP_SUPPORT */
/** @defgroup RTC_LL_EF_Calibration Calibration
* @{
@@ -3033,14 +2982,14 @@ __STATIC_INLINE uint32_t LL_RTC_BAK_GetRegister(RTC_TypeDef *RTCx, uint32_t Back
* @arg @ref LL_RTC_CALIB_OUTPUT_1HZ (*)
* @arg @ref LL_RTC_CALIB_OUTPUT_512HZ
*
- * (*) value not defined in all devices.
+ * (*) value not applicable to all devices.
* @retval None
*/
__STATIC_INLINE void LL_RTC_CAL_SetOutputFreq(RTC_TypeDef *RTCx, uint32_t Frequency)
{
#if defined(RTC_CR_COSEL)
MODIFY_REG(RTCx->CR, RTC_CR_COE | RTC_CR_COSEL, Frequency);
-#else
+#else /* RTC_CR_COSEL */
MODIFY_REG(RTCx->CR, RTC_CR_COE, Frequency);
#endif /* RTC_CR_COSEL */
}
@@ -3055,13 +3004,13 @@ __STATIC_INLINE void LL_RTC_CAL_SetOutputFreq(RTC_TypeDef *RTCx, uint32_t Freque
* @arg @ref LL_RTC_CALIB_OUTPUT_1HZ (*)
* @arg @ref LL_RTC_CALIB_OUTPUT_512HZ
*
- * (*) value not defined in all devices.
+ * (*) value not applicable to all devices.
*/
__STATIC_INLINE uint32_t LL_RTC_CAL_GetOutputFreq(RTC_TypeDef *RTCx)
{
#if defined(RTC_CR_COSEL)
return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_COE | RTC_CR_COSEL));
-#else
+#else /* RTC_CR_COSEL */
return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_COE));
#endif /* RTC_CR_COSEL */
}
@@ -3140,7 +3089,7 @@ __STATIC_INLINE uint32_t LL_RTC_CAL_GetCoarseDigitalSign(RTC_TypeDef *RTCx)
/**
* @brief Insert or not One RTCCLK pulse every 2exp11 pulses (frequency increased by 488.5 ppm)
* @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
- * @note Bit can be written only when RECALPF is set to 0 in RTC_ISR
+ * @note Bit can be written only when RECALPF is set to 0 in RTC_ISR
* @rmtoll CALR CALP LL_RTC_CAL_SetPulse
* @param RTCx RTC Instance
* @param Pulse This parameter can be one of the following values:
@@ -3165,7 +3114,7 @@ __STATIC_INLINE uint32_t LL_RTC_CAL_IsPulseInserted(RTC_TypeDef *RTCx)
}
/**
- * @brief Set the calibration cycle period
+ * @brief Set smooth calibration cycle period
* @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
* @note Bit can be written only when RECALPF is set to 0 in RTC_ISR
* @rmtoll CALR CALW8 LL_RTC_CAL_SetPeriod\n
@@ -3183,7 +3132,7 @@ __STATIC_INLINE void LL_RTC_CAL_SetPeriod(RTC_TypeDef *RTCx, uint32_t Period)
}
/**
- * @brief Get the calibration cycle period
+ * @brief Get smooth calibration cycle period
* @rmtoll CALR CALW8 LL_RTC_CAL_GetPeriod\n
* CALR CALW16 LL_RTC_CAL_GetPeriod
* @param RTCx RTC Instance
@@ -3198,7 +3147,7 @@ __STATIC_INLINE uint32_t LL_RTC_CAL_GetPeriod(RTC_TypeDef *RTCx)
}
/**
- * @brief Set Calibration minus
+ * @brief Set smooth Calibration minus
* @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
* @note Bit can be written only when RECALPF is set to 0 in RTC_ISR
* @rmtoll CALR CALM LL_RTC_CAL_SetMinus
@@ -3212,7 +3161,7 @@ __STATIC_INLINE void LL_RTC_CAL_SetMinus(RTC_TypeDef *RTCx, uint32_t CalibMinus)
}
/**
- * @brief Get Calibration minus
+ * @brief Get smooth Calibration minus
* @rmtoll CALR CALM LL_RTC_CAL_GetMinus
* @param RTCx RTC Instance
* @retval Value between Min_Data=0x00 and Max_Data= 0x1FF
@@ -3270,7 +3219,6 @@ __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP2(RTC_TypeDef *RTCx)
}
#endif /* RTC_TAMPER2_SUPPORT */
-#if defined(RTC_TAMPER1_SUPPORT)
/**
* @brief Get RTC_TAMP1 detection flag
* @rmtoll ISR TAMP1F LL_RTC_IsActiveFlag_TAMP1
@@ -3281,7 +3229,6 @@ __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP1(RTC_TypeDef *RTCx)
{
return ((READ_BIT(RTCx->ISR, RTC_ISR_TAMP1F) == (RTC_ISR_TAMP1F)) ? 1UL : 0UL);
}
-#endif /* RTC_TAMPER1_SUPPORT */
/**
* @brief Get Time-stamp overflow flag
@@ -3305,7 +3252,6 @@ __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TS(RTC_TypeDef *RTCx)
return ((READ_BIT(RTCx->ISR, RTC_ISR_TSF) == (RTC_ISR_TSF)) ? 1UL : 0UL);
}
-#if defined(RTC_WAKEUP_SUPPORT)
/**
* @brief Get Wakeup timer flag
* @rmtoll ISR WUTF LL_RTC_IsActiveFlag_WUT
@@ -3316,7 +3262,6 @@ __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_WUT(RTC_TypeDef *RTCx)
{
return ((READ_BIT(RTCx->ISR, RTC_ISR_WUTF) == (RTC_ISR_WUTF)) ? 1UL : 0UL);
}
-#endif /* RTC_WAKEUP_SUPPORT */
/**
* @brief Get Alarm B flag
@@ -3338,7 +3283,6 @@ __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ALRB(RTC_TypeDef *RTCx)
__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ALRA(RTC_TypeDef *RTCx)
{
return ((READ_BIT(RTCx->ISR, RTC_ISR_ALRAF) == (RTC_ISR_ALRAF)) ? 1UL : 0UL);
-
}
#if defined(RTC_TAMPER3_SUPPORT)
@@ -3367,7 +3311,6 @@ __STATIC_INLINE void LL_RTC_ClearFlag_TAMP2(RTC_TypeDef *RTCx)
}
#endif /* RTC_TAMPER2_SUPPORT */
-#if defined(RTC_TAMPER1_SUPPORT)
/**
* @brief Clear RTC_TAMP1 detection flag
* @rmtoll ISR TAMP1F LL_RTC_ClearFlag_TAMP1
@@ -3378,7 +3321,6 @@ __STATIC_INLINE void LL_RTC_ClearFlag_TAMP1(RTC_TypeDef *RTCx)
{
WRITE_REG(RTCx->ISR, (~((RTC_ISR_TAMP1F | RTC_ISR_INIT) & 0x0000FFFFU) | (RTCx->ISR & RTC_ISR_INIT)));
}
-#endif /* RTC_TAMPER1_SUPPORT */
/**
* @brief Clear Time-stamp overflow flag
@@ -3402,7 +3344,6 @@ __STATIC_INLINE void LL_RTC_ClearFlag_TS(RTC_TypeDef *RTCx)
WRITE_REG(RTCx->ISR, (~((RTC_ISR_TSF | RTC_ISR_INIT) & 0x0000FFFFU) | (RTCx->ISR & RTC_ISR_INIT)));
}
-#if defined(RTC_WAKEUP_SUPPORT)
/**
* @brief Clear Wakeup timer flag
* @rmtoll ISR WUTF LL_RTC_ClearFlag_WUT
@@ -3413,7 +3354,6 @@ __STATIC_INLINE void LL_RTC_ClearFlag_WUT(RTC_TypeDef *RTCx)
{
WRITE_REG(RTCx->ISR, (~((RTC_ISR_WUTF | RTC_ISR_INIT) & 0x0000FFFFU) | (RTCx->ISR & RTC_ISR_INIT)));
}
-#endif /* RTC_WAKEUP_SUPPORT */
/**
* @brief Clear Alarm B flag
@@ -3481,7 +3421,7 @@ __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_INITS(RTC_TypeDef *RTCx)
return ((READ_BIT(RTCx->ISR, RTC_ISR_INITS) == (RTC_ISR_INITS)) ? 1UL : 0UL);
}
-#if defined(RTC_ISR_SHPF)
+#if defined(RTC_SUBSECOND_SUPPORT)
/**
* @brief Get Shift operation pending flag
* @rmtoll ISR SHPF LL_RTC_IsActiveFlag_SHP
@@ -3492,9 +3432,8 @@ __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_SHP(RTC_TypeDef *RTCx)
{
return ((READ_BIT(RTCx->ISR, RTC_ISR_SHPF) == (RTC_ISR_SHPF)) ? 1UL : 0UL);
}
-#endif /* RTC_ISR_SHPF */
+#endif /* RTC_SUBSECOND_SUPPORT */
-#if defined(RTC_WAKEUP_SUPPORT)
/**
* @brief Get Wakeup timer write flag
* @rmtoll ISR WUTWF LL_RTC_IsActiveFlag_WUTW
@@ -3505,7 +3444,6 @@ __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_WUTW(RTC_TypeDef *RTCx)
{
return ((READ_BIT(RTCx->ISR, RTC_ISR_WUTWF) == (RTC_ISR_WUTWF)) ? 1UL : 0UL);
}
-#endif /* RTC_WAKEUP_SUPPORT */
/**
* @brief Get Alarm B write flag
@@ -3561,7 +3499,6 @@ __STATIC_INLINE void LL_RTC_DisableIT_TS(RTC_TypeDef *RTCx)
CLEAR_BIT(RTCx->CR, RTC_CR_TSIE);
}
-#if defined(RTC_WAKEUP_SUPPORT)
/**
* @brief Enable Wakeup timer interrupt
* @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
@@ -3585,7 +3522,6 @@ __STATIC_INLINE void LL_RTC_DisableIT_WUT(RTC_TypeDef *RTCx)
{
CLEAR_BIT(RTCx->CR, RTC_CR_WUTIE);
}
-#endif /* RTC_WAKEUP_SUPPORT */
/**
* @brief Enable Alarm B interrupt
@@ -3668,7 +3604,6 @@ __STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_TS(RTC_TypeDef *RTCx)
return ((READ_BIT(RTCx->CR, RTC_CR_TSIE) == (RTC_CR_TSIE)) ? 1UL : 0UL);
}
-#if defined(RTC_WAKEUP_SUPPORT)
/**
* @brief Check if Wakeup timer interrupt is enabled or not
* @rmtoll CR WUTIE LL_RTC_IsEnabledIT_WUT
@@ -3679,7 +3614,6 @@ __STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_WUT(RTC_TypeDef *RTCx)
{
return ((READ_BIT(RTCx->CR, RTC_CR_WUTIE) == (RTC_CR_WUTIE)) ? 1UL : 0UL);
}
-#endif /* RTC_WAKEUP_SUPPORT */
/**
* @brief Check if Alarm B interrupt is enabled or not
@@ -3701,7 +3635,6 @@ __STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_ALRB(RTC_TypeDef *RTCx)
__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_ALRA(RTC_TypeDef *RTCx)
{
return ((READ_BIT(RTCx->CR, RTC_CR_ALRAIE) == (RTC_CR_ALRAIE)) ? 1UL : 0UL);
-
}
/**
@@ -3712,7 +3645,8 @@ __STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_ALRA(RTC_TypeDef *RTCx)
*/
__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_TAMP(RTC_TypeDef *RTCx)
{
- return ((READ_BIT(RTCx->TAFCR, RTC_TAFCR_TAMPIE) == (RTC_TAFCR_TAMPIE)) ? 1UL : 0UL);
+ return ((READ_BIT(RTCx->TAFCR,
+ RTC_TAFCR_TAMPIE) == (RTC_TAFCR_TAMPIE)) ? 1UL : 0UL);
}
/**
@@ -3762,6 +3696,4 @@ ErrorStatus LL_RTC_WaitForSynchro(RTC_TypeDef *RTCx);
}
#endif
-#endif /* __STM32L1xx_LL_RTC_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+#endif /* STM32L1xx_LL_RTC_H */
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_sdmmc.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_sdmmc.h
index 50faf67b29..42c77618ba 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_sdmmc.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_sdmmc.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2018 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -1059,8 +1058,14 @@ uint32_t SDIO_GetFIFOCount(SDIO_TypeDef *SDIOx);
/* SDMMC Cards mode management functions */
HAL_StatusTypeDef SDIO_SetSDMMCReadWaitMode(SDIO_TypeDef *SDIOx, uint32_t SDIO_ReadWaitMode);
+/**
+ * @}
+ */
/* SDMMC Commands management functions */
+/** @addtogroup HAL_SDMMC_LL_Group4
+ * @{
+ */
uint32_t SDMMC_CmdBlockLength(SDIO_TypeDef *SDIOx, uint32_t BlockSize);
uint32_t SDMMC_CmdReadSingleBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd);
uint32_t SDMMC_CmdReadMultiBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd);
@@ -1081,13 +1086,26 @@ uint32_t SDMMC_CmdBusWidth(SDIO_TypeDef *SDIOx, uint32_t BusWidth);
uint32_t SDMMC_CmdSendSCR(SDIO_TypeDef *SDIOx);
uint32_t SDMMC_CmdSendCID(SDIO_TypeDef *SDIOx);
uint32_t SDMMC_CmdSendCSD(SDIO_TypeDef *SDIOx, uint32_t Argument);
-uint32_t SDMMC_CmdSendEXTCSD(SDIO_TypeDef *SDIOx, uint32_t Argument);
uint32_t SDMMC_CmdSetRelAdd(SDIO_TypeDef *SDIOx, uint16_t *pRCA);
+uint32_t SDMMC_CmdSetRelAddMmc(SDIO_TypeDef *SDIOx, uint16_t RCA);
uint32_t SDMMC_CmdSendStatus(SDIO_TypeDef *SDIOx, uint32_t Argument);
uint32_t SDMMC_CmdStatusRegister(SDIO_TypeDef *SDIOx);
uint32_t SDMMC_CmdOpCondition(SDIO_TypeDef *SDIOx, uint32_t Argument);
uint32_t SDMMC_CmdSwitch(SDIO_TypeDef *SDIOx, uint32_t Argument);
+uint32_t SDMMC_CmdSendEXTCSD(SDIO_TypeDef *SDIOx, uint32_t Argument);
+/**
+ * @}
+ */
+/* SDMMC Responses management functions *****************************************/
+/** @addtogroup HAL_SDMMC_LL_Group5
+ * @{
+ */
+uint32_t SDMMC_GetCmdResp1(SDIO_TypeDef *SDIOx, uint8_t SD_CMD, uint32_t Timeout);
+uint32_t SDMMC_GetCmdResp2(SDIO_TypeDef *SDIOx);
+uint32_t SDMMC_GetCmdResp3(SDIO_TypeDef *SDIOx);
+uint32_t SDMMC_GetCmdResp6(SDIO_TypeDef *SDIOx, uint8_t SD_CMD, uint16_t *pRCA);
+uint32_t SDMMC_GetCmdResp7(SDIO_TypeDef *SDIOx);
/**
* @}
*/
@@ -1111,5 +1129,3 @@ uint32_t SDMMC_CmdSwitch(SDIO_TypeDef *SDIOx, uint32_t Argument);
#endif
#endif /* STM32L1xx_LL_SDMMC_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_spi.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_spi.h
index 4b883212c9..27e107c224 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_spi.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_spi.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -158,7 +157,7 @@ typedef struct
#define LL_SPI_PROTOCOL_MOTOROLA 0x00000000U /*!< Motorola mode. Used as default value */
#if defined(SPI_CR2_FRF)
#define LL_SPI_PROTOCOL_TI (SPI_CR2_FRF) /*!< TI mode */
-#endif
+#endif /* SPI_CR2_FRF */
/**
* @}
*/
@@ -384,7 +383,7 @@ __STATIC_INLINE uint32_t LL_SPI_GetStandard(SPI_TypeDef *SPIx)
{
return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_FRF));
}
-#endif
+#endif /* SPI_CR2_FRF */
/**
* @brief Set clock phase
@@ -812,7 +811,7 @@ __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_FRE(SPI_TypeDef *SPIx)
{
return ((READ_BIT(SPIx->SR, SPI_SR_FRE) == (SPI_SR_FRE)) ? 1UL : 0UL);
}
-#endif
+#endif /* SPI_CR2_FRF */
/**
* @brief Clear CRC error flag
@@ -1694,7 +1693,7 @@ __STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_FRE(SPI_TypeDef *SPIx)
{
return LL_SPI_IsActiveFlag_FRE(SPIx);
}
-#endif
+#endif /* SPI_CR2_FRF */
/**
* @brief Get channel side flag.
@@ -1999,4 +1998,3 @@ void LL_I2S_ConfigPrescaler(SPI_TypeDef *SPIx, uint32_t PrescalerLinear,
#endif /* STM32L1xx_LL_SPI_H */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_system.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_system.h
index d4dcfd06c5..6227e4a81c 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_system.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_system.h
@@ -3,6 +3,18 @@
* @file stm32l1xx_ll_system.h
* @author MCD Application Team
* @brief Header file of SYSTEM LL module.
+ *
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
@verbatim
==============================================================================
##### How to use this driver #####
@@ -17,17 +29,6 @@
@endverbatim
******************************************************************************
- * @attention
- *
- *
© Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
- *
- ******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
@@ -1314,7 +1315,7 @@ __STATIC_INLINE void LL_RI_OpenIOSwitchNotLinkedToADC(uint32_t IOSwitch)
}
/**
- * @brief Enable Hysteresis of the input schmitt triger of the port X
+ * @brief Enable Hysteresis of the input schmitt trigger of the port X
* @rmtoll RI_HYSCR1 PA LL_RI_EnableHysteresis\n
* RI_HYSCR1 PB LL_RI_EnableHysteresis\n
* RI_HYSCR1 PC LL_RI_EnableHysteresis\n
@@ -1380,7 +1381,7 @@ __STATIC_INLINE void LL_RI_EnableHysteresis(uint32_t Port, uint32_t Pin)
}
/**
- * @brief Disable Hysteresis of the input schmitt triger of the port X
+ * @brief Disable Hysteresis of the input schmitt trigger of the port X
* @rmtoll RI_HYSCR1 PA LL_RI_DisableHysteresis\n
* RI_HYSCR1 PB LL_RI_DisableHysteresis\n
* RI_HYSCR1 PC LL_RI_DisableHysteresis\n
@@ -2003,4 +2004,3 @@ __STATIC_INLINE void LL_FLASH_DisableSleepPowerDown(void)
#endif /* __STM32L1xx_LL_SYSTEM_H */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_tim.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_tim.h
index bdb1af6e27..d3f912d058 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_tim.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_tim.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -768,6 +767,7 @@ typedef struct
* @}
*/
+
/**
* @}
*/
@@ -800,10 +800,6 @@ typedef struct
* @}
*/
-/** @defgroup TIM_LL_EM_Exported_Macros Exported_Macros
- * @{
- */
-
/**
* @brief HELPER macro calculating the prescaler value to achieve the required counter clock frequency.
* @note ex: @ref __LL_TIM_CALC_PSC (80000000, 1000000);
@@ -812,7 +808,7 @@ typedef struct
* @retval Prescaler value (between Min_Data=0 and Max_Data=65535)
*/
#define __LL_TIM_CALC_PSC(__TIMCLK__, __CNTCLK__) \
- (((__TIMCLK__) >= (__CNTCLK__)) ? (uint32_t)(((__TIMCLK__)/(__CNTCLK__)) - 1U) : 0U)
+ (((__TIMCLK__) >= (__CNTCLK__)) ? (uint32_t)((((__TIMCLK__) + (__CNTCLK__)/2U)/(__CNTCLK__)) - 1U) : 0U)
/**
* @brief HELPER macro calculating the auto-reload value to achieve the required output signal frequency.
@@ -866,11 +862,6 @@ typedef struct
((uint32_t)(0x01U << (((__ICPSC__) >> 16U) >> TIM_CCMR1_IC1PSC_Pos)))
-/**
- * @}
- */
-
-
/**
* @}
*/
@@ -911,7 +902,7 @@ __STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL);
}
@@ -944,7 +935,7 @@ __STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval Inverted state of bit (0 or 1).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledUpdateEvent(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledUpdateEvent(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->CR1, TIM_CR1_UDIS) == (uint32_t)RESET) ? 1UL : 0UL);
}
@@ -978,7 +969,7 @@ __STATIC_INLINE void LL_TIM_SetUpdateSource(TIM_TypeDef *TIMx, uint32_t UpdateSo
* @arg @ref LL_TIM_UPDATESOURCE_REGULAR
* @arg @ref LL_TIM_UPDATESOURCE_COUNTER
*/
-__STATIC_INLINE uint32_t LL_TIM_GetUpdateSource(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_GetUpdateSource(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_URS));
}
@@ -1005,7 +996,7 @@ __STATIC_INLINE void LL_TIM_SetOnePulseMode(TIM_TypeDef *TIMx, uint32_t OnePulse
* @arg @ref LL_TIM_ONEPULSEMODE_SINGLE
* @arg @ref LL_TIM_ONEPULSEMODE_REPETITIVE
*/
-__STATIC_INLINE uint32_t LL_TIM_GetOnePulseMode(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_GetOnePulseMode(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_OPM));
}
@@ -1049,7 +1040,7 @@ __STATIC_INLINE void LL_TIM_SetCounterMode(TIM_TypeDef *TIMx, uint32_t CounterMo
* @arg @ref LL_TIM_COUNTERMODE_CENTER_DOWN
* @arg @ref LL_TIM_COUNTERMODE_CENTER_UP_DOWN
*/
-__STATIC_INLINE uint32_t LL_TIM_GetCounterMode(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_GetCounterMode(const TIM_TypeDef *TIMx)
{
uint32_t counter_mode;
@@ -1091,7 +1082,7 @@ __STATIC_INLINE void LL_TIM_DisableARRPreload(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledARRPreload(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledARRPreload(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->CR1, TIM_CR1_ARPE) == (TIM_CR1_ARPE)) ? 1UL : 0UL);
}
@@ -1128,7 +1119,7 @@ __STATIC_INLINE void LL_TIM_SetClockDivision(TIM_TypeDef *TIMx, uint32_t ClockDi
* @arg @ref LL_TIM_CLOCKDIVISION_DIV2
* @arg @ref LL_TIM_CLOCKDIVISION_DIV4
*/
-__STATIC_INLINE uint32_t LL_TIM_GetClockDivision(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_GetClockDivision(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CKD));
}
@@ -1155,7 +1146,7 @@ __STATIC_INLINE void LL_TIM_SetCounter(TIM_TypeDef *TIMx, uint32_t Counter)
* @param TIMx Timer instance
* @retval Counter value (between Min_Data=0 and Max_Data=0xFFFF or 0xFFFFFFFF)
*/
-__STATIC_INLINE uint32_t LL_TIM_GetCounter(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_GetCounter(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_REG(TIMx->CNT));
}
@@ -1168,7 +1159,7 @@ __STATIC_INLINE uint32_t LL_TIM_GetCounter(TIM_TypeDef *TIMx)
* @arg @ref LL_TIM_COUNTERDIRECTION_UP
* @arg @ref LL_TIM_COUNTERDIRECTION_DOWN
*/
-__STATIC_INLINE uint32_t LL_TIM_GetDirection(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_GetDirection(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR));
}
@@ -1195,7 +1186,7 @@ __STATIC_INLINE void LL_TIM_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Prescaler)
* @param TIMx Timer instance
* @retval Prescaler value between Min_Data=0 and Max_Data=65535
*/
-__STATIC_INLINE uint32_t LL_TIM_GetPrescaler(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_GetPrescaler(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_REG(TIMx->PSC));
}
@@ -1224,7 +1215,7 @@ __STATIC_INLINE void LL_TIM_SetAutoReload(TIM_TypeDef *TIMx, uint32_t AutoReload
* @param TIMx Timer instance
* @retval Auto-reload value
*/
-__STATIC_INLINE uint32_t LL_TIM_GetAutoReload(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_GetAutoReload(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_REG(TIMx->ARR));
}
@@ -1258,7 +1249,7 @@ __STATIC_INLINE void LL_TIM_CC_SetDMAReqTrigger(TIM_TypeDef *TIMx, uint32_t DMAR
* @arg @ref LL_TIM_CCDMAREQUEST_CC
* @arg @ref LL_TIM_CCDMAREQUEST_UPDATE
*/
-__STATIC_INLINE uint32_t LL_TIM_CC_GetDMAReqTrigger(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_CC_GetDMAReqTrigger(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_BIT(TIMx->CR2, TIM_CR2_CCDS));
}
@@ -1315,7 +1306,7 @@ __STATIC_INLINE void LL_TIM_CC_DisableChannel(TIM_TypeDef *TIMx, uint32_t Channe
* @arg @ref LL_TIM_CHANNEL_CH4
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledChannel(TIM_TypeDef *TIMx, uint32_t Channels)
+__STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledChannel(const TIM_TypeDef *TIMx, uint32_t Channels)
{
return ((READ_BIT(TIMx->CCER, Channels) == (Channels)) ? 1UL : 0UL);
}
@@ -1409,7 +1400,7 @@ __STATIC_INLINE void LL_TIM_OC_SetMode(TIM_TypeDef *TIMx, uint32_t Channel, uint
* @arg @ref LL_TIM_OCMODE_PWM1
* @arg @ref LL_TIM_OCMODE_PWM2
*/
-__STATIC_INLINE uint32_t LL_TIM_OC_GetMode(TIM_TypeDef *TIMx, uint32_t Channel)
+__STATIC_INLINE uint32_t LL_TIM_OC_GetMode(const TIM_TypeDef *TIMx, uint32_t Channel)
{
uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
@@ -1455,7 +1446,7 @@ __STATIC_INLINE void LL_TIM_OC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel,
* @arg @ref LL_TIM_OCPOLARITY_HIGH
* @arg @ref LL_TIM_OCPOLARITY_LOW
*/
-__STATIC_INLINE uint32_t LL_TIM_OC_GetPolarity(TIM_TypeDef *TIMx, uint32_t Channel)
+__STATIC_INLINE uint32_t LL_TIM_OC_GetPolarity(const TIM_TypeDef *TIMx, uint32_t Channel)
{
uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
return (READ_BIT(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel])) >> SHIFT_TAB_CCxP[iChannel]);
@@ -1520,7 +1511,7 @@ __STATIC_INLINE void LL_TIM_OC_DisableFast(TIM_TypeDef *TIMx, uint32_t Channel)
* @arg @ref LL_TIM_CHANNEL_CH4
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledFast(TIM_TypeDef *TIMx, uint32_t Channel)
+__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledFast(const TIM_TypeDef *TIMx, uint32_t Channel)
{
uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
@@ -1584,7 +1575,7 @@ __STATIC_INLINE void LL_TIM_OC_DisablePreload(TIM_TypeDef *TIMx, uint32_t Channe
* @arg @ref LL_TIM_CHANNEL_CH4
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledPreload(TIM_TypeDef *TIMx, uint32_t Channel)
+__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledPreload(const TIM_TypeDef *TIMx, uint32_t Channel)
{
uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
@@ -1657,7 +1648,7 @@ __STATIC_INLINE void LL_TIM_OC_DisableClear(TIM_TypeDef *TIMx, uint32_t Channel)
* @arg @ref LL_TIM_CHANNEL_CH4
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledClear(TIM_TypeDef *TIMx, uint32_t Channel)
+__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledClear(const TIM_TypeDef *TIMx, uint32_t Channel)
{
uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
@@ -1744,7 +1735,7 @@ __STATIC_INLINE void LL_TIM_OC_SetCompareCH4(TIM_TypeDef *TIMx, uint32_t Compare
* @param TIMx Timer instance
* @retval CompareValue (between Min_Data=0 and Max_Data=65535)
*/
-__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH1(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH1(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_REG(TIMx->CCR1));
}
@@ -1760,7 +1751,7 @@ __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH1(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval CompareValue (between Min_Data=0 and Max_Data=65535)
*/
-__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH2(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH2(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_REG(TIMx->CCR2));
}
@@ -1776,7 +1767,7 @@ __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH2(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval CompareValue (between Min_Data=0 and Max_Data=65535)
*/
-__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH3(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH3(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_REG(TIMx->CCR3));
}
@@ -1792,7 +1783,7 @@ __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH3(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval CompareValue (between Min_Data=0 and Max_Data=65535)
*/
-__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH4(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH4(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_REG(TIMx->CCR4));
}
@@ -1892,7 +1883,7 @@ __STATIC_INLINE void LL_TIM_IC_SetActiveInput(TIM_TypeDef *TIMx, uint32_t Channe
* @arg @ref LL_TIM_ACTIVEINPUT_INDIRECTTI
* @arg @ref LL_TIM_ACTIVEINPUT_TRC
*/
-__STATIC_INLINE uint32_t LL_TIM_IC_GetActiveInput(TIM_TypeDef *TIMx, uint32_t Channel)
+__STATIC_INLINE uint32_t LL_TIM_IC_GetActiveInput(const TIM_TypeDef *TIMx, uint32_t Channel)
{
uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
@@ -1943,7 +1934,7 @@ __STATIC_INLINE void LL_TIM_IC_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Channel,
* @arg @ref LL_TIM_ICPSC_DIV4
* @arg @ref LL_TIM_ICPSC_DIV8
*/
-__STATIC_INLINE uint32_t LL_TIM_IC_GetPrescaler(TIM_TypeDef *TIMx, uint32_t Channel)
+__STATIC_INLINE uint32_t LL_TIM_IC_GetPrescaler(const TIM_TypeDef *TIMx, uint32_t Channel)
{
uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
@@ -2018,7 +2009,7 @@ __STATIC_INLINE void LL_TIM_IC_SetFilter(TIM_TypeDef *TIMx, uint32_t Channel, ui
* @arg @ref LL_TIM_IC_FILTER_FDIV32_N6
* @arg @ref LL_TIM_IC_FILTER_FDIV32_N8
*/
-__STATIC_INLINE uint32_t LL_TIM_IC_GetFilter(TIM_TypeDef *TIMx, uint32_t Channel)
+__STATIC_INLINE uint32_t LL_TIM_IC_GetFilter(const TIM_TypeDef *TIMx, uint32_t Channel)
{
uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
@@ -2075,7 +2066,7 @@ __STATIC_INLINE void LL_TIM_IC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel,
* @arg @ref LL_TIM_IC_POLARITY_FALLING
* @arg @ref LL_TIM_IC_POLARITY_BOTHEDGE
*/
-__STATIC_INLINE uint32_t LL_TIM_IC_GetPolarity(TIM_TypeDef *TIMx, uint32_t Channel)
+__STATIC_INLINE uint32_t LL_TIM_IC_GetPolarity(const TIM_TypeDef *TIMx, uint32_t Channel)
{
uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
return (READ_BIT(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel])) >>
@@ -2116,7 +2107,7 @@ __STATIC_INLINE void LL_TIM_IC_DisableXORCombination(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IC_IsEnabledXORCombination(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IC_IsEnabledXORCombination(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->CR2, TIM_CR2_TI1S) == (TIM_CR2_TI1S)) ? 1UL : 0UL);
}
@@ -2132,7 +2123,7 @@ __STATIC_INLINE uint32_t LL_TIM_IC_IsEnabledXORCombination(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
*/
-__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH1(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH1(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_REG(TIMx->CCR1));
}
@@ -2148,7 +2139,7 @@ __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH1(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
*/
-__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH2(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH2(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_REG(TIMx->CCR2));
}
@@ -2164,7 +2155,7 @@ __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH2(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
*/
-__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH3(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH3(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_REG(TIMx->CCR3));
}
@@ -2180,7 +2171,7 @@ __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH3(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
*/
-__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH4(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH4(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_REG(TIMx->CCR4));
}
@@ -2227,7 +2218,7 @@ __STATIC_INLINE void LL_TIM_DisableExternalClock(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledExternalClock(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledExternalClock(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->SMCR, TIM_SMCR_ECE) == (TIM_SMCR_ECE)) ? 1UL : 0UL);
}
@@ -2376,7 +2367,7 @@ __STATIC_INLINE void LL_TIM_DisableMasterSlaveMode(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledMasterSlaveMode(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledMasterSlaveMode(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->SMCR, TIM_SMCR_MSM) == (TIM_SMCR_MSM)) ? 1UL : 0UL);
}
@@ -2617,7 +2608,7 @@ __STATIC_INLINE void LL_TIM_ClearFlag_UPDATE(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_UPDATE(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_UPDATE(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->SR, TIM_SR_UIF) == (TIM_SR_UIF)) ? 1UL : 0UL);
}
@@ -2639,7 +2630,7 @@ __STATIC_INLINE void LL_TIM_ClearFlag_CC1(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->SR, TIM_SR_CC1IF) == (TIM_SR_CC1IF)) ? 1UL : 0UL);
}
@@ -2661,7 +2652,7 @@ __STATIC_INLINE void LL_TIM_ClearFlag_CC2(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->SR, TIM_SR_CC2IF) == (TIM_SR_CC2IF)) ? 1UL : 0UL);
}
@@ -2683,7 +2674,7 @@ __STATIC_INLINE void LL_TIM_ClearFlag_CC3(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->SR, TIM_SR_CC3IF) == (TIM_SR_CC3IF)) ? 1UL : 0UL);
}
@@ -2705,7 +2696,7 @@ __STATIC_INLINE void LL_TIM_ClearFlag_CC4(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->SR, TIM_SR_CC4IF) == (TIM_SR_CC4IF)) ? 1UL : 0UL);
}
@@ -2727,7 +2718,7 @@ __STATIC_INLINE void LL_TIM_ClearFlag_TRIG(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_TRIG(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_TRIG(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->SR, TIM_SR_TIF) == (TIM_SR_TIF)) ? 1UL : 0UL);
}
@@ -2750,7 +2741,7 @@ __STATIC_INLINE void LL_TIM_ClearFlag_CC1OVR(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1OVR(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1OVR(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->SR, TIM_SR_CC1OF) == (TIM_SR_CC1OF)) ? 1UL : 0UL);
}
@@ -2773,7 +2764,7 @@ __STATIC_INLINE void LL_TIM_ClearFlag_CC2OVR(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2OVR(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2OVR(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->SR, TIM_SR_CC2OF) == (TIM_SR_CC2OF)) ? 1UL : 0UL);
}
@@ -2796,7 +2787,7 @@ __STATIC_INLINE void LL_TIM_ClearFlag_CC3OVR(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3OVR(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3OVR(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->SR, TIM_SR_CC3OF) == (TIM_SR_CC3OF)) ? 1UL : 0UL);
}
@@ -2819,7 +2810,7 @@ __STATIC_INLINE void LL_TIM_ClearFlag_CC4OVR(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4OVR(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4OVR(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->SR, TIM_SR_CC4OF) == (TIM_SR_CC4OF)) ? 1UL : 0UL);
}
@@ -2859,7 +2850,7 @@ __STATIC_INLINE void LL_TIM_DisableIT_UPDATE(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_UPDATE(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_UPDATE(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE)) ? 1UL : 0UL);
}
@@ -2892,7 +2883,7 @@ __STATIC_INLINE void LL_TIM_DisableIT_CC1(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC1(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC1(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->DIER, TIM_DIER_CC1IE) == (TIM_DIER_CC1IE)) ? 1UL : 0UL);
}
@@ -2925,7 +2916,7 @@ __STATIC_INLINE void LL_TIM_DisableIT_CC2(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC2(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC2(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2IE) == (TIM_DIER_CC2IE)) ? 1UL : 0UL);
}
@@ -2958,7 +2949,7 @@ __STATIC_INLINE void LL_TIM_DisableIT_CC3(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC3(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC3(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->DIER, TIM_DIER_CC3IE) == (TIM_DIER_CC3IE)) ? 1UL : 0UL);
}
@@ -2991,7 +2982,7 @@ __STATIC_INLINE void LL_TIM_DisableIT_CC4(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC4(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC4(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->DIER, TIM_DIER_CC4IE) == (TIM_DIER_CC4IE)) ? 1UL : 0UL);
}
@@ -3024,7 +3015,7 @@ __STATIC_INLINE void LL_TIM_DisableIT_TRIG(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_TRIG(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_TRIG(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->DIER, TIM_DIER_TIE) == (TIM_DIER_TIE)) ? 1UL : 0UL);
}
@@ -3033,7 +3024,7 @@ __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_TRIG(TIM_TypeDef *TIMx)
* @}
*/
-/** @defgroup TIM_LL_EF_DMA_Management DMA-Management
+/** @defgroup TIM_LL_EF_DMA_Management DMA Management
* @{
*/
/**
@@ -3064,7 +3055,7 @@ __STATIC_INLINE void LL_TIM_DisableDMAReq_UPDATE(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_UPDATE(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_UPDATE(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->DIER, TIM_DIER_UDE) == (TIM_DIER_UDE)) ? 1UL : 0UL);
}
@@ -3097,7 +3088,7 @@ __STATIC_INLINE void LL_TIM_DisableDMAReq_CC1(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC1(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC1(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->DIER, TIM_DIER_CC1DE) == (TIM_DIER_CC1DE)) ? 1UL : 0UL);
}
@@ -3130,7 +3121,7 @@ __STATIC_INLINE void LL_TIM_DisableDMAReq_CC2(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC2(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC2(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE)) ? 1UL : 0UL);
}
@@ -3163,7 +3154,7 @@ __STATIC_INLINE void LL_TIM_DisableDMAReq_CC3(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC3(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC3(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->DIER, TIM_DIER_CC3DE) == (TIM_DIER_CC3DE)) ? 1UL : 0UL);
}
@@ -3196,7 +3187,7 @@ __STATIC_INLINE void LL_TIM_DisableDMAReq_CC4(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC4(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC4(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->DIER, TIM_DIER_CC4DE) == (TIM_DIER_CC4DE)) ? 1UL : 0UL);
}
@@ -3229,7 +3220,7 @@ __STATIC_INLINE void LL_TIM_DisableDMAReq_TRIG(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_TRIG(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_TRIG(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->DIER, TIM_DIER_TDE) == (TIM_DIER_TDE)) ? 1UL : 0UL);
}
@@ -3316,15 +3307,15 @@ __STATIC_INLINE void LL_TIM_GenerateEvent_TRIG(TIM_TypeDef *TIMx)
* @{
*/
-ErrorStatus LL_TIM_DeInit(TIM_TypeDef *TIMx);
+ErrorStatus LL_TIM_DeInit(const TIM_TypeDef *TIMx);
void LL_TIM_StructInit(LL_TIM_InitTypeDef *TIM_InitStruct);
-ErrorStatus LL_TIM_Init(TIM_TypeDef *TIMx, LL_TIM_InitTypeDef *TIM_InitStruct);
+ErrorStatus LL_TIM_Init(TIM_TypeDef *TIMx, const LL_TIM_InitTypeDef *TIM_InitStruct);
void LL_TIM_OC_StructInit(LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct);
-ErrorStatus LL_TIM_OC_Init(TIM_TypeDef *TIMx, uint32_t Channel, LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct);
+ErrorStatus LL_TIM_OC_Init(TIM_TypeDef *TIMx, uint32_t Channel, const LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct);
void LL_TIM_IC_StructInit(LL_TIM_IC_InitTypeDef *TIM_ICInitStruct);
-ErrorStatus LL_TIM_IC_Init(TIM_TypeDef *TIMx, uint32_t Channel, LL_TIM_IC_InitTypeDef *TIM_IC_InitStruct);
+ErrorStatus LL_TIM_IC_Init(TIM_TypeDef *TIMx, uint32_t Channel, const LL_TIM_IC_InitTypeDef *TIM_IC_InitStruct);
void LL_TIM_ENCODER_StructInit(LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct);
-ErrorStatus LL_TIM_ENCODER_Init(TIM_TypeDef *TIMx, LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct);
+ErrorStatus LL_TIM_ENCODER_Init(TIM_TypeDef *TIMx, const LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct);
/**
* @}
*/
@@ -3349,4 +3340,3 @@ ErrorStatus LL_TIM_ENCODER_Init(TIM_TypeDef *TIMx, LL_TIM_ENCODER_InitTypeDef *T
#endif
#endif /* __STM32L1xx_LL_TIM_H */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_usart.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_usart.h
index 66f1221868..e280c34916 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_usart.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_usart.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -346,7 +345,7 @@ typedef struct
* @}
*/
-/** @defgroup USART_LL_EM_Exported_Macros_Helper Exported_Macros_Helper
+/** @defgroup USART_LL_EM_Exported_Macros_Helper Exported Macros Helper
* @{
*/
@@ -359,11 +358,12 @@ typedef struct
*/
#define __LL_USART_DIV_SAMPLING8_100(__PERIPHCLK__, __BAUDRATE__) (((__PERIPHCLK__)*25)/(2*(__BAUDRATE__)))
#define __LL_USART_DIVMANT_SAMPLING8(__PERIPHCLK__, __BAUDRATE__) (__LL_USART_DIV_SAMPLING8_100((__PERIPHCLK__), (__BAUDRATE__))/100)
-#define __LL_USART_DIVFRAQ_SAMPLING8(__PERIPHCLK__, __BAUDRATE__) (((__LL_USART_DIV_SAMPLING8_100((__PERIPHCLK__), (__BAUDRATE__)) - (__LL_USART_DIVMANT_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) * 100)) * 8 + 50) / 100)
+#define __LL_USART_DIVFRAQ_SAMPLING8(__PERIPHCLK__, __BAUDRATE__) (((__LL_USART_DIV_SAMPLING8_100((__PERIPHCLK__), (__BAUDRATE__)) - (__LL_USART_DIVMANT_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) * 100)) * 8\
+ + 50) / 100)
/* UART BRR = mantissa + overflow + fraction
= (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07) */
#define __LL_USART_DIV_SAMPLING8(__PERIPHCLK__, __BAUDRATE__) (((__LL_USART_DIVMANT_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) << 4) + \
- ((__LL_USART_DIVFRAQ_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) & 0xF8) << 1)) + \
+ ((__LL_USART_DIVFRAQ_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) & 0xF8) << 1)) + \
(__LL_USART_DIVFRAQ_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) & 0x07))
/**
@@ -375,11 +375,12 @@ typedef struct
*/
#define __LL_USART_DIV_SAMPLING16_100(__PERIPHCLK__, __BAUDRATE__) (((__PERIPHCLK__)*25)/(4*(__BAUDRATE__)))
#define __LL_USART_DIVMANT_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (__LL_USART_DIV_SAMPLING16_100((__PERIPHCLK__), (__BAUDRATE__))/100)
-#define __LL_USART_DIVFRAQ_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) ((((__LL_USART_DIV_SAMPLING16_100((__PERIPHCLK__), (__BAUDRATE__)) - (__LL_USART_DIVMANT_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) * 100)) * 16) + 50) / 100)
+#define __LL_USART_DIVFRAQ_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) ((((__LL_USART_DIV_SAMPLING16_100((__PERIPHCLK__), (__BAUDRATE__)) - (__LL_USART_DIVMANT_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) * 100)) * 16)\
+ + 50) / 100)
/* USART BRR = mantissa + overflow + fraction
= (USART DIVMANT << 4) + (USART DIVFRAQ & 0xF0) + (USART DIVFRAQ & 0x0F) */
#define __LL_USART_DIV_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (((__LL_USART_DIVMANT_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) << 4) + \
- (__LL_USART_DIVFRAQ_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) & 0xF0)) + \
+ (__LL_USART_DIVFRAQ_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) & 0xF0)) + \
(__LL_USART_DIVFRAQ_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) & 0x0F))
/**
@@ -431,7 +432,7 @@ __STATIC_INLINE void LL_USART_Disable(USART_TypeDef *USARTx)
* @param USARTx USART Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_USART_IsEnabled(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_IsEnabled(const USART_TypeDef *USARTx)
{
return (READ_BIT(USARTx->CR1, USART_CR1_UE) == (USART_CR1_UE));
}
@@ -444,7 +445,7 @@ __STATIC_INLINE uint32_t LL_USART_IsEnabled(USART_TypeDef *USARTx)
*/
__STATIC_INLINE void LL_USART_EnableDirectionRx(USART_TypeDef *USARTx)
{
- SET_BIT(USARTx->CR1, USART_CR1_RE);
+ ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_RE);
}
/**
@@ -455,7 +456,7 @@ __STATIC_INLINE void LL_USART_EnableDirectionRx(USART_TypeDef *USARTx)
*/
__STATIC_INLINE void LL_USART_DisableDirectionRx(USART_TypeDef *USARTx)
{
- CLEAR_BIT(USARTx->CR1, USART_CR1_RE);
+ ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_RE);
}
/**
@@ -466,7 +467,7 @@ __STATIC_INLINE void LL_USART_DisableDirectionRx(USART_TypeDef *USARTx)
*/
__STATIC_INLINE void LL_USART_EnableDirectionTx(USART_TypeDef *USARTx)
{
- SET_BIT(USARTx->CR1, USART_CR1_TE);
+ ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_TE);
}
/**
@@ -477,7 +478,7 @@ __STATIC_INLINE void LL_USART_EnableDirectionTx(USART_TypeDef *USARTx)
*/
__STATIC_INLINE void LL_USART_DisableDirectionTx(USART_TypeDef *USARTx)
{
- CLEAR_BIT(USARTx->CR1, USART_CR1_TE);
+ ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_TE);
}
/**
@@ -495,7 +496,7 @@ __STATIC_INLINE void LL_USART_DisableDirectionTx(USART_TypeDef *USARTx)
*/
__STATIC_INLINE void LL_USART_SetTransferDirection(USART_TypeDef *USARTx, uint32_t TransferDirection)
{
- MODIFY_REG(USARTx->CR1, USART_CR1_RE | USART_CR1_TE, TransferDirection);
+ ATOMIC_MODIFY_REG(USARTx->CR1, USART_CR1_RE | USART_CR1_TE, TransferDirection);
}
/**
@@ -509,7 +510,7 @@ __STATIC_INLINE void LL_USART_SetTransferDirection(USART_TypeDef *USARTx, uint32
* @arg @ref LL_USART_DIRECTION_TX
* @arg @ref LL_USART_DIRECTION_TX_RX
*/
-__STATIC_INLINE uint32_t LL_USART_GetTransferDirection(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_GetTransferDirection(const USART_TypeDef *USARTx)
{
return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_RE | USART_CR1_TE));
}
@@ -543,7 +544,7 @@ __STATIC_INLINE void LL_USART_SetParity(USART_TypeDef *USARTx, uint32_t Parity)
* @arg @ref LL_USART_PARITY_EVEN
* @arg @ref LL_USART_PARITY_ODD
*/
-__STATIC_INLINE uint32_t LL_USART_GetParity(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_GetParity(const USART_TypeDef *USARTx)
{
return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE));
}
@@ -570,7 +571,7 @@ __STATIC_INLINE void LL_USART_SetWakeUpMethod(USART_TypeDef *USARTx, uint32_t Me
* @arg @ref LL_USART_WAKEUP_IDLELINE
* @arg @ref LL_USART_WAKEUP_ADDRESSMARK
*/
-__STATIC_INLINE uint32_t LL_USART_GetWakeUpMethod(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_GetWakeUpMethod(const USART_TypeDef *USARTx)
{
return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_WAKE));
}
@@ -597,7 +598,7 @@ __STATIC_INLINE void LL_USART_SetDataWidth(USART_TypeDef *USARTx, uint32_t DataW
* @arg @ref LL_USART_DATAWIDTH_8B
* @arg @ref LL_USART_DATAWIDTH_9B
*/
-__STATIC_INLINE uint32_t LL_USART_GetDataWidth(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_GetDataWidth(const USART_TypeDef *USARTx)
{
return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_M));
}
@@ -624,14 +625,14 @@ __STATIC_INLINE void LL_USART_SetOverSampling(USART_TypeDef *USARTx, uint32_t Ov
* @arg @ref LL_USART_OVERSAMPLING_16
* @arg @ref LL_USART_OVERSAMPLING_8
*/
-__STATIC_INLINE uint32_t LL_USART_GetOverSampling(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_GetOverSampling(const USART_TypeDef *USARTx)
{
return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_OVER8));
}
/**
* @brief Configure if Clock pulse of the last data bit is output to the SCLK pin or not
- * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not
* Synchronous mode is supported by the USARTx instance.
* @rmtoll CR2 LBCL LL_USART_SetLastClkPulseOutput
* @param USARTx USART Instance
@@ -648,7 +649,7 @@ __STATIC_INLINE void LL_USART_SetLastClkPulseOutput(USART_TypeDef *USARTx, uint3
/**
* @brief Retrieve Clock pulse of the last data bit output configuration
* (Last bit Clock pulse output to the SCLK pin or not)
- * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not
* Synchronous mode is supported by the USARTx instance.
* @rmtoll CR2 LBCL LL_USART_GetLastClkPulseOutput
* @param USARTx USART Instance
@@ -656,14 +657,14 @@ __STATIC_INLINE void LL_USART_SetLastClkPulseOutput(USART_TypeDef *USARTx, uint3
* @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT
* @arg @ref LL_USART_LASTCLKPULSE_OUTPUT
*/
-__STATIC_INLINE uint32_t LL_USART_GetLastClkPulseOutput(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_GetLastClkPulseOutput(const USART_TypeDef *USARTx)
{
return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBCL));
}
/**
* @brief Select the phase of the clock output on the SCLK pin in synchronous mode
- * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not
* Synchronous mode is supported by the USARTx instance.
* @rmtoll CR2 CPHA LL_USART_SetClockPhase
* @param USARTx USART Instance
@@ -679,7 +680,7 @@ __STATIC_INLINE void LL_USART_SetClockPhase(USART_TypeDef *USARTx, uint32_t Cloc
/**
* @brief Return phase of the clock output on the SCLK pin in synchronous mode
- * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not
* Synchronous mode is supported by the USARTx instance.
* @rmtoll CR2 CPHA LL_USART_GetClockPhase
* @param USARTx USART Instance
@@ -687,14 +688,14 @@ __STATIC_INLINE void LL_USART_SetClockPhase(USART_TypeDef *USARTx, uint32_t Cloc
* @arg @ref LL_USART_PHASE_1EDGE
* @arg @ref LL_USART_PHASE_2EDGE
*/
-__STATIC_INLINE uint32_t LL_USART_GetClockPhase(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_GetClockPhase(const USART_TypeDef *USARTx)
{
return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPHA));
}
/**
* @brief Select the polarity of the clock output on the SCLK pin in synchronous mode
- * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not
* Synchronous mode is supported by the USARTx instance.
* @rmtoll CR2 CPOL LL_USART_SetClockPolarity
* @param USARTx USART Instance
@@ -710,7 +711,7 @@ __STATIC_INLINE void LL_USART_SetClockPolarity(USART_TypeDef *USARTx, uint32_t C
/**
* @brief Return polarity of the clock output on the SCLK pin in synchronous mode
- * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not
* Synchronous mode is supported by the USARTx instance.
* @rmtoll CR2 CPOL LL_USART_GetClockPolarity
* @param USARTx USART Instance
@@ -718,14 +719,14 @@ __STATIC_INLINE void LL_USART_SetClockPolarity(USART_TypeDef *USARTx, uint32_t C
* @arg @ref LL_USART_POLARITY_LOW
* @arg @ref LL_USART_POLARITY_HIGH
*/
-__STATIC_INLINE uint32_t LL_USART_GetClockPolarity(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_GetClockPolarity(const USART_TypeDef *USARTx)
{
return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPOL));
}
/**
* @brief Configure Clock signal format (Phase Polarity and choice about output of last bit clock pulse)
- * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not
* Synchronous mode is supported by the USARTx instance.
* @note Call of this function is equivalent to following function call sequence :
* - Clock Phase configuration using @ref LL_USART_SetClockPhase() function
@@ -753,7 +754,7 @@ __STATIC_INLINE void LL_USART_ConfigClock(USART_TypeDef *USARTx, uint32_t Phase,
/**
* @brief Enable Clock output on SCLK pin
- * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not
* Synchronous mode is supported by the USARTx instance.
* @rmtoll CR2 CLKEN LL_USART_EnableSCLKOutput
* @param USARTx USART Instance
@@ -766,7 +767,7 @@ __STATIC_INLINE void LL_USART_EnableSCLKOutput(USART_TypeDef *USARTx)
/**
* @brief Disable Clock output on SCLK pin
- * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not
* Synchronous mode is supported by the USARTx instance.
* @rmtoll CR2 CLKEN LL_USART_DisableSCLKOutput
* @param USARTx USART Instance
@@ -779,13 +780,13 @@ __STATIC_INLINE void LL_USART_DisableSCLKOutput(USART_TypeDef *USARTx)
/**
* @brief Indicate if Clock output on SCLK pin is enabled
- * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not
* Synchronous mode is supported by the USARTx instance.
* @rmtoll CR2 CLKEN LL_USART_IsEnabledSCLKOutput
* @param USARTx USART Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_USART_IsEnabledSCLKOutput(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_IsEnabledSCLKOutput(const USART_TypeDef *USARTx)
{
return (READ_BIT(USARTx->CR2, USART_CR2_CLKEN) == (USART_CR2_CLKEN));
}
@@ -816,7 +817,7 @@ __STATIC_INLINE void LL_USART_SetStopBitsLength(USART_TypeDef *USARTx, uint32_t
* @arg @ref LL_USART_STOPBITS_1_5
* @arg @ref LL_USART_STOPBITS_2
*/
-__STATIC_INLINE uint32_t LL_USART_GetStopBitsLength(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_GetStopBitsLength(const USART_TypeDef *USARTx)
{
return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_STOP));
}
@@ -874,14 +875,14 @@ __STATIC_INLINE void LL_USART_SetNodeAddress(USART_TypeDef *USARTx, uint32_t Nod
* @param USARTx USART Instance
* @retval Address of the USART node (Value between Min_Data=0 and Max_Data=255)
*/
-__STATIC_INLINE uint32_t LL_USART_GetNodeAddress(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_GetNodeAddress(const USART_TypeDef *USARTx)
{
return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ADD));
}
/**
* @brief Enable RTS HW Flow Control
- * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
* Hardware Flow control feature is supported by the USARTx instance.
* @rmtoll CR3 RTSE LL_USART_EnableRTSHWFlowCtrl
* @param USARTx USART Instance
@@ -894,7 +895,7 @@ __STATIC_INLINE void LL_USART_EnableRTSHWFlowCtrl(USART_TypeDef *USARTx)
/**
* @brief Disable RTS HW Flow Control
- * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
* Hardware Flow control feature is supported by the USARTx instance.
* @rmtoll CR3 RTSE LL_USART_DisableRTSHWFlowCtrl
* @param USARTx USART Instance
@@ -907,7 +908,7 @@ __STATIC_INLINE void LL_USART_DisableRTSHWFlowCtrl(USART_TypeDef *USARTx)
/**
* @brief Enable CTS HW Flow Control
- * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
* Hardware Flow control feature is supported by the USARTx instance.
* @rmtoll CR3 CTSE LL_USART_EnableCTSHWFlowCtrl
* @param USARTx USART Instance
@@ -920,7 +921,7 @@ __STATIC_INLINE void LL_USART_EnableCTSHWFlowCtrl(USART_TypeDef *USARTx)
/**
* @brief Disable CTS HW Flow Control
- * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
* Hardware Flow control feature is supported by the USARTx instance.
* @rmtoll CR3 CTSE LL_USART_DisableCTSHWFlowCtrl
* @param USARTx USART Instance
@@ -933,7 +934,7 @@ __STATIC_INLINE void LL_USART_DisableCTSHWFlowCtrl(USART_TypeDef *USARTx)
/**
* @brief Configure HW Flow Control mode (both CTS and RTS)
- * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
* Hardware Flow control feature is supported by the USARTx instance.
* @rmtoll CR3 RTSE LL_USART_SetHWFlowCtrl\n
* CR3 CTSE LL_USART_SetHWFlowCtrl
@@ -952,7 +953,7 @@ __STATIC_INLINE void LL_USART_SetHWFlowCtrl(USART_TypeDef *USARTx, uint32_t Hard
/**
* @brief Return HW Flow Control configuration (both CTS and RTS)
- * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
* Hardware Flow control feature is supported by the USARTx instance.
* @rmtoll CR3 RTSE LL_USART_GetHWFlowCtrl\n
* CR3 CTSE LL_USART_GetHWFlowCtrl
@@ -963,7 +964,7 @@ __STATIC_INLINE void LL_USART_SetHWFlowCtrl(USART_TypeDef *USARTx, uint32_t Hard
* @arg @ref LL_USART_HWCONTROL_CTS
* @arg @ref LL_USART_HWCONTROL_RTS_CTS
*/
-__STATIC_INLINE uint32_t LL_USART_GetHWFlowCtrl(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_GetHWFlowCtrl(const USART_TypeDef *USARTx)
{
return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE));
}
@@ -996,7 +997,7 @@ __STATIC_INLINE void LL_USART_DisableOneBitSamp(USART_TypeDef *USARTx)
* @param USARTx USART Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_USART_IsEnabledOneBitSamp(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_IsEnabledOneBitSamp(const USART_TypeDef *USARTx)
{
return (READ_BIT(USARTx->CR3, USART_CR3_ONEBIT) == (USART_CR3_ONEBIT));
}
@@ -1041,7 +1042,7 @@ __STATIC_INLINE void LL_USART_SetBaudRate(USART_TypeDef *USARTx, uint32_t Periph
* @arg @ref LL_USART_OVERSAMPLING_8
* @retval Baud Rate
*/
-__STATIC_INLINE uint32_t LL_USART_GetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling)
+__STATIC_INLINE uint32_t LL_USART_GetBaudRate(const USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling)
{
uint32_t usartdiv = 0x0U;
uint32_t brrresult = 0x0U;
@@ -1076,7 +1077,7 @@ __STATIC_INLINE uint32_t LL_USART_GetBaudRate(USART_TypeDef *USARTx, uint32_t Pe
/**
* @brief Enable IrDA mode
- * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
* IrDA feature is supported by the USARTx instance.
* @rmtoll CR3 IREN LL_USART_EnableIrda
* @param USARTx USART Instance
@@ -1089,7 +1090,7 @@ __STATIC_INLINE void LL_USART_EnableIrda(USART_TypeDef *USARTx)
/**
* @brief Disable IrDA mode
- * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
* IrDA feature is supported by the USARTx instance.
* @rmtoll CR3 IREN LL_USART_DisableIrda
* @param USARTx USART Instance
@@ -1102,20 +1103,20 @@ __STATIC_INLINE void LL_USART_DisableIrda(USART_TypeDef *USARTx)
/**
* @brief Indicate if IrDA mode is enabled
- * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
* IrDA feature is supported by the USARTx instance.
* @rmtoll CR3 IREN LL_USART_IsEnabledIrda
* @param USARTx USART Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_USART_IsEnabledIrda(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_IsEnabledIrda(const USART_TypeDef *USARTx)
{
return (READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN));
}
/**
* @brief Configure IrDA Power Mode (Normal or Low Power)
- * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
* IrDA feature is supported by the USARTx instance.
* @rmtoll CR3 IRLP LL_USART_SetIrdaPowerMode
* @param USARTx USART Instance
@@ -1131,7 +1132,7 @@ __STATIC_INLINE void LL_USART_SetIrdaPowerMode(USART_TypeDef *USARTx, uint32_t P
/**
* @brief Retrieve IrDA Power Mode configuration (Normal or Low Power)
- * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
* IrDA feature is supported by the USARTx instance.
* @rmtoll CR3 IRLP LL_USART_GetIrdaPowerMode
* @param USARTx USART Instance
@@ -1139,7 +1140,7 @@ __STATIC_INLINE void LL_USART_SetIrdaPowerMode(USART_TypeDef *USARTx, uint32_t P
* @arg @ref LL_USART_IRDA_POWER_NORMAL
* @arg @ref LL_USART_PHASE_2EDGE
*/
-__STATIC_INLINE uint32_t LL_USART_GetIrdaPowerMode(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_GetIrdaPowerMode(const USART_TypeDef *USARTx)
{
return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_IRLP));
}
@@ -1147,7 +1148,7 @@ __STATIC_INLINE uint32_t LL_USART_GetIrdaPowerMode(USART_TypeDef *USARTx)
/**
* @brief Set Irda prescaler value, used for dividing the USART clock source
* to achieve the Irda Low Power frequency (8 bits value)
- * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
* IrDA feature is supported by the USARTx instance.
* @rmtoll GTPR PSC LL_USART_SetIrdaPrescaler
* @param USARTx USART Instance
@@ -1162,13 +1163,13 @@ __STATIC_INLINE void LL_USART_SetIrdaPrescaler(USART_TypeDef *USARTx, uint32_t P
/**
* @brief Return Irda prescaler value, used for dividing the USART clock source
* to achieve the Irda Low Power frequency (8 bits value)
- * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
* IrDA feature is supported by the USARTx instance.
* @rmtoll GTPR PSC LL_USART_GetIrdaPrescaler
* @param USARTx USART Instance
* @retval Irda prescaler value (Value between Min_Data=0x00 and Max_Data=0xFF)
*/
-__STATIC_INLINE uint32_t LL_USART_GetIrdaPrescaler(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_GetIrdaPrescaler(const USART_TypeDef *USARTx)
{
return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_PSC));
}
@@ -1183,7 +1184,7 @@ __STATIC_INLINE uint32_t LL_USART_GetIrdaPrescaler(USART_TypeDef *USARTx)
/**
* @brief Enable Smartcard NACK transmission
- * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
* Smartcard feature is supported by the USARTx instance.
* @rmtoll CR3 NACK LL_USART_EnableSmartcardNACK
* @param USARTx USART Instance
@@ -1196,7 +1197,7 @@ __STATIC_INLINE void LL_USART_EnableSmartcardNACK(USART_TypeDef *USARTx)
/**
* @brief Disable Smartcard NACK transmission
- * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
* Smartcard feature is supported by the USARTx instance.
* @rmtoll CR3 NACK LL_USART_DisableSmartcardNACK
* @param USARTx USART Instance
@@ -1209,20 +1210,20 @@ __STATIC_INLINE void LL_USART_DisableSmartcardNACK(USART_TypeDef *USARTx)
/**
* @brief Indicate if Smartcard NACK transmission is enabled
- * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
* Smartcard feature is supported by the USARTx instance.
* @rmtoll CR3 NACK LL_USART_IsEnabledSmartcardNACK
* @param USARTx USART Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcardNACK(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcardNACK(const USART_TypeDef *USARTx)
{
return (READ_BIT(USARTx->CR3, USART_CR3_NACK) == (USART_CR3_NACK));
}
/**
* @brief Enable Smartcard mode
- * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
* Smartcard feature is supported by the USARTx instance.
* @rmtoll CR3 SCEN LL_USART_EnableSmartcard
* @param USARTx USART Instance
@@ -1235,7 +1236,7 @@ __STATIC_INLINE void LL_USART_EnableSmartcard(USART_TypeDef *USARTx)
/**
* @brief Disable Smartcard mode
- * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
* Smartcard feature is supported by the USARTx instance.
* @rmtoll CR3 SCEN LL_USART_DisableSmartcard
* @param USARTx USART Instance
@@ -1248,13 +1249,13 @@ __STATIC_INLINE void LL_USART_DisableSmartcard(USART_TypeDef *USARTx)
/**
* @brief Indicate if Smartcard mode is enabled
- * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
* Smartcard feature is supported by the USARTx instance.
* @rmtoll CR3 SCEN LL_USART_IsEnabledSmartcard
* @param USARTx USART Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcard(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcard(const USART_TypeDef *USARTx)
{
return (READ_BIT(USARTx->CR3, USART_CR3_SCEN) == (USART_CR3_SCEN));
}
@@ -1262,7 +1263,7 @@ __STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcard(USART_TypeDef *USARTx)
/**
* @brief Set Smartcard prescaler value, used for dividing the USART clock
* source to provide the SMARTCARD Clock (5 bits value)
- * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
* Smartcard feature is supported by the USARTx instance.
* @rmtoll GTPR PSC LL_USART_SetSmartcardPrescaler
* @param USARTx USART Instance
@@ -1277,13 +1278,13 @@ __STATIC_INLINE void LL_USART_SetSmartcardPrescaler(USART_TypeDef *USARTx, uint3
/**
* @brief Return Smartcard prescaler value, used for dividing the USART clock
* source to provide the SMARTCARD Clock (5 bits value)
- * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
* Smartcard feature is supported by the USARTx instance.
* @rmtoll GTPR PSC LL_USART_GetSmartcardPrescaler
* @param USARTx USART Instance
* @retval Smartcard prescaler value (Value between Min_Data=0 and Max_Data=31)
*/
-__STATIC_INLINE uint32_t LL_USART_GetSmartcardPrescaler(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_GetSmartcardPrescaler(const USART_TypeDef *USARTx)
{
return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_PSC));
}
@@ -1291,7 +1292,7 @@ __STATIC_INLINE uint32_t LL_USART_GetSmartcardPrescaler(USART_TypeDef *USARTx)
/**
* @brief Set Smartcard Guard time value, expressed in nb of baud clocks periods
* (GT[7:0] bits : Guard time value)
- * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
* Smartcard feature is supported by the USARTx instance.
* @rmtoll GTPR GT LL_USART_SetSmartcardGuardTime
* @param USARTx USART Instance
@@ -1306,13 +1307,13 @@ __STATIC_INLINE void LL_USART_SetSmartcardGuardTime(USART_TypeDef *USARTx, uint3
/**
* @brief Return Smartcard Guard time value, expressed in nb of baud clocks periods
* (GT[7:0] bits : Guard time value)
- * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
* Smartcard feature is supported by the USARTx instance.
* @rmtoll GTPR GT LL_USART_GetSmartcardGuardTime
* @param USARTx USART Instance
* @retval Smartcard Guard time value (Value between Min_Data=0x00 and Max_Data=0xFF)
*/
-__STATIC_INLINE uint32_t LL_USART_GetSmartcardGuardTime(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_GetSmartcardGuardTime(const USART_TypeDef *USARTx)
{
return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_GT) >> USART_POSITION_GTPR_GT);
}
@@ -1327,7 +1328,7 @@ __STATIC_INLINE uint32_t LL_USART_GetSmartcardGuardTime(USART_TypeDef *USARTx)
/**
* @brief Enable Single Wire Half-Duplex mode
- * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
* Half-Duplex mode is supported by the USARTx instance.
* @rmtoll CR3 HDSEL LL_USART_EnableHalfDuplex
* @param USARTx USART Instance
@@ -1340,7 +1341,7 @@ __STATIC_INLINE void LL_USART_EnableHalfDuplex(USART_TypeDef *USARTx)
/**
* @brief Disable Single Wire Half-Duplex mode
- * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
* Half-Duplex mode is supported by the USARTx instance.
* @rmtoll CR3 HDSEL LL_USART_DisableHalfDuplex
* @param USARTx USART Instance
@@ -1353,13 +1354,13 @@ __STATIC_INLINE void LL_USART_DisableHalfDuplex(USART_TypeDef *USARTx)
/**
* @brief Indicate if Single Wire Half-Duplex mode is enabled
- * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
* Half-Duplex mode is supported by the USARTx instance.
* @rmtoll CR3 HDSEL LL_USART_IsEnabledHalfDuplex
* @param USARTx USART Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_USART_IsEnabledHalfDuplex(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_IsEnabledHalfDuplex(const USART_TypeDef *USARTx)
{
return (READ_BIT(USARTx->CR3, USART_CR3_HDSEL) == (USART_CR3_HDSEL));
}
@@ -1374,7 +1375,7 @@ __STATIC_INLINE uint32_t LL_USART_IsEnabledHalfDuplex(USART_TypeDef *USARTx)
/**
* @brief Set LIN Break Detection Length
- * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
* LIN feature is supported by the USARTx instance.
* @rmtoll CR2 LBDL LL_USART_SetLINBrkDetectionLen
* @param USARTx USART Instance
@@ -1390,7 +1391,7 @@ __STATIC_INLINE void LL_USART_SetLINBrkDetectionLen(USART_TypeDef *USARTx, uint3
/**
* @brief Return LIN Break Detection Length
- * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
* LIN feature is supported by the USARTx instance.
* @rmtoll CR2 LBDL LL_USART_GetLINBrkDetectionLen
* @param USARTx USART Instance
@@ -1398,14 +1399,14 @@ __STATIC_INLINE void LL_USART_SetLINBrkDetectionLen(USART_TypeDef *USARTx, uint3
* @arg @ref LL_USART_LINBREAK_DETECT_10B
* @arg @ref LL_USART_LINBREAK_DETECT_11B
*/
-__STATIC_INLINE uint32_t LL_USART_GetLINBrkDetectionLen(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_GetLINBrkDetectionLen(const USART_TypeDef *USARTx)
{
return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBDL));
}
/**
* @brief Enable LIN mode
- * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
* LIN feature is supported by the USARTx instance.
* @rmtoll CR2 LINEN LL_USART_EnableLIN
* @param USARTx USART Instance
@@ -1418,7 +1419,7 @@ __STATIC_INLINE void LL_USART_EnableLIN(USART_TypeDef *USARTx)
/**
* @brief Disable LIN mode
- * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
* LIN feature is supported by the USARTx instance.
* @rmtoll CR2 LINEN LL_USART_DisableLIN
* @param USARTx USART Instance
@@ -1431,13 +1432,13 @@ __STATIC_INLINE void LL_USART_DisableLIN(USART_TypeDef *USARTx)
/**
* @brief Indicate if LIN mode is enabled
- * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
* LIN feature is supported by the USARTx instance.
* @rmtoll CR2 LINEN LL_USART_IsEnabledLIN
* @param USARTx USART Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_USART_IsEnabledLIN(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_IsEnabledLIN(const USART_TypeDef *USARTx)
{
return (READ_BIT(USARTx->CR2, USART_CR2_LINEN) == (USART_CR2_LINEN));
}
@@ -1492,7 +1493,7 @@ __STATIC_INLINE void LL_USART_ConfigAsyncMode(USART_TypeDef *USARTx)
* - IREN bit in the USART_CR3 register,
* - HDSEL bit in the USART_CR3 register.
* This function also sets the USART in Synchronous mode.
- * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not
* Synchronous mode is supported by the USARTx instance.
* @note Call of this function is equivalent to following function call sequence :
* - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
@@ -1530,7 +1531,7 @@ __STATIC_INLINE void LL_USART_ConfigSyncMode(USART_TypeDef *USARTx)
* - IREN bit in the USART_CR3 register,
* - HDSEL bit in the USART_CR3 register.
* This function also set the UART/USART in LIN mode.
- * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
* LIN feature is supported by the USARTx instance.
* @note Call of this function is equivalent to following function call sequence :
* - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
@@ -1570,7 +1571,7 @@ __STATIC_INLINE void LL_USART_ConfigLINMode(USART_TypeDef *USARTx)
* - SCEN bit in the USART_CR3 register,
* - IREN bit in the USART_CR3 register,
* This function also sets the UART/USART in Half Duplex mode.
- * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
* Half-Duplex mode is supported by the USARTx instance.
* @note Call of this function is equivalent to following function call sequence :
* - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
@@ -1609,7 +1610,7 @@ __STATIC_INLINE void LL_USART_ConfigHalfDuplexMode(USART_TypeDef *USARTx)
* This function also configures Stop bits to 1.5 bits and
* sets the USART in Smartcard mode (SCEN bit).
* Clock Output is also enabled (CLKEN).
- * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
* Smartcard feature is supported by the USARTx instance.
* @note Call of this function is equivalent to following function call sequence :
* - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
@@ -1651,7 +1652,7 @@ __STATIC_INLINE void LL_USART_ConfigSmartcardMode(USART_TypeDef *USARTx)
* - SCEN bit in the USART_CR3 register,
* - HDSEL bit in the USART_CR3 register.
* This function also sets the UART/USART in IRDA mode (IREN bit).
- * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
* IrDA feature is supported by the USARTx instance.
* @note Call of this function is equivalent to following function call sequence :
* - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
@@ -1733,7 +1734,7 @@ __STATIC_INLINE void LL_USART_ConfigMultiProcessMode(USART_TypeDef *USARTx)
* @param USARTx USART Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_PE(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_PE(const USART_TypeDef *USARTx)
{
return (READ_BIT(USARTx->SR, USART_SR_PE) == (USART_SR_PE));
}
@@ -1744,7 +1745,7 @@ __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_PE(USART_TypeDef *USARTx)
* @param USARTx USART Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_FE(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_FE(const USART_TypeDef *USARTx)
{
return (READ_BIT(USARTx->SR, USART_SR_FE) == (USART_SR_FE));
}
@@ -1755,7 +1756,7 @@ __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_FE(USART_TypeDef *USARTx)
* @param USARTx USART Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_NE(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_NE(const USART_TypeDef *USARTx)
{
return (READ_BIT(USARTx->SR, USART_SR_NE) == (USART_SR_NE));
}
@@ -1766,7 +1767,7 @@ __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_NE(USART_TypeDef *USARTx)
* @param USARTx USART Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ORE(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ORE(const USART_TypeDef *USARTx)
{
return (READ_BIT(USARTx->SR, USART_SR_ORE) == (USART_SR_ORE));
}
@@ -1777,7 +1778,7 @@ __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ORE(USART_TypeDef *USARTx)
* @param USARTx USART Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_IDLE(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_IDLE(const USART_TypeDef *USARTx)
{
return (READ_BIT(USARTx->SR, USART_SR_IDLE) == (USART_SR_IDLE));
}
@@ -1788,7 +1789,7 @@ __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_IDLE(USART_TypeDef *USARTx)
* @param USARTx USART Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RXNE(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RXNE(const USART_TypeDef *USARTx)
{
return (READ_BIT(USARTx->SR, USART_SR_RXNE) == (USART_SR_RXNE));
}
@@ -1799,7 +1800,7 @@ __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RXNE(USART_TypeDef *USARTx)
* @param USARTx USART Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TC(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TC(const USART_TypeDef *USARTx)
{
return (READ_BIT(USARTx->SR, USART_SR_TC) == (USART_SR_TC));
}
@@ -1810,33 +1811,33 @@ __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TC(USART_TypeDef *USARTx)
* @param USARTx USART Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TXE(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TXE(const USART_TypeDef *USARTx)
{
return (READ_BIT(USARTx->SR, USART_SR_TXE) == (USART_SR_TXE));
}
/**
* @brief Check if the USART LIN Break Detection Flag is set or not
- * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
* LIN feature is supported by the USARTx instance.
* @rmtoll SR LBD LL_USART_IsActiveFlag_LBD
* @param USARTx USART Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_LBD(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_LBD(const USART_TypeDef *USARTx)
{
return (READ_BIT(USARTx->SR, USART_SR_LBD) == (USART_SR_LBD));
}
/**
* @brief Check if the USART CTS Flag is set or not
- * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
* Hardware Flow control feature is supported by the USARTx instance.
* @rmtoll SR CTS LL_USART_IsActiveFlag_nCTS
* @param USARTx USART Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_nCTS(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_nCTS(const USART_TypeDef *USARTx)
{
return (READ_BIT(USARTx->SR, USART_SR_CTS) == (USART_SR_CTS));
}
@@ -1847,7 +1848,7 @@ __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_nCTS(USART_TypeDef *USARTx)
* @param USARTx USART Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_SBK(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_SBK(const USART_TypeDef *USARTx)
{
return (READ_BIT(USARTx->CR1, USART_CR1_SBK) == (USART_CR1_SBK));
}
@@ -1858,7 +1859,7 @@ __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_SBK(USART_TypeDef *USARTx)
* @param USARTx USART Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RWU(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RWU(const USART_TypeDef *USARTx)
{
return (READ_BIT(USARTx->CR1, USART_CR1_RWU) == (USART_CR1_RWU));
}
@@ -1982,7 +1983,7 @@ __STATIC_INLINE void LL_USART_ClearFlag_RXNE(USART_TypeDef *USARTx)
/**
* @brief Clear LIN Break Detection Flag
- * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
* LIN feature is supported by the USARTx instance.
* @rmtoll SR LBD LL_USART_ClearFlag_LBD
* @param USARTx USART Instance
@@ -1995,7 +1996,7 @@ __STATIC_INLINE void LL_USART_ClearFlag_LBD(USART_TypeDef *USARTx)
/**
* @brief Clear CTS Interrupt Flag
- * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
* Hardware Flow control feature is supported by the USARTx instance.
* @rmtoll SR CTS LL_USART_ClearFlag_nCTS
* @param USARTx USART Instance
@@ -2022,7 +2023,7 @@ __STATIC_INLINE void LL_USART_ClearFlag_nCTS(USART_TypeDef *USARTx)
*/
__STATIC_INLINE void LL_USART_EnableIT_IDLE(USART_TypeDef *USARTx)
{
- SET_BIT(USARTx->CR1, USART_CR1_IDLEIE);
+ ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_IDLEIE);
}
/**
@@ -2033,7 +2034,7 @@ __STATIC_INLINE void LL_USART_EnableIT_IDLE(USART_TypeDef *USARTx)
*/
__STATIC_INLINE void LL_USART_EnableIT_RXNE(USART_TypeDef *USARTx)
{
- SET_BIT(USARTx->CR1, USART_CR1_RXNEIE);
+ ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_RXNEIE);
}
/**
@@ -2044,7 +2045,7 @@ __STATIC_INLINE void LL_USART_EnableIT_RXNE(USART_TypeDef *USARTx)
*/
__STATIC_INLINE void LL_USART_EnableIT_TC(USART_TypeDef *USARTx)
{
- SET_BIT(USARTx->CR1, USART_CR1_TCIE);
+ ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_TCIE);
}
/**
@@ -2055,7 +2056,7 @@ __STATIC_INLINE void LL_USART_EnableIT_TC(USART_TypeDef *USARTx)
*/
__STATIC_INLINE void LL_USART_EnableIT_TXE(USART_TypeDef *USARTx)
{
- SET_BIT(USARTx->CR1, USART_CR1_TXEIE);
+ ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_TXEIE);
}
/**
@@ -2066,12 +2067,12 @@ __STATIC_INLINE void LL_USART_EnableIT_TXE(USART_TypeDef *USARTx)
*/
__STATIC_INLINE void LL_USART_EnableIT_PE(USART_TypeDef *USARTx)
{
- SET_BIT(USARTx->CR1, USART_CR1_PEIE);
+ ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_PEIE);
}
/**
* @brief Enable LIN Break Detection Interrupt
- * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
* LIN feature is supported by the USARTx instance.
* @rmtoll CR2 LBDIE LL_USART_EnableIT_LBD
* @param USARTx USART Instance
@@ -2094,12 +2095,12 @@ __STATIC_INLINE void LL_USART_EnableIT_LBD(USART_TypeDef *USARTx)
*/
__STATIC_INLINE void LL_USART_EnableIT_ERROR(USART_TypeDef *USARTx)
{
- SET_BIT(USARTx->CR3, USART_CR3_EIE);
+ ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_EIE);
}
/**
* @brief Enable CTS Interrupt
- * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
* Hardware Flow control feature is supported by the USARTx instance.
* @rmtoll CR3 CTSIE LL_USART_EnableIT_CTS
* @param USARTx USART Instance
@@ -2107,7 +2108,7 @@ __STATIC_INLINE void LL_USART_EnableIT_ERROR(USART_TypeDef *USARTx)
*/
__STATIC_INLINE void LL_USART_EnableIT_CTS(USART_TypeDef *USARTx)
{
- SET_BIT(USARTx->CR3, USART_CR3_CTSIE);
+ ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_CTSIE);
}
/**
@@ -2118,7 +2119,7 @@ __STATIC_INLINE void LL_USART_EnableIT_CTS(USART_TypeDef *USARTx)
*/
__STATIC_INLINE void LL_USART_DisableIT_IDLE(USART_TypeDef *USARTx)
{
- CLEAR_BIT(USARTx->CR1, USART_CR1_IDLEIE);
+ ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_IDLEIE);
}
/**
@@ -2129,7 +2130,7 @@ __STATIC_INLINE void LL_USART_DisableIT_IDLE(USART_TypeDef *USARTx)
*/
__STATIC_INLINE void LL_USART_DisableIT_RXNE(USART_TypeDef *USARTx)
{
- CLEAR_BIT(USARTx->CR1, USART_CR1_RXNEIE);
+ ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_RXNEIE);
}
/**
@@ -2140,7 +2141,7 @@ __STATIC_INLINE void LL_USART_DisableIT_RXNE(USART_TypeDef *USARTx)
*/
__STATIC_INLINE void LL_USART_DisableIT_TC(USART_TypeDef *USARTx)
{
- CLEAR_BIT(USARTx->CR1, USART_CR1_TCIE);
+ ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_TCIE);
}
/**
@@ -2151,7 +2152,7 @@ __STATIC_INLINE void LL_USART_DisableIT_TC(USART_TypeDef *USARTx)
*/
__STATIC_INLINE void LL_USART_DisableIT_TXE(USART_TypeDef *USARTx)
{
- CLEAR_BIT(USARTx->CR1, USART_CR1_TXEIE);
+ ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_TXEIE);
}
/**
@@ -2162,12 +2163,12 @@ __STATIC_INLINE void LL_USART_DisableIT_TXE(USART_TypeDef *USARTx)
*/
__STATIC_INLINE void LL_USART_DisableIT_PE(USART_TypeDef *USARTx)
{
- CLEAR_BIT(USARTx->CR1, USART_CR1_PEIE);
+ ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_PEIE);
}
/**
* @brief Disable LIN Break Detection Interrupt
- * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
* LIN feature is supported by the USARTx instance.
* @rmtoll CR2 LBDIE LL_USART_DisableIT_LBD
* @param USARTx USART Instance
@@ -2190,12 +2191,12 @@ __STATIC_INLINE void LL_USART_DisableIT_LBD(USART_TypeDef *USARTx)
*/
__STATIC_INLINE void LL_USART_DisableIT_ERROR(USART_TypeDef *USARTx)
{
- CLEAR_BIT(USARTx->CR3, USART_CR3_EIE);
+ ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_EIE);
}
/**
* @brief Disable CTS Interrupt
- * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
* Hardware Flow control feature is supported by the USARTx instance.
* @rmtoll CR3 CTSIE LL_USART_DisableIT_CTS
* @param USARTx USART Instance
@@ -2203,7 +2204,7 @@ __STATIC_INLINE void LL_USART_DisableIT_ERROR(USART_TypeDef *USARTx)
*/
__STATIC_INLINE void LL_USART_DisableIT_CTS(USART_TypeDef *USARTx)
{
- CLEAR_BIT(USARTx->CR3, USART_CR3_CTSIE);
+ ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_CTSIE);
}
/**
@@ -2212,7 +2213,7 @@ __STATIC_INLINE void LL_USART_DisableIT_CTS(USART_TypeDef *USARTx)
* @param USARTx USART Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_IDLE(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_IDLE(const USART_TypeDef *USARTx)
{
return (READ_BIT(USARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE));
}
@@ -2223,7 +2224,7 @@ __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_IDLE(USART_TypeDef *USARTx)
* @param USARTx USART Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RXNE(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RXNE(const USART_TypeDef *USARTx)
{
return (READ_BIT(USARTx->CR1, USART_CR1_RXNEIE) == (USART_CR1_RXNEIE));
}
@@ -2234,7 +2235,7 @@ __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RXNE(USART_TypeDef *USARTx)
* @param USARTx USART Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TC(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TC(const USART_TypeDef *USARTx)
{
return (READ_BIT(USARTx->CR1, USART_CR1_TCIE) == (USART_CR1_TCIE));
}
@@ -2245,7 +2246,7 @@ __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TC(USART_TypeDef *USARTx)
* @param USARTx USART Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TXE(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TXE(const USART_TypeDef *USARTx)
{
return (READ_BIT(USARTx->CR1, USART_CR1_TXEIE) == (USART_CR1_TXEIE));
}
@@ -2256,20 +2257,20 @@ __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TXE(USART_TypeDef *USARTx)
* @param USARTx USART Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_PE(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_PE(const USART_TypeDef *USARTx)
{
return (READ_BIT(USARTx->CR1, USART_CR1_PEIE) == (USART_CR1_PEIE));
}
/**
* @brief Check if the USART LIN Break Detection Interrupt is enabled or disabled.
- * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
* LIN feature is supported by the USARTx instance.
* @rmtoll CR2 LBDIE LL_USART_IsEnabledIT_LBD
* @param USARTx USART Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_LBD(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_LBD(const USART_TypeDef *USARTx)
{
return (READ_BIT(USARTx->CR2, USART_CR2_LBDIE) == (USART_CR2_LBDIE));
}
@@ -2280,20 +2281,20 @@ __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_LBD(USART_TypeDef *USARTx)
* @param USARTx USART Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_ERROR(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_ERROR(const USART_TypeDef *USARTx)
{
return (READ_BIT(USARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE));
}
/**
* @brief Check if the USART CTS Interrupt is enabled or disabled.
- * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
* Hardware Flow control feature is supported by the USARTx instance.
* @rmtoll CR3 CTSIE LL_USART_IsEnabledIT_CTS
* @param USARTx USART Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_CTS(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_CTS(const USART_TypeDef *USARTx)
{
return (READ_BIT(USARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE));
}
@@ -2314,7 +2315,7 @@ __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_CTS(USART_TypeDef *USARTx)
*/
__STATIC_INLINE void LL_USART_EnableDMAReq_RX(USART_TypeDef *USARTx)
{
- SET_BIT(USARTx->CR3, USART_CR3_DMAR);
+ ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_DMAR);
}
/**
@@ -2325,7 +2326,7 @@ __STATIC_INLINE void LL_USART_EnableDMAReq_RX(USART_TypeDef *USARTx)
*/
__STATIC_INLINE void LL_USART_DisableDMAReq_RX(USART_TypeDef *USARTx)
{
- CLEAR_BIT(USARTx->CR3, USART_CR3_DMAR);
+ ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_DMAR);
}
/**
@@ -2334,7 +2335,7 @@ __STATIC_INLINE void LL_USART_DisableDMAReq_RX(USART_TypeDef *USARTx)
* @param USARTx USART Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_RX(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_RX(const USART_TypeDef *USARTx)
{
return (READ_BIT(USARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR));
}
@@ -2347,7 +2348,7 @@ __STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_RX(USART_TypeDef *USARTx)
*/
__STATIC_INLINE void LL_USART_EnableDMAReq_TX(USART_TypeDef *USARTx)
{
- SET_BIT(USARTx->CR3, USART_CR3_DMAT);
+ ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_DMAT);
}
/**
@@ -2358,7 +2359,7 @@ __STATIC_INLINE void LL_USART_EnableDMAReq_TX(USART_TypeDef *USARTx)
*/
__STATIC_INLINE void LL_USART_DisableDMAReq_TX(USART_TypeDef *USARTx)
{
- CLEAR_BIT(USARTx->CR3, USART_CR3_DMAT);
+ ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_DMAT);
}
/**
@@ -2367,7 +2368,7 @@ __STATIC_INLINE void LL_USART_DisableDMAReq_TX(USART_TypeDef *USARTx)
* @param USARTx USART Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_TX(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_TX(const USART_TypeDef *USARTx)
{
return (READ_BIT(USARTx->CR3, USART_CR3_DMAT) == (USART_CR3_DMAT));
}
@@ -2379,10 +2380,10 @@ __STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_TX(USART_TypeDef *USARTx)
* @param USARTx USART Instance
* @retval Address of data register
*/
-__STATIC_INLINE uint32_t LL_USART_DMA_GetRegAddr(USART_TypeDef *USARTx)
+__STATIC_INLINE uint32_t LL_USART_DMA_GetRegAddr(const USART_TypeDef *USARTx)
{
/* return address of DR register */
- return ((uint32_t) & (USARTx->DR));
+ return ((uint32_t) &(USARTx->DR));
}
/**
@@ -2399,7 +2400,7 @@ __STATIC_INLINE uint32_t LL_USART_DMA_GetRegAddr(USART_TypeDef *USARTx)
* @param USARTx USART Instance
* @retval Value between Min_Data=0x00 and Max_Data=0xFF
*/
-__STATIC_INLINE uint8_t LL_USART_ReceiveData8(USART_TypeDef *USARTx)
+__STATIC_INLINE uint8_t LL_USART_ReceiveData8(const USART_TypeDef *USARTx)
{
return (uint8_t)(READ_BIT(USARTx->DR, USART_DR_DR));
}
@@ -2410,7 +2411,7 @@ __STATIC_INLINE uint8_t LL_USART_ReceiveData8(USART_TypeDef *USARTx)
* @param USARTx USART Instance
* @retval Value between Min_Data=0x00 and Max_Data=0x1FF
*/
-__STATIC_INLINE uint16_t LL_USART_ReceiveData9(USART_TypeDef *USARTx)
+__STATIC_INLINE uint16_t LL_USART_ReceiveData9(const USART_TypeDef *USARTx)
{
return (uint16_t)(READ_BIT(USARTx->DR, USART_DR_DR));
}
@@ -2488,10 +2489,10 @@ __STATIC_INLINE void LL_USART_RequestExitMuteMode(USART_TypeDef *USARTx)
/** @defgroup USART_LL_EF_Init Initialization and de-initialization functions
* @{
*/
-ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx);
-ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct);
+ErrorStatus LL_USART_DeInit(const USART_TypeDef *USARTx);
+ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, const LL_USART_InitTypeDef *USART_InitStruct);
void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct);
-ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct);
+ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, const LL_USART_ClockInitTypeDef *USART_ClockInitStruct);
void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct);
/**
* @}
@@ -2518,4 +2519,3 @@ void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitS
#endif /* __STM32L1xx_LL_USART_H */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_usb.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_usb.h
index c817492a34..c8badc54c1 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_usb.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_usb.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -23,7 +22,7 @@
#ifdef __cplusplus
extern "C" {
-#endif
+#endif /* __cplusplus */
/* Includes ------------------------------------------------------------------*/
#include "stm32l1xx_hal_def.h"
@@ -43,15 +42,14 @@ extern "C" {
* @brief USB Mode definition
*/
-
-
typedef enum
{
- USB_DEVICE_MODE = 0
+ USB_DEVICE_MODE = 0
} USB_ModeTypeDef;
+
/**
- * @brief USB Initialization Structure definition
+ * @brief USB Instance Initialization Structure definition
*/
typedef struct
{
@@ -70,69 +68,63 @@ typedef struct
uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */
- uint32_t low_power_enable; /*!< Enable or disable Low Power mode */
+ uint32_t low_power_enable; /*!< Enable or disable the low Power Mode. */
- uint32_t lpm_enable; /*!< Enable or disable Battery charging. */
+ uint32_t lpm_enable; /*!< Enable or disable Link Power Management. */
uint32_t battery_charging_enable; /*!< Enable or disable Battery charging. */
} USB_CfgTypeDef;
typedef struct
{
- uint8_t num; /*!< Endpoint number
- This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
+ uint8_t num; /*!< Endpoint number
+ This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
- uint8_t is_in; /*!< Endpoint direction
- This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
+ uint8_t is_in; /*!< Endpoint direction
+ This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
- uint8_t is_stall; /*!< Endpoint stall condition
- This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
+ uint8_t is_stall; /*!< Endpoint stall condition
+ This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
- uint8_t type; /*!< Endpoint type
- This parameter can be any value of @ref USB_EP_Type */
+ uint8_t type; /*!< Endpoint type
+ This parameter can be any value of @ref USB_LL_EP_Type */
- uint8_t data_pid_start; /*!< Initial data PID
- This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
+ uint8_t data_pid_start; /*!< Initial data PID
+ This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
- uint16_t pmaadress; /*!< PMA Address
- This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
- uint16_t pmaaddr0; /*!< PMA Address0
- This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
+ uint16_t pmaadress; /*!< PMA Address
+ This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
- uint16_t pmaaddr1; /*!< PMA Address1
- This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
+ uint16_t pmaaddr0; /*!< PMA Address0
+ This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
- uint8_t doublebuffer; /*!< Double buffer enable
- This parameter can be 0 or 1 */
+ uint16_t pmaaddr1; /*!< PMA Address1
+ This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
- uint16_t tx_fifo_num; /*!< This parameter is not required by USB Device FS peripheral, it is used
- only by USB OTG FS peripheral
- This parameter is added to ensure compatibility across USB peripherals */
+ uint8_t doublebuffer; /*!< Double buffer enable
+ This parameter can be 0 or 1 */
- uint32_t maxpacket; /*!< Endpoint Max packet size
- This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */
- uint8_t *xfer_buff; /*!< Pointer to transfer buffer */
+ uint32_t maxpacket; /*!< Endpoint Max packet size
+ This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */
- uint32_t xfer_len; /*!< Current transfer length */
+ uint8_t *xfer_buff; /*!< Pointer to transfer buffer */
- uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */
+ uint32_t xfer_len; /*!< Current transfer length */
- uint32_t xfer_len_db; /*!< double buffer transfer length used with bulk double buffer in */
+ uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */
- uint8_t xfer_fill_db; /*!< double buffer Need to Fill new buffer used with bulk_in */
+ uint32_t xfer_len_db; /*!< double buffer transfer length used with bulk double buffer in */
+ uint8_t xfer_fill_db; /*!< double buffer Need to Fill new buffer used with bulk_in */
} USB_EPTypeDef;
-
/* Exported constants --------------------------------------------------------*/
/** @defgroup PCD_Exported_Constants PCD Exported Constants
* @{
*/
-
-
/** @defgroup USB_LL_EP0_MPS USB Low Layer EP0 MPS
* @{
*/
@@ -164,10 +156,21 @@ typedef struct
* @}
*/
+
#define BTABLE_ADDRESS 0x000U
#define PMA_ACCESS 2U
+#ifndef USB_EP_RX_STRX
+#define USB_EP_RX_STRX (0x3U << 12)
+#endif /* USB_EP_RX_STRX */
+
#define EP_ADDR_MSK 0x7U
+
+#ifndef USE_USB_DOUBLE_BUFFER
+#define USE_USB_DOUBLE_BUFFER 1U
+#endif /* USE_USB_DOUBLE_BUFFER */
+
+
/**
* @}
*/
@@ -189,26 +192,30 @@ HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx);
HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx);
HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode);
+HAL_StatusTypeDef USB_FlushRxFifo(USB_TypeDef const *USBx);
+HAL_StatusTypeDef USB_FlushTxFifo(USB_TypeDef const *USBx, uint32_t num);
+
#if defined (HAL_PCD_MODULE_ENABLED)
HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep);
HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep);
HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep);
HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep);
HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep);
-#endif
+HAL_StatusTypeDef USB_EPStopXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep);
+#endif /* defined (HAL_PCD_MODULE_ENABLED) */
HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address);
HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx);
HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx);
HAL_StatusTypeDef USB_StopDevice(USB_TypeDef *USBx);
-uint32_t USB_ReadInterrupts(USB_TypeDef *USBx);
+uint32_t USB_ReadInterrupts(USB_TypeDef const *USBx);
HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_TypeDef *USBx);
HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_TypeDef *USBx);
-void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf,
+void USB_WritePMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf,
uint16_t wPMABufAddr, uint16_t wNBytes);
-void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf,
+void USB_ReadPMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf,
uint16_t wPMABufAddr, uint16_t wNBytes);
/**
@@ -230,9 +237,7 @@ void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf,
#ifdef __cplusplus
}
-#endif
+#endif /* __cplusplus */
#endif /* STM32L1xx_LL_USB_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_utils.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_utils.h
index 89d6b5329d..16d3a9c95e 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_utils.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_utils.h
@@ -18,13 +18,12 @@
******************************************************************************
* @attention
*
- *
© Copyright(c) 2017 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -269,5 +268,3 @@ ErrorStatus LL_SetFlashLatency(uint32_t Frequency);
#endif
#endif /* __STM32L1xx_LL_UTILS_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_wwdg.h b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_wwdg.h
index bdfb142f09..be15dd0096 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_wwdg.h
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_wwdg.h
@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
- *
© Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
+ * Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -315,5 +314,3 @@ __STATIC_INLINE uint32_t LL_WWDG_IsEnabledIT_EWKUP(WWDG_TypeDef *WWDGx)
#endif
#endif /* STM32L1xx_LL_WWDG_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/License.md b/system/Drivers/STM32L1xx_HAL_Driver/License.md
index f8a538516f..479c4f6826 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/License.md
+++ b/system/Drivers/STM32L1xx_HAL_Driver/License.md
@@ -1,3 +1,27 @@
-# Copyright (c) 2017 STMicroelectronics
+Copyright 2017 STMicroelectronics.
+All rights reserved.
-This software component is licensed by STMicroelectronics under the **BSD 3-Clause** license. You may not use this file except in compliance with this license. You may obtain a copy of the license [here](https://opensource.org/licenses/BSD-3-Clause).
\ No newline at end of file
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+1. Redistributions of source code must retain the above copyright notice, this
+list of conditions and the following disclaimer.
+
+2. Redistributions in binary form must reproduce the above copyright notice,
+this list of conditions and the following disclaimer in the documentation and/or
+other materials provided with the distribution.
+
+3. Neither the name of the copyright holder nor the names of its contributors
+may be used to endorse or promote products derived from this software without
+specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/README.md b/system/Drivers/STM32L1xx_HAL_Driver/README.md
index 5e02bc7539..396cce1123 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/README.md
+++ b/system/Drivers/STM32L1xx_HAL_Driver/README.md
@@ -21,30 +21,13 @@ Two models of publication are proposed for the STM32Cube embedded software:
This **stm32l1xx_hal_driver** MCU component repo is one element of the STM32CubeL1 MCU embedded software package, providing the **HAL-LL Drivers** part.
-## License
-
-Copyright (c) 2017 STMicroelectronics.
-
-This software component is licensed by STMicroelectronics under BSD 3-Clause license. You may not use this file except in compliance with the License.
-You may obtain a copy of the License [here](https://opensource.org/licenses/BSD-3-Clause).
-
## Release note
Details about the content of this release are available in the release note [here](https://htmlpreview.github.io/?https://github.com/STMicroelectronics/stm32l1xx_hal_driver/blob/master/Release_Notes.html).
## Compatibility information
-In this table, you can find the successive versions of this HAL-LL Driver component, in line with the corresponding versions of the full MCU package:
-
-It is **crucial** that you use a consistent set of versions for the CMSIS Core - CMSIS Device - HAL, as mentioned in this table.
-
-HAL Driver L1 | CMSIS Device L1 | CMSIS Core | Was delivered in the full MCU package
-------------- | --------------- | ---------- | -------------------------------------
-Tag v1.4.0 | Tag v2.3.0 | Tag v5.4.0_cm3 | Tag v1.9.0 (and following, if any, till next HAL tag)
-Tag v1.4.1 | Tag v2.3.1 | Tag v5.4.0_cm3 | Tag v1.10.0 (and following, if any, till next HAL tag)
-Tag v1.4.2 | Tag v2.3.1 | Tag v5.4.0_cm3 | Tag v1.10.1 (and following, if any, till next HAL tag)
-Tag v1.4.3 | Tag v2.3.1 | Tag v5.4.0_cm3 | Tag v1.10.2 (and following, if any, till next HAL tag)
-Tag v1.4.4 | Tag v2.3.2 | Tag v5.4.0_cm3 | Tag v1.10.3 (and following, if any, till next HAL tag)
+It is **crucial** that you use a consistent set of versions for the CMSIS Core - CMSIS Device - HAL, as mentioned in [this](https://htmlpreview.github.io/?https://github.com/STMicroelectronics/STM32CubeL1/blob/master/Release_Notes.html) release note.
The full **STM32CubeL1** MCU package is available [here](https://github.com/STMicroelectronics/STM32CubeL1).
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Release_Notes.html b/system/Drivers/STM32L1xx_HAL_Driver/Release_Notes.html
index ff7924e26a..7df10bc193 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Release_Notes.html
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Release_Notes.html
@@ -5,36 +5,27 @@
Release Notes for STM32L1xx HAL Drivers
-
-
+
+
-
-
-Release Notes for STM32L1xx HAL Drivers Release Notes for STM32L1xx HAL Drivers Copyright © 2017 STMicroelectronics
-
-
-
-
License
-
Licensed by ST under BSD 3-Clause license (the "License"). You may not use this package except in compliance with the License. You may obtain a copy of the License at:
-
https://opensource.org/licenses/BSD-3-Clause
Purpose
The STM32Cube HAL and LL, an STM32 abstraction layer embedded software, ensure maximized portability across STM32 portfolio.
The portable APIs layer provides a generic, multi instanced and simple set of APIs to interact with the upper layer (application, libraries and stacks). It is composed of native and extended APIs set. It is directly built around a generic architecture and allows the build-upon layers, like the middleware layer, to implement its functions without knowing in-depth the used STM32 device. This improves the library code reusability and guarantees an easy portability on other devices and STM32 families.
@@ -46,20 +37,154 @@
Purpose
Full features coverage of all the supported peripherals
-
-Update History
+
+
Update History
+
+
V1.4.4 / 21-May-2021
+
+
Main Changes
+
Maintenance release
+
+Patch release to to fix known defects and enhancements implementation.
+
+
Contents
+
+HAL Generic update
+
Update HAL TimeBase TIM template for more robustness
Update Hal_Init_Tick() API to propoerty store the priority when using the non-default time base.
@@ -157,12 +282,10 @@ Contents
Update I2C_MemoryTransmit_TXE_BTF() API to increment EventCount.
Update to use the right macro to clear I2C ADDR flag inside I2C_Slave_ADDR() API as it’s indicated in the reference manual.
-Update HAL_I2C_EV_IRQHandler() and I2C_MasterTransmit_BTF() APIs to fix an issue where the transfer of the first few bytes to an I2C memory fails.
HAL/LL ADC update
Update HAL_ADC_Stop_DMA() API to check if DMA state is Busy before calling HAL_DMA_Abort() API to avoid DMA internal error.
-Update HAL ADC driver to add include of the LL ADC driver.
Update timeout mechanism to avoid false timeout detection in case of preemption.
Update LL_ADC_REG_Init() API to avoid enabling continuous mode and discontinuous mode simultaneously.
Contents
V1.4.3 / 22-October-2020
-
Main Changes
-
Maintenance release
+
Main Changes
+
Maintenance release
General updates to fix known defect.
-
Contents
+
Contents
HAL/LL I2C driver
@@ -206,12 +329,12 @@ Contents
V1.4.2 / 28-August-2020
-
Main Changes
-
Maintenance release
+
Main Changes
+
Maintenance release
Patch release to fix issue in I2C HAL driver
-
Contents
+
Contents
HAL I2C driver
@@ -226,13 +349,13 @@ Contents
V1.4.1 / 24-June-2020
-
Main Changes
-
Maintenance release
+
Main Changes
+
Maintenance release
Add new HAL EXTI driver
General updates to fix known defects and enhancements implementation
-
Contents
+
Contents
HAL driver
@@ -424,26 +547,26 @@ Contents
V1.4.0 / 05-April-2019
-
Main Changes
-
Maintenance release
+
Main Changes
+
Maintenance release
Add support of HAL callback registration feature
Add several enhancements implementation
Fix known defects to be aligned with others STM32 series
-
Contents
+
Contents
HAL/LL generic
-Add support of HAL callback registration feature
The feature disabled by default is available for the following HAL drivers:
+Add support of HAL callback registration feature
+The feature disabled by default is available for the following HAL drivers:
ADC, COMP, DAC, I2C, I2S, IRDA, LPTIM, PCD, RNG, RTC, SMARTCARD, SMBUS, SPI, TIM, TSC, UART, USART and WWDG
-The feature may be enabled individually per HAL PPP driver by setting the corresponding definition USE_HAL_PPP_REGISTER_CALLBACKS to 1U in stm32l1xx_hal_conf.h project configuration file (template file stm32l1xx_hal_conf_template.h available from Drivers/STM32L1xx_HAL_Driver/Inc)
The feature may be enabled individually per HAL PPP driver by setting the corresponding definition USE_HAL_PPP_REGISTER_CALLBACKS to 1U in stm32l1xx_hal_conf.h project configuration file (template file stm32l1xx_hal_conf_template.h available from Drivers/STM32L1xx_HAL_Driver/Inc)
Once enabled, the user application may resort to HAL_PPP_RegisterCallback() to register specific callback function(s) and unregister it(them) with HAL_PPP_UnRegisterCallback().
Update HAL/LL Driver compliancy with MISRA C 2012 rules
stm32l1xx_hal_def.h
+stm32l1xx_hal_def.h
Update file to avoid compiler warnings from __packed definitions
Update UNUSED() macro to fix compilation warning with g++ compiler
@@ -707,9 +830,9 @@ Contents
V1.3.1 / 25-August-2017
-
Main Changes
+
Main Changes
Patch release
-
Contents
+
Contents
HAL/LL generic
@@ -722,9 +845,9 @@ Contents
V1.3.0 / 21-April-2017
-
Main Changes
-
Maintenance release
-
Contents
+
Main Changes
+
Maintenance release
+
Contents
HAL/LL generic
@@ -795,8 +918,8 @@ Contents
V1.2.0 / 01-July-2016
-
Main Changes
-
Maintenance release
+
Main Changes
+
Maintenance release
First official release supporting the Low Level drivers for the STM32L1xx family:
@@ -805,7 +928,7 @@ Maintenance release
Low Layer drivers APIs are implemented as static inline function in new Inc/stm32l1xx_ll_ppp.h files for PPP peripherals, there is no configuration file and each stm32l1xx_ll_ppp.h file must be included in user code.
-
Contents
+
Contents
Generic updates
@@ -900,9 +1023,9 @@ Contents
V1.1.3 / 04-March-2016
-
Main Changes
-
Maintenance release
-
Contents
+
Main Changes
+
Maintenance release
+
Contents
Generic update
@@ -951,9 +1074,9 @@ Contents
V1.1.2 / 09-October-2015
-
Main Changes
-
Maintenance release
-
Contents
+
Main Changes
+
Maintenance release
+
Contents
ADC
@@ -1037,13 +1160,13 @@ Contents
V1.1.1 / 31-March-2015
-
Main Changes
-
Maintenance release
+
Main Changes
+
Maintenance release
Include path changes for compilation under Unix environment
Update drivers to be C++ compliant
-
Contents
+
Contents
CORTEX
@@ -1109,12 +1232,12 @@ Contents
V1.1.0 / 06-February-2015
-
Main Changes
-
Maintenance release
+
Main Changes
+
Maintenance release
Add support of new STM32L1 eXtended devices - STM32l151xDX, STM32l152xDX & STM32l62xDX
-
Contents
+
Contents
HAL generic
@@ -1135,10 +1258,12 @@ Contents
V1.0.0 / 05-September-2014
-
Main Changes
+
+
Main Changes
First official release
-
+
+
For complete documentation on STM32 Microcontrollers , visit: http://www.st.com/STM32
diff --git a/system/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c b/system/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c
index 9d0f706e0b..42dee46e7b 100644
--- a/system/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c
+++ b/system/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c
@@ -5,6 +5,17 @@
* @brief HAL module driver.
* This is the common part of the HAL initialization
*
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
@verbatim
==============================================================================
##### How to use this driver #####
@@ -19,17 +30,6 @@
@endverbatim
******************************************************************************
- * @attention
- *
- * © Copyright (c) 2017 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2017 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2017 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2017 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2017 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2017 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2017 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2017 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2016 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2016 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2017 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2018 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2017 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2017 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2017 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2017 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2016 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2016 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2016 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2016 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2017 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2017 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2016 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2017 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2017 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2016 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2016 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2017 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2017 STMicroelectronics.
- * All rights reserved. © Copyright(c) 2017 STMicroelectronics.
- * All rights reserved. © Copyright(c) 2017 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2017 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2017 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2018 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2016 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2016 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2016 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2016 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2016 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2017 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2016 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2016 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2016 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2017 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2017 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2017 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2016 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2017 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2017 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2016 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2017 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2016 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2017 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2017 STMicroelectronics.
- * All rights reserved. © Copyright(c) 2017 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2017 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2018 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2016 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2016 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2016 STMicroelectronics.
- * All rights reserved. © Copyright (c) 2016 STMicroelectronics.
- * All rights reserved. © Copyright(c) 2017 STMicroelectronics.
- * All rights reserved. 
+