diff --git a/system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f412cx.h b/system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f412cx.h index 32b87399b1..95178f413b 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f412cx.h +++ b/system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f412cx.h @@ -8497,6 +8497,18 @@ typedef struct #define RCC_CFGR_MCO1PRE_1 (0x2UL << RCC_CFGR_MCO1PRE_Pos) /*!< 0x02000000 */ #define RCC_CFGR_MCO1PRE_2 (0x4UL << RCC_CFGR_MCO1PRE_Pos) /*!< 0x04000000 */ +#define RCC_CFGR_MCO2PRE_Pos (27U) +#define RCC_CFGR_MCO2PRE_Msk (0x7UL << RCC_CFGR_MCO2PRE_Pos) /*!< 0x38000000 */ +#define RCC_CFGR_MCO2PRE RCC_CFGR_MCO2PRE_Msk +#define RCC_CFGR_MCO2PRE_0 (0x1UL << RCC_CFGR_MCO2PRE_Pos) /*!< 0x08000000 */ +#define RCC_CFGR_MCO2PRE_1 (0x2UL << RCC_CFGR_MCO2PRE_Pos) /*!< 0x10000000 */ +#define RCC_CFGR_MCO2PRE_2 (0x4UL << RCC_CFGR_MCO2PRE_Pos) /*!< 0x20000000 */ + +#define RCC_CFGR_MCO2_Pos (30U) +#define RCC_CFGR_MCO2_Msk (0x3UL << RCC_CFGR_MCO2_Pos) /*!< 0xC0000000 */ +#define RCC_CFGR_MCO2 RCC_CFGR_MCO2_Msk +#define RCC_CFGR_MCO2_0 (0x1UL << RCC_CFGR_MCO2_Pos) /*!< 0x40000000 */ +#define RCC_CFGR_MCO2_1 (0x2UL << RCC_CFGR_MCO2_Pos) /*!< 0x80000000 */ /******************** Bit definition for RCC_CIR register *******************/ #define RCC_CIR_LSIRDYF_Pos (0U) diff --git a/system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h b/system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h index a5376a110c..5bbe68ae4f 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h +++ b/system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h @@ -105,11 +105,11 @@ extern "C" { #endif /* USE_HAL_DRIVER */ /** - * @brief CMSIS version number V2.6.9 + * @brief CMSIS version number V2.6.10 */ #define __STM32F4xx_CMSIS_VERSION_MAIN (0x02U) /*!< [31:24] main version */ #define __STM32F4xx_CMSIS_VERSION_SUB1 (0x06U) /*!< [23:16] sub1 version */ -#define __STM32F4xx_CMSIS_VERSION_SUB2 (0x09U) /*!< [15:8] sub2 version */ +#define __STM32F4xx_CMSIS_VERSION_SUB2 (0x0AU) /*!< [15:8] sub2 version */ #define __STM32F4xx_CMSIS_VERSION_RC (0x00U) /*!< [7:0] release candidate */ #define __STM32F4xx_CMSIS_VERSION ((__STM32F4xx_CMSIS_VERSION_MAIN << 24)\ |(__STM32F4xx_CMSIS_VERSION_SUB1 << 16)\ diff --git a/system/Drivers/CMSIS/Device/ST/STM32F4xx/Release_Notes.html b/system/Drivers/CMSIS/Device/ST/STM32F4xx/Release_Notes.html index 2aee833786..3001f94100 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32F4xx/Release_Notes.html +++ b/system/Drivers/CMSIS/Device/ST/STM32F4xx/Release_Notes.html @@ -33,10 +33,19 @@

Purpose

Update History

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Main Changes

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  • Add MCO2PRE[2:0] and MCO2[1:0] bits definition within CMSIS files.
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  • Added new atomic register access macros in stm32f4xx.h file.
  • Update FLASH_SCALE2_LATENCY4_FREQ value to 120MHz instead of 12MHz.
  • Update the GCC startup file to be aligned to IAR/Keil IDE.
  • @@ -50,7 +59,7 @@

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    • All source files: update disclaimer to add reference to the new license agreement.
    • Correct ETH bits definitions to be in line with naming used in the STM32F4 reference manual documents.
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      • Add missing definition FLASH_CR_ERRIE to the CMSIS header file.
      • Remove unsupported “GPIOF_BASE” and “GPIOG_BASE” defines from STM32F412Vx device.
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        • system_stm32f4xx.c:
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            • All header files
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                    • CRYP:
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                        • Remove Date and Version from all header files
                        • USB_OTG register clean up: remove duplicated bits definitions
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                          • General updates in header files to support LL drivers
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                              • Add support of STM32F413xx and STM32F423xx devices
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                                  • stm32f412rx.h, stm32f412vx.h and stm32f412zx.h files:
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                                      • Add support of STM32F412Cx, STM32F412Rx, STM32F412Vx and STM32F412Zx devices
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                                          • Header file for all STM32 devices
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                                              • system_stm32f4xx.c file
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                                                  • “stm32f469xx.h”, “stm32f479xx.h”
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                                                      • Add support of STM32F469xx and STM32F479xx devices
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                                                          • “stm32f405xx.h”, “stm32f407xx.h”, “stm32f415xx.h” and “stm32f417xx.h”
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                                                              • Header file for all STM32 devices
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                                                                  • Add support of STM32F446xx devices
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                                                                      • stm32f4xx.h
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                                                                          • Add support of STM32F411xExx devices
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                                                                              • Update based on STM32Cube specification
                                                                              • This version and later has to be used only with STM32CubeF4 based development
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                                                                                • Add support of STM32F401xExx devices
                                                                                • Update startup files “startup_stm32f401xx.s” for EWARM, MDK-ARM, TrueSTUDIO and Ride toolchains: Add SPI4 interrupt handler entry in the vector table
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                                                                                  • system_stm32f4xx.c : Update FMC SDRAM configuration (RBURST mode activation)
                                                                                  • Update startup files “startup_stm32f427_437xx.s” and “startup_stm32f429_439xx.s” for TrueSTUDIO and Ride toolchains and maintain the old name of startup files for legacy purpose
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                                                                                    • Add support of STM32F429/439xx and STM32F401xCxx devices
                                                                                    • Update definition of STM32F427/437xx devices : extension of the features to include system clock up to 180MHz, dual bank Flash, reduced STOP Mode current, SAI, PCROP, SDRAM and DMA2D
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                                                                                      • Official release for STM32F427x/437x devices.
                                                                                      • stm32f4xx.h @@ -734,7 +743,7 @@

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                                                                                        • All source files: license disclaimer text update and add link to the License file on ST Internet.
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                                                                                          • First official release for STM32F40x/41x devices
                                                                                          • Add startup file for TASKING toolchain
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                                                                                            • Official version (V1.0.0) Release Candidate2 for STM32F40x/41x devices
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                                                                                              • Official version (V1.0.0) Release Candidate1 for STM32F4xx devices
                                                                                              diff --git a/system/Drivers/CMSIS/Device/ST/STM32YYxx_CMSIS_version.md b/system/Drivers/CMSIS/Device/ST/STM32YYxx_CMSIS_version.md index fbaf08eefd..c269147bb6 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32YYxx_CMSIS_version.md +++ b/system/Drivers/CMSIS/Device/ST/STM32YYxx_CMSIS_version.md @@ -5,7 +5,7 @@ * STM32F1: 4.3.4 * STM32F2: 2.2.6 * STM32F3: 2.3.8 - * STM32F4: 2.6.9 + * STM32F4: 2.6.10 * STM32F7: 1.2.9 * STM32G0: 1.4.4 * STM32G4: 1.2.3