Testbenches

[akaeba]

Hi Stephan,

really great work with this MSP430 implementation!
On the repo I found only one simple testbench. Are there more advacned TBs also available?

Thanks in advance.

Best Regards,
Andreas

[stnolting]

Hey Andreas,
sorry for the delay...

Unfortunately, there is no more sophisticated testbench available yet.

I was thinking about a self-checking TB to verify the correct execution of instructions, but I dropped that for now.
Are there features you would suggest for a more complex TB?

[hackfin]

Are there features you would suggest for a more complex TB?

A very powerful feature would be in circuit emulation through a test access port (TAP). Needs only a little enhancement for exception handling, then you can do all regress testing through the TAP, either in simulation or on real HW using JTAG. I've done the dance a few months ago to check a RISC-V for 'compliance', you'll find some examples in here: https://github.com/hackfin/MaSoCist/tree/opensource/test/virtual_riscv. It's GHDL/Docker powered and runs the 'CI' way on every commit. Likewise, there's a virtual_neo430 test, but it only checks for the UART console output.