From bfe080ddee154c63d3f6a75797f9698da0928837 Mon Sep 17 00:00:00 2001
From: dnorthcote <42978178+dnorthcote@users.noreply.github.com>
Date: Fri, 19 May 2023 16:02:36 +0100
Subject: [PATCH 01/23] Update README.md for ZCU208 and ZCU216
---
README.md | 13 +++++++++----
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/README.md b/README.md
index 8f22f2e..ad8799f 100644
--- a/README.md
+++ b/README.md
@@ -14,11 +14,16 @@ To begin installing the Jupyter Notebooks on your system, click-on one of the op
* [Notebook Installation](#notebook-installation)
## RFSoC Setup
-This repository is currently only compatible with [RFSoC-PYNQ v2.7](https://github.com/Xilinx/PYNQ/releases). Follow the steps below to setup the RFSoC platform for installing the companion Jupyter Notebooks.
+This repository is currently only compatible with [RFSoC-PYNQ v2.7](https://github.com/Xilinx/PYNQ/releases) and greater. Follow the steps below to setup the RFSoC platform for installing the companion Jupyter Notebooks.
-1. Currently, there are only 3 compatible RFSoC platforms. These are the [RFSoC4x2](http://rfsoc-pynq.io/), [ZCU111](https://www.xilinx.com/products/boards-and-kits/zcu111.html), and [RFSoC2x2](http://rfsoc-pynq.io/).
+1. Currently, there are 5 compatible RFSoC platforms. These are listed as follows:
+* [ZCU208](https://www.xilinx.com/products/boards-and-kits/zcu208.html),
+* [ZCU216](https://www.xilinx.com/products/boards-and-kits/zcu216.html),
+* [ZCU111](https://www.xilinx.com/products/boards-and-kits/zcu111.html),
+* [RFSoC4x2](http://rfsoc-pynq.io/),
+* [RFSoC2x2](http://rfsoc-pynq.io/).
-2. Install PYNQ v2.7 onto an SD card and plug it in to your RFSoC platform.
+2. Install PYNQ v2.7 or greater onto an SD card and plug it in to your RFSoC platform.
3. Your RFSoC platform requires internet access to install the companion Jupyter Notebooks. Follow the instructions [here](https://pynq.readthedocs.io/en/v3.0.0/getting_started/network_connection.html?highlight=internet) that assist with internet access.
@@ -42,7 +47,7 @@ The companion Jupyter Notebooks can be installed on a computer or RFSoC platform
3. Install the RFSoC Book notebooks through PIP by executing the following command in the terminal.
```sh
-pip install https://github.com/strath-sdr/RFSoC-Book/archive/v1.0.1.tar.gz
+pip install https://github.com/strath-sdr/RFSoC-Book/archive/v1.1.0.tar.gz
```
4. Run the following command in the Jupyter terminal window to install the notebooks and dependencies.
From b442435bb7f5c9b4adb559d4ef15aa0a25f75e6a Mon Sep 17 00:00:00 2001
From: dnorthcote <42978178+dnorthcote@users.noreply.github.com>
Date: Fri, 19 May 2023 16:02:59 +0100
Subject: [PATCH 02/23] Modify __main__.py to include ZCU2xx and notebook
checks
---
rfsoc_book/__main__.py | 29 ++++++++++++++++++-----------
1 file changed, 18 insertions(+), 11 deletions(-)
diff --git a/rfsoc_book/__main__.py b/rfsoc_book/__main__.py
index 8ed337c..1ccae66 100644
--- a/rfsoc_book/__main__.py
+++ b/rfsoc_book/__main__.py
@@ -7,7 +7,7 @@
# variables
package_name = 'rfsoc_book'
-board_list = ['ZCU111', 'RFSoC2x2', 'RFSoC4x2']
+board_list = ['ZCU111', 'RFSoC2x2', 'RFSoC4x2', 'ZCU208', 'ZCU216']
# dialogue
help_dialogue = ''.join(['\r\nThe rfsoc_book module accepts one of the following arguments:', '\r\n',
@@ -43,6 +43,7 @@ def install_notebooks():
f.write(dst)
def install_packages():
+ board = os.environ['BOARD']
dst = os.path.abspath(os.path.join(os.path.realpath(__file__), '..', 'package_list.txt'))
if not os.path.exists(dst):
raise RuntimeError(error_dialogue)
@@ -50,11 +51,14 @@ def install_packages():
package_list = f.readlines()
for package in package_list:
package_name, package_src = package.split(' ')
- print(''.join(['***** Installing ', package_name, ' *****\r\n']))
- status = subprocess.check_call(["pip3", "install", package_src])
- print('\r\n') # Pip is not playing nice
- if status != 0:
- raise RuntimeError(''.join(['Package ', package_src, ' failed to install.\r\n']))
+ if package_name == 'rfsoc_sam' and board == 'ZCU216':
+ pass
+ else:
+ print(''.join(['***** Installing ', package_name, ' *****\r\n']))
+ status = subprocess.check_call(["pip3", "install", package_src])
+ print('\r\n') # Pip is not playing nice
+ if status != 0:
+ raise RuntimeError(''.join(['Package ', package_src, ' failed to install.\r\n']))
def uninstall_notebooks():
print('\r\n***** Uninstalling Notebooks *****\r\n')
@@ -98,11 +102,14 @@ def unpackage_notebooks():
for file in os.listdir(notebookdir):
file_split = file.split('_')
if board in file_split:
- file_split.remove(board)
- file_name = '_'.join(file_split)
- src = os.path.join(notebookdir, file)
- dst = os.path.join(notebookdir, '..', file_name)
- shutil.copy(src, dst)
+ unpack_board = board
+ else:
+ unpack_board = 'RFSoC4x2'
+ file_split.remove(unpack_board)
+ file_name = '_'.join(file_split)
+ src = os.path.join(notebookdir, file)
+ dst = os.path.join(notebookdir, '..', file_name)
+ shutil.copy(src, dst)
def clean_notebooks():
print('\r\n***** Cleaning Notebooks *****\r\n')
From e8b6850151b9cde6c8eb5a8dfdb4e4789e17fc90 Mon Sep 17 00:00:00 2001
From: dnorthcote <42978178+dnorthcote@users.noreply.github.com>
Date: Fri, 19 May 2023 16:04:12 +0100
Subject: [PATCH 03/23] Update Set A for New Boards
Remove RFSoC2x2 notebook (which will now default to the RFSoC4x2 notebook)
Add ZCU216 notebook as this and ZCU111 require QPSK overlay
---
...pynb => ZCU216_03_pynq_introduction.ipynb} | 30 +++++++++++--------
1 file changed, 17 insertions(+), 13 deletions(-)
rename rfsoc_book/notebooks/notebook_A/boards/{RFSoC2x2_03_pynq_introduction.ipynb => ZCU216_03_pynq_introduction.ipynb} (89%)
diff --git a/rfsoc_book/notebooks/notebook_A/boards/RFSoC2x2_03_pynq_introduction.ipynb b/rfsoc_book/notebooks/notebook_A/boards/ZCU216_03_pynq_introduction.ipynb
similarity index 89%
rename from rfsoc_book/notebooks/notebook_A/boards/RFSoC2x2_03_pynq_introduction.ipynb
rename to rfsoc_book/notebooks/notebook_A/boards/ZCU216_03_pynq_introduction.ipynb
index 21d24a9..5091f33 100644
--- a/rfsoc_book/notebooks/notebook_A/boards/RFSoC2x2_03_pynq_introduction.ipynb
+++ b/rfsoc_book/notebooks/notebook_A/boards/ZCU216_03_pynq_introduction.ipynb
@@ -1,6 +1,7 @@
{
"cells": [
{
+ "attachments": {},
"cell_type": "markdown",
"metadata": {},
"source": [
@@ -8,6 +9,7 @@
]
},
{
+ "attachments": {},
"cell_type": "markdown",
"metadata": {},
"source": [
@@ -34,12 +36,13 @@
"* [5. Conclusion](#conclusion)\n",
"\n",
"## Revision\n",
- "* **v1.0** | 23/01/23 | *First Revision*\n",
+ "* **v1.0** | 19/05/23 | *First Revision*\n",
"\n",
"---\n"
]
},
{
+ "attachments": {},
"cell_type": "markdown",
"metadata": {},
"source": [
@@ -56,6 +59,7 @@
]
},
{
+ "attachments": {},
"cell_type": "markdown",
"metadata": {},
"source": [
@@ -80,6 +84,7 @@
]
},
{
+ "attachments": {},
"cell_type": "markdown",
"metadata": {},
"source": [
@@ -97,6 +102,7 @@
]
},
{
+ "attachments": {},
"cell_type": "markdown",
"metadata": {},
"source": [
@@ -116,6 +122,7 @@
]
},
{
+ "attachments": {},
"cell_type": "markdown",
"metadata": {},
"source": [
@@ -135,13 +142,14 @@
]
},
{
+ "attachments": {},
"cell_type": "markdown",
"metadata": {},
"source": [
"## 4. PYNQ Overlays \n",
"PYNQ overlays [2] extend a Zynq based Processing System (PS) design into the Field Programmable Gate Array (FPGA) logic fabric. Overlays can accelerate a user's software application by exploiting the parallel processing of FPGA architectures. A software engineer is able to use an overlay with ease as FPGA accelerators are abstracted using software libraries (such as those described in the previous section).\n",
"\n",
- "The PYNQ distribution for your RFSoC development platform has a default base overlay design. We can load it using the code cell below."
+ "At the time of writing, the PYNQ distribution for your ZCU216 development platform does not have a default base overlay design. To explore an overlay, we will use the [RFSoC-QPSK](https://github.com/strath-sdr/rfsoc_qpsk/) demonstrator design from StrathSDR. We can load it using the code cell below."
]
},
{
@@ -150,16 +158,17 @@
"metadata": {},
"outputs": [],
"source": [
- "from pynq.overlays.base import BaseOverlay\n",
+ "from rfsoc_qpsk.qpsk_overlay import QpskOverlay\n",
"\n",
- "base = BaseOverlay('base.bit')"
+ "ol = QpskOverlay()"
]
},
{
+ "attachments": {},
"cell_type": "markdown",
"metadata": {},
"source": [
- "The BaseOverlay class inherits from the PYNQ Overlay class, which provides parsing tools, descriptors, and bitstream management functionality. The BaseOverlay FPGA design consists of many useful accelerators and interfaces that we can communicate with from JupyterLabs. For example, we can query the status of the RFSoC's Data Converters (RF DCs)."
+ "The QpskOverlay class inherits from the PYNQ Overlay class, which provides parsing tools, descriptors, and bitstream management functionality. The QpskOverlay FPGA design consists of many useful accelerators and interfaces that we can communicate with from JupyterLabs. For example, we can query the status of the RFSoC's Data Converters (RF DCs)."
]
},
{
@@ -168,17 +177,11 @@
"metadata": {},
"outputs": [],
"source": [
- "base.radio.rfdc.IPStatus"
- ]
- },
- {
- "cell_type": "markdown",
- "metadata": {},
- "source": [
- "The base overlay design has a huge amount of content that you can access directly from your RFSoC board. From the Jupyter Workspace, navigate to the folder named base. You will be able to see other folders named board, pmod, and rfdc that contain Jupyter Notebooks for you to explore. To get you started, here is a notebook on [buttons, leds, and switches](../../base/board/buttons_leds_switches.ipynb) that you can run. When you are ready, return here to conclude this notebook and move on to the next one."
+ "ol.usp_rf_data_converter_0.IPStatus"
]
},
{
+ "attachments": {},
"cell_type": "markdown",
"metadata": {},
"source": [
@@ -189,6 +192,7 @@
]
},
{
+ "attachments": {},
"cell_type": "markdown",
"metadata": {},
"source": [
From 73d589dfdffe05b5825c02cbd6734b581997532b Mon Sep 17 00:00:00 2001
From: dnorthcote <42978178+dnorthcote@users.noreply.github.com>
Date: Fri, 19 May 2023 16:07:38 +0100
Subject: [PATCH 04/23] Update Set C for New Boards
Add message that ZCU216 is not support by RFSoC-SAM
Still to add ZCU208 notebook for 01_exploring_the_spectrum.ipynb
---
.../02_rfsoc_spectrum_analyser.ipynb | 11 ++++++++
.../RFSoC4x2_01_exploring_the_spectrum.ipynb | 28 +++++++++++++++++++
2 files changed, 39 insertions(+)
diff --git a/rfsoc_book/notebooks/notebook_C/02_rfsoc_spectrum_analyser.ipynb b/rfsoc_book/notebooks/notebook_C/02_rfsoc_spectrum_analyser.ipynb
index 0577339..715f95b 100644
--- a/rfsoc_book/notebooks/notebook_C/02_rfsoc_spectrum_analyser.ipynb
+++ b/rfsoc_book/notebooks/notebook_C/02_rfsoc_spectrum_analyser.ipynb
@@ -1,6 +1,7 @@
{
"cells": [
{
+ "attachments": {},
"cell_type": "markdown",
"metadata": {
"extensions": {
@@ -23,6 +24,7 @@
]
},
{
+ "attachments": {},
"cell_type": "markdown",
"metadata": {
"extensions": {
@@ -47,6 +49,8 @@
" Note:\n",
" \n",
" This Jupyter notebook uses hardware features of the Zynq UltraScale+ RFSoC device. Therefore, the notebook cells will only execute successfully on an RFSoC platform.\n",
+ " \n",
+ " This Jupyter notebook is not compatible with the ZCU216 development board as the RFSoC-SAM module does not support this platform.\n",
"
\n",
+ " Note:\n",
+ " \n",
+ " This Jupyter notebook uses hardware features of the Zynq UltraScale+ RFSoC device. Therefore, the notebook cells will only execute successfully on an RFSoC platform.\n",
+ "
\n",
+ "
\n",
+ "\n",
+ "# Notebook Set G\n",
+ "\n",
+ "---\n",
+ "\n",
+ "## 01 - RFSoC Radio System\n",
+ "This demonstrator presents a Binary Phase Shift Keying (BPSK) and Quadrature Phase Shift Keying (QPSK) radio system design for the Zynq UltraScale+ RFSoC [1]. The BPSK/QPSK radio implements a full transmitter and receiver design including frame based transmission of BPSK and QPSK modulated data, receiver synchronisation, frame synchronisation, and payload extraction. This demonstration employs the RFSoC RF Data Converters (RF DCs) to support the transmission and reception of BPSK and QPSK waveforms. This system is based on the work described in [2].\n",
+ "\n",
+ "## Table of Contents\n",
+ "* [1. Introduction](#introduction)\n",
+ " * [1.1. Hardware Setup](#hardware-setup)\n",
+ " * [1.2. Software Setup](#software-setup)\n",
+ "* [2. RFSoC Python Libraries](#rfsoc-python-libraries)\n",
+ " * [2.1. The xrfclk Module](#the-xrfclk-module)\n",
+ " * [2.2. The xrfdc Module](#the-xrfdc-module)\n",
+ "* [3. The RFSoC Radio System](#the-rfsoc-radio-system)\n",
+ " * [3.1. Controlling the System](#controlling-the-system)\n",
+ "* [4. Frame Generation](#frame-generation)\n",
+ "* [5. Conclusion](#conclusion)\n",
+ "\n",
+ "## References\n",
+ "* [1] - [Xilinx, Inc, \"USP RF Data Converter: LogiCORE IP Product Guide\", PG269, v2.4, November 2020](https://www.xilinx.com/support/documentation/ip_documentation/usp_rf_data_converter/v2_4/pg269-rf-data-converter.pdf)\n",
+ "* [2] - [Stewart, R. W., Barlee, K. W., Atkinson, D. S. W., & Crockett, L. H. (2015). Software Defined Radio using MATLAB & Simulink and the RTL-SDR. (1 ed.)](https://www.desktopsdr.com/)\n",
+ "* [3] - [Xilinx, Inc, \"PYNQ SD Build Packages on GitHub: xrfdc Python Module](https://github.com/Xilinx/PYNQ/tree/image_v2.7/sdbuild/packages/xrfdc)\n",
+ "* [4] - [Xilinx, Inc, \"PYNQ SD Build Packages on GitHub: xrfclk Python Module](https://github.com/Xilinx/PYNQ/tree/image_v2.7/sdbuild/packages/xrfclk)\n",
+ "* [5] - [Xilinx, Inc, \"EmbeddedSW Repository on GitHub: xrfdc](https://github.com/Xilinx/embeddedsw/tree/release-2020.2/XilinxProcessorIPLib/drivers/rfdc)\n",
+ "\n",
+ "## Revision\n",
+ "* **v1.0** | 19/05/23 | *First Revision*\n",
+ "\n",
+ "---\n"
+ ]
+ },
+ {
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## 1. Introduction \n",
+ "This notebook describes the hardware setup necessary to operate the radio design. We will also explore related RFSoC Python libraries, which include the xrfdc and xrfclk modules. An overview of the BPSK and QPSK transceiver design for the RFSoC will be presented. Lastly, the frame generation for transferring data between the RF DAC and RF ADC will be discussed.\n",
+ "\n",
+ "Let us begin by setting up the hardware as given below."
+ ]
+ },
+ {
+ "cell_type": "markdown",
+ "metadata": {
+ "tags": []
+ },
+ "source": [
+ "### 1.1. Hardware Setup \n",
+ "The ZCU208 development boards require the SMA and clock connections to be setup correctly. We will begin with connecting the clocks from the Clk104 card to the development board. Then connect the ADC and DAC to the HW_XM_655 card's RF baluns.\n",
+ "\n",
+ "Before you begin with the setup below, ensure that the Clk104 card and HW_XM_655 card is securely connected to the ZCU208 development board.\n",
+ "\n",
+ "#### 1.1.1. CLK104 Setup \n",
+ "On the Clk104 board, make the following connections as shown in [Figure 1](#fig-1).\n",
+ "\n",
+ "\n",
+ "\n",
+ "\n",
+ "Ensure that the clocks above are connected as follows:\n",
+ "* DAC_229_CLK to DAC_RFCLK_B (P & N).\n",
+ "* ADC_225_CLK to ADC_RFCLK_B (P & N).\n",
+ "\n",
+ "If you do not make the correct connection, the demonstration will not operate correctly.\n",
+ "\n",
+ "#### 1.1.2. ADC Setup \n",
+ "The next step is to connect the ADC to the RF Balun on the HW_XM_655 card. See the image below in [Figure 2](#fig-2) on how to make this connection successfully. You will need the rectangle connector that contains a strip of wires with SMAs attached to make this connection. This connector is known as the Carlisle SMA 8 Cable Assemblies in the kit contents page supplied with your development board.\n",
+ "\n",
+ "\n",
+ "\n",
+ "\n",
+ "Ensure that the ADC connections are setup as follows:\n",
+ "* JHC5 P0_255 to J18\n",
+ "* JHC5 N01_255 to J16\n",
+ "\n",
+ "This step is a little difficult as there are many small wires. Please take your time setting up the ADC to prevent errors.\n",
+ "\n",
+ "#### 1.1.3. DAC Setup \n",
+ "The DAC is connected to the RF Balun on the HW_XM_655 card using the connections shown in [Figure 3](#fig-3) below.\n",
+ "\n",
+ "\n",
+ "\n",
+ "\n",
+ "Ensure that the DAC connections are setup as follows:\n",
+ "* JHC3 P0_230 to J39\n",
+ "* JHC3 N0_230 to J37\n",
+ "\n",
+ "Take your time with this step to prevent errors during the demonstration.\n",
+ "\n",
+ "#### 1.1.4. Loopback Setup \n",
+ "We can now connect each RF Balun together using an SMA cable contained in your ZCU208 box. The image below in [Figure 4](#fig-4) shows how to make this connection.\n",
+ "\n",
+ "\n",
+ "\n",
+ " \n",
+ "The connection shown in the image above is the following:\n",
+ "* J17 (LFB_ADC_02) to J38 (LFB_DAC_01)\n",
+ "\n",
+ "Your ZCU208 development board is now ready for the demonstration."
+ ]
+ },
+ {
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "
\n",
+ "Caution:\n",
+ " In this demonstration, we generate signals using the RFSoC development board. Your device should be setup in loopback mode. You should understand that the RFSoC platform can also transmit RF signals wirelessly. Remember that unlicensed wireless transmission of RF signals may be illegal in your geographical location. Radio signals may also interfere with nearby devices, such as pacemakers and emergency radio equipment. Note that it is also illegal to intercept and decode particular RF signals. If you are unsure, please seek professional support.\n",
+ "
\n",
+ "\n",
+ "### 1.2. Software Setup \n",
+ "Begin by programming the FPGA bitstream and initialising the PYNQ overlay design. To do this, we need to import the `rfsoc_radio` package."
+ ]
+ },
+ {
+ "cell_type": "code",
+ "execution_count": null,
+ "metadata": {},
+ "outputs": [],
+ "source": [
+ "from rfsoc_radio.overlay import RadioOverlay"
+ ]
+ },
+ {
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "Now we can simply initialise the overlay by downloading the bitstream and executing the drivers. Upon running the cell below, a synchronisation test will be performed to ensure your system is ready for the demonstration. If these tests fail, reset the notebook and double-check the loopback connection. Then, simply run the notebook again."
+ ]
+ },
+ {
+ "cell_type": "code",
+ "execution_count": null,
+ "metadata": {},
+ "outputs": [],
+ "source": [
+ "ol = RadioOverlay(run_test=True, debug_test=False)"
+ ]
+ },
+ {
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## 2. RFSoC Python Libraries \n",
+ "There are two RFSoC Python libraries used in this radio design. These are the xrfclk and xrfdc modules. The xrfclk module is responsible for configuring the RFSoC's LMK and LMX clock devices. The xrfdc module contains a set of bindings for controlling the RFSoC's Data Converters (RF DCs). Each are discussed further below. \n",
+ "\n",
+ "### 2.1. The xrfclk Module \n",
+ "The xrfclk module can be imported as shown in the following code cell. There is one particular method that will be useful when developing your own RFSoC designs. This method is:\n",
+ "```python\n",
+ "xrfclk.set_ref_clks(lmk_freq, lmx_freq)\n",
+ "```\n",
+ "We can query the docstring for this method by running the code cell below."
+ ]
+ },
+ {
+ "cell_type": "code",
+ "execution_count": null,
+ "metadata": {},
+ "outputs": [],
+ "source": [
+ "import xrfclk\n",
+ "\n",
+ "xrfclk.set_ref_clks?"
+ ]
+ },
+ {
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "As we can see, this method accepts a set of frequencies for an LMK and LMX device. These devices are used to derive the RF DC sampling clocks for your RFSoC platform. Each RFSoC platform contains a different set of LMK and LMX devices. Review the table below to determine the LMK device that your RFSoC platform contains.\n",
+ "\n",
+ "\n",
+ "
\n",
+ " Table 1: LMK and LMX devices on each supported RFSoC platform.\n",
+ " \n",
+ "
\n",
+ " Note:\n",
+ " \n",
+ " This Jupyter notebook uses hardware features of the Zynq UltraScale+ RFSoC device. Therefore, the notebook cells will only execute successfully on an RFSoC platform.\n",
+ "
\n",
+ "
\n",
+ "\n",
+ "# Notebook Set G\n",
+ "\n",
+ "---\n",
+ "\n",
+ "## 01 - RFSoC Radio System\n",
+ "This demonstrator presents a Binary Phase Shift Keying (BPSK) and Quadrature Phase Shift Keying (QPSK) radio system design for the Zynq UltraScale+ RFSoC [1]. The BPSK/QPSK radio implements a full transmitter and receiver design including frame based transmission of BPSK and QPSK modulated data, receiver synchronisation, frame synchronisation, and payload extraction. This demonstration employs the RFSoC RF Data Converters (RF DCs) to support the transmission and reception of BPSK and QPSK waveforms. This system is based on the work described in [2].\n",
+ "\n",
+ "## Table of Contents\n",
+ "* [1. Introduction](#introduction)\n",
+ " * [1.1. Hardware Setup](#hardware-setup)\n",
+ " * [1.2. Software Setup](#software-setup)\n",
+ "* [2. RFSoC Python Libraries](#rfsoc-python-libraries)\n",
+ " * [2.1. The xrfclk Module](#the-xrfclk-module)\n",
+ " * [2.2. The xrfdc Module](#the-xrfdc-module)\n",
+ "* [3. The RFSoC Radio System](#the-rfsoc-radio-system)\n",
+ " * [3.1. Controlling the System](#controlling-the-system)\n",
+ "* [4. Frame Generation](#frame-generation)\n",
+ "* [5. Conclusion](#conclusion)\n",
+ "\n",
+ "## References\n",
+ "* [1] - [Xilinx, Inc, \"USP RF Data Converter: LogiCORE IP Product Guide\", PG269, v2.4, November 2020](https://www.xilinx.com/support/documentation/ip_documentation/usp_rf_data_converter/v2_4/pg269-rf-data-converter.pdf)\n",
+ "* [2] - [Stewart, R. W., Barlee, K. W., Atkinson, D. S. W., & Crockett, L. H. (2015). Software Defined Radio using MATLAB & Simulink and the RTL-SDR. (1 ed.)](https://www.desktopsdr.com/)\n",
+ "* [3] - [Xilinx, Inc, \"PYNQ SD Build Packages on GitHub: xrfdc Python Module](https://github.com/Xilinx/PYNQ/tree/image_v2.7/sdbuild/packages/xrfdc)\n",
+ "* [4] - [Xilinx, Inc, \"PYNQ SD Build Packages on GitHub: xrfclk Python Module](https://github.com/Xilinx/PYNQ/tree/image_v2.7/sdbuild/packages/xrfclk)\n",
+ "* [5] - [Xilinx, Inc, \"EmbeddedSW Repository on GitHub: xrfdc](https://github.com/Xilinx/embeddedsw/tree/release-2020.2/XilinxProcessorIPLib/drivers/rfdc)\n",
+ "\n",
+ "## Revision\n",
+ "* **v1.0** | 19/05/23 | *First Revision*\n",
+ "\n",
+ "---\n"
+ ]
+ },
+ {
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## 1. Introduction \n",
+ "This notebook describes the hardware setup necessary to operate the radio design. We will also explore related RFSoC Python libraries, which include the xrfdc and xrfclk modules. An overview of the BPSK and QPSK transceiver design for the RFSoC will be presented. Lastly, the frame generation for transferring data between the RF DAC and RF ADC will be discussed.\n",
+ "\n",
+ "Let us begin by setting up the hardware as given below."
+ ]
+ },
+ {
+ "cell_type": "markdown",
+ "metadata": {
+ "tags": []
+ },
+ "source": [
+ "### 1.1. Hardware Setup \n",
+ "The ZCU216 development boards require the SMA and clock connections to be setup correctly. We will begin with connecting the clocks from the Clk104 card to the development board. Then connect the ADC and DAC to the HW_XM_655 card's RF baluns.\n",
+ "\n",
+ "Before you begin with the setup below, ensure that the Clk104 card and HW_XM_655 card is securely connected to the ZCU216 development board.\n",
+ "\n",
+ "#### 1.1.1. CLK104 Setup \n",
+ "On the Clk104 board, make the following connections as shown in [Figure 1](#fig-1).\n",
+ "\n",
+ "\n",
+ "\n",
+ "\n",
+ "Ensure that the clocks above are connected as follows:\n",
+ "* DAC_229_CLK to DAC_RFCLK_B (P & N).\n",
+ "* ADC_225_CLK to ADC_RFCLK_B (P & N).\n",
+ "\n",
+ "If you do not make the correct connection, the demonstration will not operate correctly.\n",
+ "\n",
+ "#### 1.1.2. ADC Setup \n",
+ "The next step is to connect the ADC to the RF Balun on the HW_XM_655 card. See the image below in [Figure 2](#fig-2) on how to make this connection successfully. You will need the rectangle connector that contains a strip of wires with SMAs attached to make this connection. This connector is known as the Carlisle SMA 8 Cable Assemblies in the kit contents page supplied with your development board.\n",
+ "\n",
+ "\n",
+ "\n",
+ "\n",
+ "Ensure that the ADC connections are setup as follows:\n",
+ "* JHC5 P0_255 to J18\n",
+ "* JHC5 N01_255 to J16\n",
+ "\n",
+ "This step is a little difficult as there are many small wires. Please take your time setting up the ADC to prevent errors.\n",
+ "\n",
+ "#### 1.1.3. DAC Setup \n",
+ "The DAC is connected to the RF Balun on the HW_XM_655 card using the connections shown in [Figure 3](#fig-3) below.\n",
+ "\n",
+ "\n",
+ "\n",
+ "\n",
+ "Ensure that the DAC connections are setup as follows:\n",
+ "* JHC3 P0_230 to J39\n",
+ "* JHC3 N0_230 to J37\n",
+ "\n",
+ "Take your time with this step to prevent errors during the demonstration.\n",
+ "\n",
+ "#### 1.1.4. Loopback Setup \n",
+ "We can now connect each RF Balun together using an SMA cable contained in your ZCU216 box. The image below in [Figure 4](#fig-4) shows how to make this connection.\n",
+ "\n",
+ "\n",
+ "\n",
+ " \n",
+ "The connection shown in the image above is the following:\n",
+ "* J17 (LFB_ADC_02) to J38 (LFB_DAC_01)\n",
+ "\n",
+ "Your ZCU216 development board is now ready for the demonstration."
+ ]
+ },
+ {
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "
\n",
+ "Caution:\n",
+ " In this demonstration, we generate signals using the RFSoC development board. Your device should be setup in loopback mode. You should understand that the RFSoC platform can also transmit RF signals wirelessly. Remember that unlicensed wireless transmission of RF signals may be illegal in your geographical location. Radio signals may also interfere with nearby devices, such as pacemakers and emergency radio equipment. Note that it is also illegal to intercept and decode particular RF signals. If you are unsure, please seek professional support.\n",
+ "
\n",
+ "\n",
+ "### 1.2. Software Setup \n",
+ "Begin by programming the FPGA bitstream and initialising the PYNQ overlay design. To do this, we need to import the `rfsoc_radio` package."
+ ]
+ },
+ {
+ "cell_type": "code",
+ "execution_count": null,
+ "metadata": {},
+ "outputs": [],
+ "source": [
+ "from rfsoc_radio.overlay import RadioOverlay"
+ ]
+ },
+ {
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "Now we can simply initialise the overlay by downloading the bitstream and executing the drivers. Upon running the cell below, a synchronisation test will be performed to ensure your system is ready for the demonstration. If these tests fail, reset the notebook and double-check the loopback connection. Then, simply run the notebook again."
+ ]
+ },
+ {
+ "cell_type": "code",
+ "execution_count": null,
+ "metadata": {},
+ "outputs": [],
+ "source": [
+ "ol = RadioOverlay(run_test=True, debug_test=False)"
+ ]
+ },
+ {
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## 2. RFSoC Python Libraries \n",
+ "There are two RFSoC Python libraries used in this radio design. These are the xrfclk and xrfdc modules. The xrfclk module is responsible for configuring the RFSoC's LMK and LMX clock devices. The xrfdc module contains a set of bindings for controlling the RFSoC's Data Converters (RF DCs). Each are discussed further below. \n",
+ "\n",
+ "### 2.1. The xrfclk Module \n",
+ "The xrfclk module can be imported as shown in the following code cell. There is one particular method that will be useful when developing your own RFSoC designs. This method is:\n",
+ "```python\n",
+ "xrfclk.set_ref_clks(lmk_freq, lmx_freq)\n",
+ "```\n",
+ "We can query the docstring for this method by running the code cell below."
+ ]
+ },
+ {
+ "cell_type": "code",
+ "execution_count": null,
+ "metadata": {},
+ "outputs": [],
+ "source": [
+ "import xrfclk\n",
+ "\n",
+ "xrfclk.set_ref_clks?"
+ ]
+ },
+ {
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "As we can see, this method accepts a set of frequencies for an LMK and LMX device. These devices are used to derive the RF DC sampling clocks for your RFSoC platform. Each RFSoC platform contains a different set of LMK and LMX devices. Review the table below to determine the LMK device that your RFSoC platform contains.\n",
+ "\n",
+ "\n",
+ "
\n",
+ " Table 1: LMK and LMX devices on each supported RFSoC platform.\n",
+ " \n",
+ "