0.3.15

• Implement workaround for std cpuid bug due to LLVM bug (rust-lang/rust#101346, llvm/llvm-project#57550).

  • Our use case is likely not affected, but we implement this just in case.
  • We've confirmed that the uses of inline assembly in this crate are not affected by this LLVM bug.

0.3.14

• Optimize atomic load/store on no-std pre-v6 ARM when portable_atomic_unsafe_assume_single_core cfg is used. (#36)

• Support pre-power8 powerpc64le. powerpc64le's default cpu version is power8, but you can technically compile it for the old cpu using the unsafe -C target-cpu rustc flag.

0.3.13

• Use track_caller when debug assertions are enabled on Rust 1.46+.

• Make powerpc64 128-bit atomics compatible with Miri and ThreadSanitizer on LLVM 15+.

• Document that 128-bit atomics are compatible with Miri and ThreadSanitizer on recent nightly.

0.3.12

• Support atomic CAS on no-std pre-v6 ARM targets (e.g., thumbv4t-none-eabi) under unsafe cfg portable_atomic_unsafe_assume_single_core. (#28)

0.3.11

• Always provide atomic CAS for MSP430 and AVR. (#31)

  This previously required unsafe cfg portable_atomic_unsafe_assume_single_core, but since all MSP430 and AVR are single-core, we can safely provide atomic CAS based on disabling interrupts.

• Support fence and compiler_fence on MSP430. (On MSP430, the standard library's fences are currently unavailable due to LLVM errors.)

• Update safety requirements for unsafe cfg portable_atomic_unsafe_assume_single_core to mention use of privileged instructions to disable interrupts.

• Atomic operations based on disabling interrupts on single-core systems are now considered lock-free.

  The previous behavior was inconsistent because we consider the pre-v6 ARM Linux's atomic operations provided in a similar way by the Linux kernel to be lock-free.

• Respect -Zallow-features.

0.3.10

• Optimize aarch64 128-bit load when the lse target feature is enabled at compile-time. (#20)

0.3.9

• Fix build error on old Miri.

• Documentation improvements.

0.3.8

• Make aarch64 and s390x 128-bit atomics compatible with Miri and ThreadSanitizer.

0.3.7

• Provide stable equivalent of #![feature(strict_provenance_atomic_ptr)]. (#23)

  • AtomicPtr::fetch_ptr_{add,sub}
  • AtomicPtr::fetch_byte_{add,sub}
  • AtomicPtr::fetch_{or,and,xor}

  These APIs are compatible with strict-provenance on cfg(miri). Otherwise, they are compatible with permissive-provenance.
  Once #![feature(strict_provenance_atomic_ptr)] is stabilized, these APIs will be strict-provenance compatible in all cases from the version in which it is stabilized.

• Provide stable equivalent of #![feature(atomic_bool_fetch_not)]. (#24)

  • AtomicBool::fetch_not

• Optimize x86_64 128-bit RMWs. (#22)

• Optimize x86_64 outline-atomics.

• Optimize inline assemblies on ARM and AArch64.

• Revert thumbv6m atomic load/store changes made in 0.3.5. This is because rust-lang/rust#99595 has been reverted, so this is no longer needed.

0.3.6

• Fix build failure due to the existence of the specs directory.
• Documentation improvements.
• Optimize inline assemblies on x86_64, riscv, and msp430.