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Three-Band-Hardware-Digital-Equalizer-with-Biquad-IIR-Filter
Three-Band-Hardware-Digital-Equalizer-with-Biquad-IIR-Filter PublicHardware audio equalizer peripheral for TinyQV RISC-V CPU featuring three-band control (bass/mid/treble) using biquad IIR filters. Processes 16-bit audio with single-cycle latency, memory-mapped in…
Python
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16-bit-Ripple-Carry-Adder-with-layered-testbench-and-layout
16-bit-Ripple-Carry-Adder-with-layered-testbench-and-layout PublicComplete VLSI implementation of 16-bit Ripple Carry Adder with PG logic. Features advanced SystemVerilog testbench, synthesis optimization, and PnR layout (93.71% density). Built using Cadence tool…
SystemVerilog
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tic-tac-toe-hardware-gaming-interface-2023
tic-tac-toe-hardware-gaming-interface-2023 PublicHardware-based Tic Tac Toe game implemented using digital logic circuits with flip-flops, logic gates, and bicolor LEDs. Features anti-cheat mechanisms, automatic win detection, and physical button…
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analog-integrated-circuits_Voltage-Controlled-Oscillator-design
analog-integrated-circuits_Voltage-Controlled-Oscillator-design PublicAnalog IC designing using Cadence Virtuoso. Features LC VCO (855-881MHz) design project with phase noise optimization and Labwork on MOSFET analysis, amplifier topologies, layout design and bandgap…
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