start working on timing and add some missing cycle advancements in SM83

tgsm · tgsm · commit 63cca26b115e · 2020-03-23T16:13:04.000-04:00
blargg's instr_timing test doesn't fail to start the timer anymore, but it does to fail to test the timer. cpu_instrs test #2 (interrupts) passes now, however I'm not sure if I'm ready to believe that.
diff --git a/CMakeLists.txt b/CMakeLists.txt
@@ -19,6 +19,7 @@ set(SOURCES
     src/main.cpp
     src/ppu.cpp
     src/sm83.cpp
+    src/timer.cpp
 )
 
 set(HEADERS
@@ -29,6 +30,7 @@ set(HEADERS
     src/logging.h
     src/ppu.h
     src/sm83.h
+    src/timer.h
     src/types.h
 )
 
diff --git a/src/bus.cpp b/src/bus.cpp
@@ -2,8 +2,8 @@
 #include "bus.h"
 #include "logging.h"
 
-Bus::Bus(BootROM& bootrom, Cartridge& cartridge, PPU& ppu)
-    : bootrom(bootrom), cartridge(cartridge), ppu(ppu) {
+Bus::Bus(BootROM& bootrom, Cartridge& cartridge, PPU& ppu, Timer& timer)
+    : bootrom(bootrom), cartridge(cartridge), ppu(ppu), timer(timer) {
     boot_rom_enabled = true;
     memory = std::array<u8, 0x10000>();
     std::fill(memory.begin(), memory.end(), 0xFF);
@@ -46,7 +46,7 @@ u8 Bus::Read8(u16 addr) {
             LDEBUG("reading 0x%02X from 0x%04X (Cartridge RAM)", memory[addr], addr);
             return memory[addr];
         } else {
-            LWARN("attempted to read from cartridge RAM while it is disabled (from 0x%04X)", addr);
+            // LWARN("attempted to read from cartridge RAM while it is disabled (from 0x%04X)", addr);
             return 0xFF;
         }
     }
@@ -260,6 +260,30 @@ u8 Bus::ReadIO(u16 addr) {
             LDEBUG("reading 0x%02X from 0xFF00 (Joypad)", 0xCF);
             // LWARN("(hack) all reads from 0xFF00 are currently stubbed to 0xCF");
             return 0xCF;
+        case 0xFF04:
+        {
+            u8 div = timer.GetDivider();
+            LDEBUG("reading 0x%02X from DIV (0xFF04)", div);
+            return div;
+        }
+        case 0xFF05:
+        {
+            u8 tima = timer.GetTIMA();
+            LDEBUG("reading 0x%02X from TIMA (0xFF05)", tima);
+            return tima;
+        }
+        case 0xFF06:
+        {
+            u8 tma = timer.GetTMA();
+            LDEBUG("reading 0x%02X from TMA (0xFF06)", tma);
+            return tma;
+        }
+        case 0xFF07:
+        {
+            u8 tac = timer.GetTAC();
+            LDEBUG("reading 0x%02X from TAC (0xFF07)", tac);
+            return tac;
+        }
         case 0xFF0F:
             // Interrupt fetch
             return memory[0xFF0F];
@@ -316,6 +340,30 @@ void Bus::WriteIO(u16 addr, u8 value) {
             // putchar(value);
             LDEBUG("writing 0x%02X to Serial data (0xFF01)", value);
             return;
+        case 0xFF04:
+            // Timer divider
+            // All writes to this set it to 0.
+            timer.ResetDivider();
+            memory[0xFF04] = 0x00;
+            return;
+        case 0xFF05:
+            // Timer counter
+            LDEBUG("writing 0x%02X to TIMA (0xFF05)", value);
+            timer.SetTIMA(value);
+            memory[0xFF05] = value;
+            return;
+        case 0xFF06:
+            // Timer modulo
+            LDEBUG("writing 0x%02X to TMA (0xFF06)", value);
+            timer.SetTMA(value);
+            memory[0xFF06] = value;
+            return;
+        case 0xFF07:
+            // Timer control
+            LDEBUG("writing 0x%02X to TAC (0xFF07)", value);
+            timer.SetTAC(value);
+            memory[0xFF07] = value;
+            return;
         case 0xFF0F:
             // Interrupt fetch
             memory[0xFF0F] = value;
diff --git a/src/bus.h b/src/bus.h
@@ -4,11 +4,12 @@
 #include "bootrom.h"
 #include "cartridge.h"
 #include "ppu.h"
+#include "timer.h"
 #include "types.h"
 
 class Bus {
 public:
-    Bus(BootROM& bootrom, Cartridge& cartridge, PPU& ppu);
+    Bus(BootROM& bootrom, Cartridge& cartridge, PPU& ppu, Timer& timer);
 
     u8 Read8(u16 addr);
     void Write8(u16 addr, u8 value);
@@ -37,4 +38,5 @@ class Bus {
     BootROM bootrom;
     Cartridge cartridge;
     PPU& ppu;
+    Timer& timer;
 };
diff --git a/src/gb.cpp b/src/gb.cpp
@@ -4,7 +4,7 @@
 #include "ppu.h"
 
 GB::GB(BootROM bootrom, Cartridge cartridge)
-    : bus(bootrom, cartridge, ppu), ppu(bus), sm83(bus) {
+    : bus(bootrom, cartridge, ppu, timer), ppu(bus), sm83(bus), timer(bus) {
     LINFO("powering on...");
     cycles = 0;
 }
@@ -13,6 +13,7 @@ void GB::Run() {
     u8 c = sm83.Tick();
     cycles += c;
     ppu.Tick(c);
+    timer.Tick(c);
 }
 
 Bus GB::GetBus() {
diff --git a/src/gb.h b/src/gb.h
@@ -5,6 +5,7 @@
 #include "bus.h"
 #include "ppu.h"
 #include "sm83.h"
+#include "timer.h"
 
 class GB {
 public:
@@ -17,6 +18,7 @@ class GB {
     Bus bus;
     PPU ppu;
     SM83 sm83;
+    Timer timer;
 
     u64 cycles;
 };
diff --git a/src/ppu.cpp b/src/ppu.cpp
@@ -15,9 +15,6 @@ PPU::PPU(Bus& bus)
 }
 
 void PPU::Tick(u8 cycles) {
-    if (cycles == 0) {
-        // LWARN("The executed instruction advanced zero cycles");
-    }
     vcycles += cycles;
 
     switch (mode) {
diff --git a/src/sm83.cpp b/src/sm83.cpp
@@ -30,13 +30,19 @@ u8 SM83::Tick() {
     }
 
     pc_at_opcode = pc;
+    // if (pc_at_opcode == 0xC31B) {
+    //     LFATAL("div=%02X tima=%02X", bus.Read8(0xFF04), bus.Read8(0xFF05));
+    // }
     const u8 opcode = GetByteFromPC();
 
     // LTRACE("executing opcode 0x%02X at 0x%04X", opcode, pc_at_opcode);
     if (!ExecuteOpcode(opcode)) {
         std::exit(0);
     }
 
+    if (cycles_to_advance == 0) {
+        LWARN("The executed opcode %02X advanced zero cycles", opcode);
+    }
     return cycles_to_advance;
 }
 
@@ -105,6 +111,7 @@ void SM83::StackPop(u16* word_reg) {
 bool SM83::ExecuteOpcode(const u8 opcode) {
     switch (opcode) {
         case 0xCB:
+            AdvanceCycles(4);
             if (!ExecuteCBOpcode(GetByteFromPC())) {
                 return false;
             }
@@ -1549,6 +1556,8 @@ void SM83::ld_dbc_a() {
     LTRACE("LD (BC), A");
 
     bus.Write8(bc, a);
+
+    AdvanceCycles(8);
 }
 
 void SM83::ld_dc_a() {
@@ -2411,6 +2420,8 @@ void SM83::rlc_dhl() {
     SetCarryFlag(should_carry);
 
     bus.Write8(hl, result | should_carry);
+
+    AdvanceCycles(16);
 }
 
 void SM83::rlc_r(u8* reg) {
diff --git a/src/timer.cpp b/src/timer.cpp
@@ -0,0 +1,84 @@
+#include "bus.h"
+#include "logging.h"
+#include "timer.h"
+
+Timer::Timer(Bus& bus)
+    : bus(bus) {
+    div = 0x00;
+    tima = 0x00;
+    tma = 0x00;
+    tac = 0x00;
+    timer_enable = false;
+    div_cycles = 0;
+    tima_cycles = 0;
+}
+
+void Timer::Tick(u64 cycles_to_add) {
+    if (timer_enable) {
+        tima_cycles += cycles_to_add;
+
+        if (tima_cycles >= GetTACFrequency()) {
+            tima_cycles -= GetTACFrequency();
+            tima++;
+            
+            // overflow
+            if (tima == 0) {
+                tima = tma;
+                // request a timer interrupt
+                bus.Write8(0xFF0F, bus.Read8(0xFF0F) | 0x4);
+                // LFATAL("Setting tima to 0x%02X", tma);
+            }
+        }
+    }
+
+    div_cycles += cycles_to_add;
+    if (div_cycles >= 256) {
+        div_cycles -= 256;
+        div++;
+    }
+}
+
+u8 Timer::GetDivider() {
+    return div;
+}
+
+void Timer::ResetDivider() {
+    div = 0x00;
+}
+
+u8 Timer::GetTIMA() {
+    return tima;
+}
+
+void Timer::SetTIMA(u8 value) {
+    tima = value;
+}
+
+u8 Timer::GetTMA() {
+    return tma;
+}
+
+void Timer::SetTMA(u8 value) {
+    tma = value;
+}
+
+u8 Timer::GetTAC() {
+    return tac;
+}
+
+void Timer::SetTAC(u8 value) {
+    tac = value;
+    timer_enable = (tac & (1 << 2));
+}
+
+u32 Timer::GetTACFrequency() {
+    switch (tac & 0b11) {
+        case 0b00: return 1024;
+        case 0b01: return 16;
+        case 0b10: return 64;
+        case 0b11: return 256;
+        default:
+            LERROR("unreachable TAC frequency");
+            return 1;
+    }
+}
diff --git a/src/timer.h b/src/timer.h
@@ -0,0 +1,34 @@
+#pragma once
+
+#include "types.h"
+
+class Timer {
+public:
+    Timer(Bus& bus);
+
+    void Tick(u64 cycles_to_add);
+
+    u8 GetDivider();
+    void ResetDivider();
+    u8 GetTIMA();
+    void SetTIMA(u8 value);
+    u8 GetTMA();
+    void SetTMA(u8 value);
+    u8 GetTAC();
+    void SetTAC(u8 value);
+
+private:
+    u32 GetTACFrequency();
+
+    u8 div; // divider
+    u8 tima; // timer counter
+    u8 tma; // timer modulo
+    u8 tac; // timer control
+
+    bool timer_enable;
+
+    u64 div_cycles;
+    u64 tima_cycles;
+
+    Bus& bus;
+};
diff --git a/tests.md b/tests.md
@@ -23,7 +23,7 @@ Some of these tests will always fail due to currently unimplemented features, li
 | Test | Result |
 | ---- | ------ |
 | 01-special | Passed |
-| 02-interrupts | Failed (Timer doesn't work)
+| 02-interrupts | Passed |
 | 03-op sp,hl | Passed |
 | 04-op r,imm | Passed |
 | 05-op rp | Passed |
@@ -54,7 +54,7 @@ Some of these tests will always fail due to currently unimplemented features, li
 Failed (3DB103C3)
 
 ## instr_timing
-Failed (#255)
+Failed (Timer doesn't work properly)
 
 ## interrupt_time
 Failed
@@ -151,15 +151,15 @@ Failed
 | ret_timing | Failed (Round 1) |
 | rst_timing | Failed |
 | serial/boot_sclk_align-dmgABCmgb | Failed (No serial intr) |
-| timer/div_write | Passed |
-| timer/rapid_toggle | Failed (No intr) |
-| timer/tim00_div_trigger | Failed |
+| timer/div_write | Failed (intr) |
+| timer/rapid_toggle | Failed |
+| timer/tim00_div_trigger | Passed |
 | timer/tim00 | Failed |
 | timer/tim01_div_trigger | Failed |
-| timer/tim01 | Failed |
+| timer/tim01 | Passed |
 | timer/tim10_div_trigger | Failed |
 | timer/tim10 | Failed |
-| timer/tim11_div_trigger | Failed |
+| timer/tim11_div_trigger | Passed |
 | timer/tim11 | Failed |
 | timer/tima_reload | Failed |
 | timer/tima_write_reloading | Failed |

Original file line number	Diff line number	Diff line change
`@@ -19,6 +19,7 @@ set(SOURCES`
`19`	`19`	`src/main.cpp`
`20`	`20`	`src/ppu.cpp`
`21`	`21`	`src/sm83.cpp`
	`22`	`+ src/timer.cpp`
`22`	`23`	`)`
`23`	`24`
`24`	`25`	`set(HEADERS`
`@@ -29,6 +30,7 @@ set(HEADERS`
`29`	`30`	`src/logging.h`
`30`	`31`	`src/ppu.h`
`31`	`32`	`src/sm83.h`
	`33`	`+ src/timer.h`
`32`	`34`	`src/types.h`
`33`	`35`	`)`
`34`	`36`
Original file line number	Diff line number	Diff line change
`@@ -4,7 +4,7 @@`
`4`	`4`	`#include "ppu.h"`
`5`	`5`
`6`	`6`	`GB::GB(BootROM bootrom, Cartridge cartridge)`
`7`		`- : bus(bootrom, cartridge, ppu), ppu(bus), sm83(bus) {`
	`7`	`+ : bus(bootrom, cartridge, ppu, timer), ppu(bus), sm83(bus), timer(bus) {`
`8`	`8`	`LINFO("powering on...");`
`9`	`9`	`cycles = 0;`
`10`	`10`	`}`
`@@ -13,6 +13,7 @@ void GB::Run() {`
`13`	`13`	`u8 c = sm83.Tick();`
`14`	`14`	`cycles += c;`
`15`	`15`	`ppu.Tick(c);`
	`16`	`+ timer.Tick(c);`
`16`	`17`	`}`
`17`	`18`
`18`	`19`	`Bus GB::GetBus() {`
Original file line number	Diff line number	Diff line change
`@@ -15,9 +15,6 @@ PPU::PPU(Bus& bus)`
`15`	`15`	`}`
`16`	`16`
`17`	`17`	`void PPU::Tick(u8 cycles) {`
`18`		`- if (cycles == 0) {`
`19`		`- // LWARN("The executed instruction advanced zero cycles");`
`20`		`- }`
`21`	`18`	`vcycles += cycles;`
`22`	`19`
`23`	`20`	`switch (mode) {`