Releases: trabucayre/openFPGALoader
Releases · trabucayre/openFPGALoader
v0.6.0 release
Evolution summary:
Note
- libhid-raw is the prefered library (libhid-libusb is used for backward
compatibility) - zlib is required to uncompress spiOverJtag's rbf files
core
new
- vid/pid args
- verbose-level arg: -1 quiet, 0 normal mode, 1 verbose, 2 debug lowlevel
- external-flash option (Gowin devices)
- altsetting (DFU)
update
- device: if filename has no extension -> use raw type
- set USEUDEV=OFF by default for windows builds
- mask idcode upper nibble (version in IEEE 1149.1)
fix
- detect display order
- progressBar: use only stdout.
- main: fix comments for load and write bitstream
- main: don't limit vid/pid to dfu
- main: raise error when board name is provided but not found
cable
new
- ch552_jtag: driver for ch552_jtag firmware (ft2232c clone)
- DFU: filter to select altsetting interface
update
- jtag: add access to target idcode
- ftdiJtagMPSSE: improve USB transaction
- writeTMS: len int -> uint32_t
- cmsisDAP: try libhidapi-hidraw, or libhidapi-libusb for backward compatibility
- cmsisDAP: send disconnect after use
- cmsisDAP: close device and context after use/ when fail
fix
- ftdipp_mpsse: typo in setClkFreq
- ftdiJtagMPSSE: Fix TCK toggle for large numbers.
- cmsisDAP: fix buffer length
- ch552_jtag: fix buffer flush with previous libftdi version
- jtag: fix idcode mask and display
parts
new
- GW1NSR-4C
- XC95 CPLD family
- spartan3
- XCF flash
- Coolrunner-II support
- gowin external spi in bscan
- MachXO3D
- efinix: jtag support
update
- altera: EP3C16 and EP4CE15 have same idcode
- xilinx: Adapt wait times with JTAG frequency.
- lattice: merge ECP5-12 & ECP5-25 (same idcode)
- lattice: machXO3D pubkey programming and authentification mode
- lattice: check matching idcode between bitstream and FPGA
fix
- lattice: throw exception when program fails
- lattice: if unknown file type, fails only for SRAM
- lattice: fix REG_STATUS_CNF_CHK_MASK offset: not the same for machXO3D and others
- xilinx: with XCF reconfigure FPGA after write
- xilinx: Fix wrong description of XC95288XL
files
new
- xilinxMapParser: fuse mapping for xc2c jed
- add gzip support
update
- jedParser: add xilinx compatibility
- fsparser: gw1nsr-4c idcode/nb_line
- check if it's a compressed file -> extract real extension
- xilinx: test parse return for jedec instead of catch exception
- latticeBitParser: extract FPGA idcode from configuration data
fix
- jedParser: fix checksum for xc9500
- jedParser: fix checksum when configuration data size is not multiple of 8bits
- latticeBitParser: fix loop type
boards
new
- Alhambra II
- Sipeed Tang Nano 4K kit
- Efinix Trion T120 BGA 576 Dev Kit
- 1bitsquared iCEBreaker-bitsy
- QMTECH Cyclone IV Core Board
update
- Xyloni JTAG interface
- oe_pin in board configuration
- board: force 0 for altsetting in non-DFU type
- dfu: throw exception when vid & pid == 0
spiOverJtag
new
- 5CEBA4F23C8
- 5CEBA4F43C8
- ECP4CE15F23
update
- compress rbf file
fix
- fix sdc file
spi Flash
new
- introduce list of known spi flash devices (required for protection)
- add flash_model, method to convert len to block protect and block protect to len
- enable_protection method
- erase using 4 or 64Kb
update
- extract status register display from read_status_reg
fix
- workaround for dump > 1M
- fix len_to_bp mask
documentation
- Rework project documentation
- add Sphinx site
- convert from md to rst
- ci: use BuildTheDocs
- add shields/badges
- retrieve username from $USER
Contributors
- Dominik Wernberger (@Werni2A)
- Fabien Marteau (@Martoni)
- Florent Kermarrec (@enjoy-digital)
- Jean THOMAS (@jeanthom)
- Uwe Bonnes (@UweBonnes)
- Vegard Storheil Eriksen (@zyp)
- Martin Beynon (@abacomartin)
- emard (@emard):
- Unai Martinez-Corral (@umarcor)
- wuhanstudio (@wuhanstudio)
v0.5.0 release
Evolution summary:
core
new
- CI builder (windows and Linux)
- release artifacts
- spiOverJtag: altera version (virtual jtag)
update
- better list of boards and FPGA
- spiOverJtag: build system now based on edalize
- spiOverJtag: rewrite xilinx spiOverJtag vhd -> v
- spiOverJtag: use build.py for all devices, add xc6slx45
- epcq,spiFlash: epcq is now a subclass of spiFlash
- spiFlash: add verify and dump method
fix
- main: display error message if program fails
- configBitstreamParser: don't compute reverseByte, use a precomputed table: gain: 200ms for arty @30mhz
- progressBar: limit resolution
cable
update
- DFU: try to open dfu file VID/PID. If fails try with constructor VID/PID.
fix
- DFU: don't try to autodetect target to use
- ftdxxx: workaround for arty to program at 30MHz
parts
new
- Xilinx Spartan6 xc6slx100fgg484
- Gowin GW1N-2
update
- altera: use new epcq interface, add device type and prog type. Now more generic and not specific to cyc1000
- altera: add spi flash support for cyclone IV & cyclone V
boards
new
- Fomu support
- default clock speed in board configuration
- add VID/PID at board configuration level
update
- cyc1000: add fpga model and spi flash support
- Arty set default clock speed @ 10MHz
- de0nano: add fpga model and spi flash support
- qmTech: add fpga model and spi flash support
- pipistrello: add fpga mode and spi flash support
Contributors:
- Billy Stevens (@wasv):
- ultraembedded (@ultraembedded)
- Unai Martinez-Corral (@umarcor)
v0.4.0 release
Evolution summary:
core
update
- LICENSE: now APACHE 2.0
cable
new
- Orbtrace
parts
update
- gowin: checks if fs is targeted for the connected device
- xilinx, lattice, efinix: add verify write to flash
- xilinx, lattice, efinix, ice40: add option to dump flash area
fix
- ftdi: with libftdi >= 1.5 reattach hack is no more required
Contributors:
- Vegard Storheil Eriksen (@zyp)
v0.3.0 release
Evolution summary:
core
new
- main: add optional probe-firmware
- main: add option to specify device index
- part: add irlength and introduce new structure for device not handled (CPU) mainly for irlength
- jtag: add logic to handle multiple device in JTAG chain
update
- spiFlash: introduce jedec_id
- main: rework fpga detection to allows more than one device in a chain, but only FPGA is allowed
fix
- spiFlash: add a workaround for microchip SST26VF032B / SST26VF032BA
- main: fix default args.index_chain
cable
new
- Digilent Digital Discovery and Analog Discovery 2
- cmsis dap (hid) support
- cypress fx2 low level
- DFU protocol support
- usb-blasterII
update
- usbBlaster: add a low level to support both usbBlasterI(ftdi) and usbBlasterII(fx2)
- dirtyJtag: optimizations to cut the number of USB requests
fix
- allow 232H devices to have upper bank pins configured on init.
boards
new
- Alchitry Au
- basys3
- colorlight I5
- digilent zedboard
- minispartan6
- orangeCrab
- terasic de0nanoSoc
- terasic de10nano
parts
new
- intel cycloneV Soc 5CSEMA4, 5CSEBA6
- lattice MachXO2 LCMXO2-1200HC
- xilinx artix 7 75t
- xilinx spartan6 xc6slx9, xc6slx16, xc6slx25
- xilinx zynq 7020
update
- lattice: move directly to run_test_idle with last tx packet
- rework xilinx fpga spiOverJtag to respect model/package
- altera: adapt delay according to clock freq
fix
- xilinx: be more verbose when spiOverJtag not available
- xilinx: supress useless test in spi_wait
bitstream/file type
new
- ihexParser
fix
- fsparser: fix checksum with GW1NS-2C, when configuration data is smaller than theory
- fsparser: don't try to analyze header after then end of header area
- fsparser: drop CR at the end of line
- configBitstreamParser: fix CRLF vs LF: use fread with FILE (or stdin) instead of c++ stream
Contributors:
- GEORGIOS KARNAS (@kargeor)
- phdussud (@phdussud)
- ultraembedded (@ultraembedded)
v0.2.6 release
Evolutions summary:
core
new
- CLI argument to bypass file type autodetection
- add pipe (stdin) support
fix
- progressBar: use chrono instead of clock
- main: fix bitbang check: config pins must be the shift value
cable
new
- DirtyJtag2
- SecuringHardware Tigard programmer
update
- drop divide_by_5 param
- add links for honeycomb adapter
- add links for tangNano adapter
fix
- fix purge buffer fix libftdi >= 1.5
boards
new
- honeycomb board
- kc705 dev kit
- Terasic DE0 board
- iCE40HX8K-EVB.
update
- TEC0117 can be flashed in memory and flash
fix
- README: updated pinout for direct SPI mode on iCE40HXXK-EVB
parts
new
- xilinx kintex xc7k325t
- altera cycloneIII
- altera cyclone V 5CEBA4
- Gowin GW1NS-2C
update
- lattice: drop the limitation, for .bin, to write at offset > 0
bitstream
update
- all parser: _raw_data is now filled in configBitstreamParser
- displayHeader: become a common method (configBitstreamParser)
- improve/rewrite some parser (efinixHexparser 1s -> 11ms)
- configBitstreamParser: add support to read data from stdin
- bitparser: drop garbage characters, use _hdr, best header parsing and display
Contributors:
- emard (@emard):
- Fabien Marteau (@Martoni)
- Giuseppe Gebbia (@gpgb)
- Gustavo Buzogany Eboli (@gbuzogany)
- Gwenhael Goavec-Merou (@trabucayre)
- phdussud (@phdussud)
- Vadim Kaushan (@Disasm)
v0.2.5 release
Evolutions summary:
core
- limit the progressBar update rate to 5 per second. This speeds up loading of small bin files.
- cable: always display real used frequency
- recast verbose to int8_t to have more level of verbosity (-1 quiet, 0 normal, 1 verbose), add --quiet option, display progress bar when verbosity level >= 0
- main: catch exception if FPGA can't be claimed.
- display: add warning message
- ftdipp_mpsse: don't configures high bytes for devices with only one bank per channel
boards
- efinix Xyloni
- seeedstudio runber (gowin GW1N-4)
- board: add entry for tec0117 (alias for Trenz littleBee)
filetype
- configBitstreamParser: introduce a buffer for unprocessed file content, external access to header keys/values
- anlogicBitParser, efinixHexParser: use _raw_data and work with this one instead of file descriptor
- dfuFileParser: parser for bitstream with DFU suffix
- svf_jtag: suppress CR when file is in DOS format
- rawParser: use raw_data buffer
- fsparser: rewrite to use header instead of comments, add support for
compressed bitstream, display warning message for missing or unknown idcode, add missing GW1N-4(ES) idcode
parts
- xilinx: allow bin file to memory
doc
- update xilinx section
- add note for default behavior (memory/flash) and offset option
contributors
- Gwenhael Goavec-Merou (@trabucayre)
- phdussud (@phdussud)
v0.2.1 release
Minor release
core
- fix error messages with gcc 10.2
- fix version number
boards
- Acorn CLE215+
- Faiwaves XTRX
parts
- xilinx: drop offset check with raw binary
contributors
- Gwenhael Goavec-Merou (@trabucayre)
- phdussud (@phdussud)
v0.2 release
Evolutions summary:
core
new
- FTDI serial and channel selection
- CLI argument to provide pin mapping for bitbang mode (ft232 and ft231x)
- CMakeFile: add options to provides libraries path
- spiFlash: add method to read flash content and (non)volatile registers + cleanup
- direct SPI flash access
update
- replace argp by cxxopts
fix
- MinGW and Msys2 support
- Add uaccess tag to udev rules to work on distros without plugdev group
- delete jtag if something is wrong
- spiFlash: fix base addr
- ftdiJtagBitbang: quick fix to avoid overflow in writeTDI
cable
new
- Intel usb blaster cable
- Anlogic JTAG adapter
- ftdispi: implement spiInterface
update
- add bitbanging in MPSSE (control direction, write and read bank or pins)
fix
- ftdipp_mpsse: fix build failure with gcc 4.8
- spiInterface: increase spi_put len param
- jtag bitbang: improve speed
boards
new
- MachXO3D Development Board
- nexys video
- Arty S7-50
- lichee tang
- iCEBreaker
- icestick
- iCE40-HX8K
- iCE40-HX1K-EVN
- fireant
- QMTech CycloneV
- crosslinknx_evn
- de0nano
parts
new
- Xilinx: add xc7s25, xca50t, xc7a100, xc7a200t
- Anlogic: eagle s20
- Lattice: ice40
- Lattice: LCMXO2-640HC
- Lattice: Nexus (crosslinx and certus)
- Efinix trion
- cycloneV E
update
- xilinx: support writing .bit file to flash
- xilinx: allow write raw binary file in flash
- lattice: support writing arbitrary raw binary data somewhere in external flash
fix
- machXO part name and family
- gowin: missing stdexcept required by runtime_error
- gowin: force flush when it's mandatory
- gowin: increase delay before checking CRC - fix message
- gowin: eraseFLASH(): fix buffer size, set this to 0
- gowin: Fix flash write message and display checksum when SRAM fail
bitstream
new
- anlogic bit
- efinix hex
- altera RBF
- rawParser: raw binary content
update
- latticeBitParser: support lattice radiant bit file
fix
- fsparser: fix checksum for gw1n with ram
- fsparser: obtain data length by using idcode
Contributors:
- Ed Bordin (@edbordin)
- Fabien Marteau (@Martoni)
- Francisco Ayala Le Brun (@fayalalebrun)
- Giuseppe Gebbia (@gpgb)
- Gwenhael Goavec-Merou (@trabucayre)
- Martin Pittermann (@martin2250)
- Rony Kelner (@ronyrus)
- Staf Verhaegen (@Fatsie)
- Thomas Daede (@tdaede)
first release
First release. Support:
- cable:
- ftdi (MPSSE and bitbanging),
- dirtyJtag
- devices:
- Lattice MachXO2, MachX03, XP2 and ECP5,
- Xilinx spartan6, spartan7 and artix7,
- Intel/Altera cyclone10LP,
- Gowin GW1