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Relevent spec sections: 6, 8.1
The current RDI bundle definition allows the sideband config width to be any integer, but the UCIe spec only allows widths of 8, 16, or 32. We should specify the elaboration-time SB width as an enum value, rather than as an integer.
The text was updated successfully, but these errors were encountered:
Relevent spec sections: 6, 8.1
The current RDI bundle definition allows the sideband config width to be any integer, but the UCIe spec only allows widths of 8, 16, or 32. We should specify the elaboration-time SB width as an enum value, rather than as an integer.
The text was updated successfully, but these errors were encountered: