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Can this module do LBT ? Listen before talk ? #16

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4mig4 opened this issue Jun 4, 2018 · 12 comments
Open

Can this module do LBT ? Listen before talk ? #16

4mig4 opened this issue Jun 4, 2018 · 12 comments

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@4mig4
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4mig4 commented Jun 4, 2018

It seems that HAL from SEMTECH supports LBT when version is > = 4.1.0, but can AS923 be supported by your board ? (Japan)

@will127534
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No, it won't support LBT since it needs a FPGA + SX1278 to scan the channel for LBT.

Note that if anyone have the ref V1.5 design sch, I'm willing to add LBT support. 😄

@4mig4
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4mig4 commented Jul 15, 2018

Ok thanks and no I do not have the reference design v1.5

@4mig4 4mig4 closed this as completed Aug 31, 2018
@will127534
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will127534 commented Aug 31, 2018

Reopen this issue because it is on my todo list...
Hope some day I'm able to implement LBT.

@will127534 will127534 reopened this Aug 31, 2018
@piratfm
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piratfm commented Mar 20, 2019

Schematic can be reversed from this photos: https://fccid.io/AU792U13A16859/Internal-Photos/Internal-Photos-3321124

@will127534
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Almost, but you can't, because it is a multi layer board.
I'm hoping to reverse by reversing the FPGA bitstream, but I can't read verilog......

@piratfm
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piratfm commented Mar 21, 2019

Yep, You are right, but on this one:
http://www.embit.eu/wp-content/uploads/fronte-retro1.png
The signal layers are top/bottom and inner - are powers. So this is good suggestion to start. Also There is correct FPGA (iCE40LP1K-CM49) to which firmware is avaliable.

@4mig4
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4mig4 commented Mar 21, 2019

Very nice to see to that you think it is a worthy thing to do.

@piratfm
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piratfm commented Mar 22, 2019

Pin mapping of FPGA, correct me if I'm wrong:

#SPI interface to HOST
set_io SPI_MISO      A5
set_io SPI_CS        A6
set_io SPI_SCLK      A3 #Wire shared with SX1301_SCLK and EEPROM_SCLK
set_io SPI_MOSI      A4 #Wire shared with SX1301_MOSI and EEPROM_MOSI

#SPI slave 0:
set_io SX1301_GPIO1      D7
set_io SX1301_GPIO3      A2
set_io SX1301_GPIO4      B2
set_io SX1301_CSN        B3
set_io SX1301_MISO       B4
set_io SX1301_RADIO_RST  F4 #this is input, not used in FPGA fw

#SPI slave 1: FPGA itselve

#SPI slave 2:
set_io EEPROM_CSN    A7
set_io EEPROM_MISO   C4

#SPI slave 3:
set_io SX1272_MOSI   A1
set_io SX1272_NSS    E2
set_io SX1272_MISO   D2
set_io SX1272_SCK    D3
set_io SX1272_RESET  F2

#Stays in the middle between I2S interface of SX1301 and SX125X (radio A)
set_io A_SP_CLK_IN   D1
set_io A_QI_TX_IN    B1
set_io A_IQ_TX_IN    C1

set_io A_SP_CLK_OUT  F3
set_io A_IQ_TX_OUT   G3
set_io A_QI_TX_OUT   G4

There is some small microchip SPI eeprom, but it's not used in software.
FPGA can be replaced by more DIY-friendly with QFN48 package, like ICE5LP1K-SG48. Only pin map file must be changed (and recompile firmware with icestorm). Also SX1272 share reference clock with SX125X and receiving RF just after second SAW (have no idea about how impedance matching has been made there). Maybe I can try to it with my lattice ICE40UP5K dev board later... But first need to solder (finalize) my gateway.

@will127534
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@piratfm
That was awesome!
I'm recently doing other projects that uses ICE5LP1K-SG48 (a.k.a learning verilog), so I also have some chip and boards :D
I'm glad that I left a bunch of resistor between the SPI lines, it makes it easier to modify.
https://i.imgur.com/jU1EUrS.jpg

@jgriessen
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jgriessen commented Aug 16, 2019

Hi,
I have customers that want LoRa gateways. I wonder if you are available to make some V3 boards
to sell me on tindie and coach me for pay on setup of all the software to connect to lorawan thethingsnetwork? Later, we might make improved boards, weather enclosures, etc. Interested?

I use pcb-rnd for boards with QFN packages and with my chip layout experience, I can make decent layouts and am wanting to try 3D printed metal molds for making thermoplastic molded enclosures for electronics in low volumes and cheap setup or tooling costs. Cheaper than protomold's $1500. Interested in collaboration?

Thanks, John

PostScript: I knew some verilog for chip design, but have forgotten most of it. Listen before talk would be a fine feature to brag about.

@symdeb
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symdeb commented Oct 22, 2019

Hope Will would (re)consider to build another batch of boards. After surveying Lora products, in low cost, raw board form to integrate into embedded projects, there is not much choice. This looks to be the best solution so far to start from. RAK(831) boards are not cheap either. Trying to build an IoT gateway (not using RPI but with STM32/NXP based embedded with SPI) and would like to add in Lora. What would be nice are small companion device development ("thing") boards to connect sensors and actuators for prototype solution purposes. That is a board with SX1272 that can be hooked up to SPI hosts. For now the "LoRa32u4 II 868M 915M Lora Development Board Module LiPo Atmega328 SX1276 HPD13A" is only low cost option. What would be handy in a future version for the GW are jumper to select different frequencies (if that is at all possible). I am in Taipei City as well.

@jgriessen
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@symdeb How is your project to build IoT gateway with STM32/NXP parts coming? Do you use pcb-rnd to make boards? Maybe we can collaborate to get a low cost gateway and sensor boards? I've done work with TinyOS on sensor boards, but that OS stalled. RIOT is the OS I am interested in now.

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