16-bit Arithmetic Logic Unit (ALU)

2-input 16-bit ALU using the Lucid programming language for the Mojo V3 FPGA (Field-programmable gate array) development board (Spartan 6).

Done by:

• Zachary Teo
• Amanda Kosim
• Wong Wei En Matthew
• Chow Jia Yi

Functionality

Standard ALU operations

Arithmetic (+, -)

• Zero, Z
  • indicating all bits of S are logic zero
• Negative, N
  • indicating the result is a negative
• Overflow, V
  • indicating the result has exceeded the numeric range of S

Bitwise logical (AND, NAND, OR, NOR, XOR, “A”, “B”)

Bit Shift (SL, SR, SLA, SRA)

Comparison (==, <, <=)

Multiply (/*)

Additional Functionality

• Automated testing
  • The program uses a Finite State Machine (FSM) to iterate throught a series of test cases for the various operations our ALU is capable of performing. Flow is shown below

Table of functions

ALUFN [5:4]	ALUFN[3:0]	Short-form	Operation
00	0000	ADD	Addition (+)
	0001	SUB	Subtraction (-)
	0010	MUL	Multiply (*)
01	1000	AND	A & B
	0111	NAND	~(A & B)
	1110	OR	A or B
	0001	NOR	~(A or B)
	0110	XOR	A ^ B
	1010	“A”	(A)
	0101	“B”	(B)
10	0000	SHL	Shift Left (>>)
	0001	SHR	Shift Right (<<)
	0011	SHRA	Shift Right Arithmetically (<<<)
11	0011	COMPEQ	Equal (==)
	0101	COMPLT	Less than (<)
	0111	COMPLE	Less than or Equal (<=)

Implementation

The 16-bit is made of the modules below and implemented as its own ALU module, making it hierarchical and modular, for reusability. The ALU module is then implemented in mojo_top.luc

• Adder module
  • part 1: adding/subtracting input A to/by input B
  • part 2: taking S to evaluate z,v,n
• Boolean module
  • bitwise AND, NAND, OR, NOR, XOR, “A”, “B” for inputs A and B
• Compare module
  • uses z,v,n from part 2 of adder to evaluate ==,<,<=
• Shifter module
  • shift input A by input B (bits) for SHL, SHR, SHRA
• Multiply module
  • get the lower 16 bits when input A is multiplied by input B