drivers: spi: dw: fix txftlr in HSSI controller

The TXFTLR register has 2 major fields which are TFT for triggering
interrupt threshold and TXFTLR for starting transfer threshold. This is
to ensure that sufficient data is ready for starting transfer.

Signed-off-by: Younghyun Park <[email protected]>

Author: myguitar

drivers/spi/spi_dw.c

@@ -323,6 +323,18 @@ static void spi_dw_update_txftlr(const struct device *dev,
 		} else if (spi->ctx.tx_len < dw_spi_txftlr_dflt) {
 			reg_data = spi->ctx.tx_len - 1;
 		}
+	} else {
+#if defined(CONFIG_SPI_DW_HSSI) && defined(CONFIG_SPI_EXTENDED_MODES)
+		/*
+		 * TXFTLR field in the TXFTLR register is valid only for
+		 * Controller mode operation
+		 */
+		if (!spi->ctx.tx_len) {
+			reg_data = 0U;
+		} else if (spi->ctx.tx_len < dw_spi_txftlr_dflt) {
+			reg_data = (spi->ctx.tx_len - 1) << DW_SPI_TXFTLR_TXFTLR_SHIFT;
+		}
+#endif
 	}
 
 	LOG_DBG("TxFTLR: %u", reg_data);

drivers/spi/spi_dw.h

@@ -194,6 +194,11 @@ static int reg_test_bit(uint8_t bit, mm_reg_t addr, uint32_t off)
 #define DW_SPI_CTRLR0_SRL_BIT		(13)
 #endif
 
+#if defined(CONFIG_SPI_DW_HSSI) && defined(CONFIG_SPI_EXTENDED_MODES)
+/* TXFTLR setting. Only valid for Controller operation mode. */
+#define DW_SPI_TXFTLR_TXFTLR_SHIFT	(16)
+#endif
+
 #define DW_SPI_CTRLR0_SCPH		BIT(DW_SPI_CTRLR0_SCPH_BIT)
 #define DW_SPI_CTRLR0_SCPOL		BIT(DW_SPI_CTRLR0_SCPOL_BIT)
 #define DW_SPI_CTRLR0_SRL		BIT(DW_SPI_CTRLR0_SRL_BIT)