hv: cpuid: add several leaf to per-cpu list in hybrid architecture

P-cores and E-cores accessing leaf 0x2U/0x14U/0x16U/0x18U/0x1A/0x1C/0x80000006U will have different information in hybrid architecture. So add them to per-cpu list in hybrid architecture and directly return the physical value. Note: 0x14U is hided and return 0. Tracked-On: projectacrn#8608 Signed-off-by: Haiwei Li <[email protected]>
476997779 · May 28, 2024 · b885d02 · b885d02
1 parent d6fe8b0
commit b885d02
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Showing 2 changed files with 48 additions and 21 deletions.
diff --git a/hypervisor/arch/x86/guest/vcpuid.c b/hypervisor/arch/x86/guest/vcpuid.c
@@ -594,8 +594,11 @@ static inline void percpu_cpuid_init(void)
 
 	/* hybrid related percpu leaves*/
 	if (pcpu_has_cap(X86_FEATURE_HYBRID)) {
-		/* 0x4U, 0x6U */
-		uint32_t hybrid_leaves[] = {CPUID_CACHE, CPUID_THERMAL_POWER};
+		/* 0x2U, 0x4U, 0x6U, 0x14U, 0x16U, 0x18U, 0x1A, 0x1C, 0x80000006U */
+		uint32_t hybrid_leaves[] = {CPUID_TLB, CPUID_CACHE,
+			CPUID_THERMAL_POWER, CPUID_FREQ, CPUID_ADDR_TRANS,
+			CPUID_MODEL_ID, CPUID_LAST_BRANCH_RECORD,
+			CPUID_EXTEND_CACHE};
 		memcpy_s((pcpu_cpuids.leaves + pcpu_cpuids.leaf_nr * sizeof(uint32_t)),
 			 sizeof(hybrid_leaves), hybrid_leaves, sizeof(hybrid_leaves));
 		pcpu_cpuids.leaf_nr += sizeof(hybrid_leaves)/sizeof(uint32_t);
@@ -639,7 +642,8 @@ int32_t set_vcpuid_entries(struct acrn_vm *vm)
 			case CPUID_THERMAL_POWER:
 				result = set_vcpuid_thermal_power(vm);
 				break;
-			case 0x07U:
+			 /* 0x07U */
+			case CPUID_EXTEND_FEATURE:
 				init_vcpuid_entry(i, 0U, CPUID_CHECK_SUBLEAF, &entry);
 				if (entry.eax != 0U) {
 					pr_warn("vcpuid: only support subleaf 0 for cpu leaf 07h");
@@ -658,36 +662,36 @@ int32_t set_vcpuid_entries(struct acrn_vm *vm)
 #endif
 				result = set_vcpuid_entry(vm, &entry);
 				break;
-			case 0x12U:
+			/* 0x12U */
+			case CPUID_SGX_CAP:
 				result = set_vcpuid_sgx(vm);
 				break;
 			/* These features are disabled */
 			/* PMU is not supported except for core partition VM, like RTVM */
-			case 0x0aU:
+			/* 0x0aU */
+			case CPUID_ARCH_PERF_MON:
 				if (is_pmu_pt_configured(vm)) {
 					init_vcpuid_entry(i, 0U, 0U, &entry);
 					result = set_vcpuid_entry(vm, &entry);
 				}
 				break;
 
-			/* Intel RDT */
-			case 0x0fU:
+			/* 0xFU, Intel RDT */
+			case CPUID_RDT_MONITOR:
 				break;
-			/* Intel RDT */
-			case 0x10U:
+			/* 0x10U, Intel RDT */
+			case CPUID_RDT_ALLOCATION:
 #ifdef CONFIG_VCAT_ENABLED
 				if (is_vcat_configured(vm)) {
 					result = set_vcpuid_vcat_10h(vm);
 				}
 #endif
 				break;
 
-			/* Intel Processor Trace */
-			case 0x14U:
-			/* PCONFIG */
-			case 0x1bU:
-			/* V2 Extended Topology Enumeration Leaf */
-			case 0x1fU:
+			/* 0x14U, Intel Processor Trace */
+			case CPUID_TRACE:
+			/* 0x1BU, PCONFIG */
+			case CPUID_PCONFIG:
 				break;
 			default:
 				init_vcpuid_entry(i, 0U, 0U, &entry);
@@ -933,7 +937,8 @@ void guest_cpuid(struct acrn_vcpu *vcpu, uint32_t *eax, uint32_t *ebx, uint32_t
 	} else {
 		/* percpu related */
 		switch (leaf) {
-		case 0x01U:
+		/* 0x01U */
+		case CPUID_FEATURES:
 			guest_cpuid_01h(vcpu, eax, ebx, ecx, edx);
 			break;
 
@@ -947,23 +952,35 @@ void guest_cpuid(struct acrn_vcpu *vcpu, uint32_t *eax, uint32_t *ebx, uint32_t
 			guest_cpuid_06h(vcpu->vm, eax, ebx, ecx, edx);
 			break;
 
-		case 0x0bU:
+		/* 0x0BU */
+		case CPUID_EXTEND_TOPOLOGY:
 			guest_cpuid_0bh(vcpu, eax, ebx, ecx, edx);
 			break;
 
-		case 0x0dU:
+		/* 0x0dU */
+		case CPUID_XSAVE_FEATURES:
 			guest_cpuid_0dh(vcpu, eax, ebx, ecx, edx);
 			break;
 
-		case 0x19U:
+		/* 0x14U for hybrid arch */
+		case CPUID_TRACE:
+			*eax = 0U;
+			*ebx = 0U;
+			*ecx = 0U;
+			*edx = 0U;
+			break;
+		/* 0x19U */
+		case CPUID_KEY_LOCKER:
 			guest_cpuid_19h(vcpu, eax, ebx, ecx, edx);
 			break;
 
-		case 0x1fU:
+		/* 0x1fU */
+		case CPUID_V2_EXTEND_TOPOLOGY:
 			guest_cpuid_1fh(vcpu, eax, ebx, ecx, edx);
 			break;
 
-		case 0x80000001U:
+		/* 0x80000001U */
+		case CPUID_EXTEND_FUNCTION_1:
 			guest_cpuid_80000001h(vcpu, eax, ebx, ecx, edx);
 			break;
 

diff --git a/hypervisor/include/arch/x86/asm/cpuid.h b/hypervisor/include/arch/x86/asm/cpuid.h
@@ -171,16 +171,26 @@
 #define CPUID_CACHE             4U
 #define CPUID_THERMAL_POWER     6U
 #define CPUID_EXTEND_FEATURE    7U
+#define CPUID_ARCH_PERF_MON    0xAU
 #define CPUID_EXTEND_TOPOLOGY  0xBU
 #define CPUID_XSAVE_FEATURES   0xDU
+#define CPUID_RDT_MONITOR      0xFU
 #define CPUID_RDT_ALLOCATION   0x10U
+#define CPUID_SGX_CAP          0x12U
+#define CPUID_TRACE            0x14U
+#define CPUID_FREQ             0x16U
+#define CPUID_ADDR_TRANS       0x18U
 #define CPUID_KEY_LOCKER       0x19U
+#define CPUID_MODEL_ID         0x1AU
+#define CPUID_PCONFIG          0x1BU
+#define CPUID_LAST_BRANCH_RECORD     0x1CU
 #define CPUID_V2_EXTEND_TOPOLOGY     0x1FU
 #define CPUID_MAX_EXTENDED_FUNCTION  0x80000000U
 #define CPUID_EXTEND_FUNCTION_1      0x80000001U
 #define CPUID_EXTEND_FUNCTION_2      0x80000002U
 #define CPUID_EXTEND_FUNCTION_3      0x80000003U
 #define CPUID_EXTEND_FUNCTION_4      0x80000004U
+#define CPUID_EXTEND_CACHE           0x80000006U
 #define CPUID_EXTEND_INVA_TSC        0x80000007U
 #define CPUID_EXTEND_ADDRESS_SIZE    0x80000008U