Welcome to the ARCH Research Lab GitHub Page!
We design, analyze, and validate resilient, secure, and energy-efficient computing hardware. Our mission is to develop the architectural foundations and hardware techniques needed for dependable computing in the face of faults, attacks, variability, and emerging technology challenges.
The Architectures for Resilient Computing Hardware (ARCH) Research Lab explores cutting-edge research at the intersection of:
- Computer architecture
- Hardware reliability and resilience
- Hardware security and trust
- Energy-efficient and approximate computing
- Emerging memory and logic technologies
Our work spans theory, simulation, hardware design, and empirical evaluation on real systems.
Techniques that detect, mitigate, and recover from transient and permanent hardware faults.
Fault injection, side-channel behavior, hardware vulnerability analysis, tamper-resistant architectures.
Architectures designed for power-constrained and error-tolerant domains such as AI/ML, edge systems, and IoT.
Exploring new device models, memory technologies, and computing paradigms for next-generation systems.
Frameworks for performance, power, and reliability exploration at scale.
We partner with researchers, industry teams, and government organizations working in:
- Hardware reliability
- Secure and trustworthy computing
- Hardware/software co-design
- High-performance and energy-efficient systems
If you’re interested in collaborating, please get in touch.
We welcome students and collaborators passionate about hardware security, reliability, and computer architecture. Opportunities may be available for:
- Undergraduate research
- MS/PhD student involvement
- Visiting researchers
- Inter-lab collaborations
