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Fix CHERI AMO tests
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Matthew Naylor committed Jun 2, 2023
1 parent a078017 commit 49c23a2
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Showing 9 changed files with 9 additions and 9 deletions.
2 changes: 1 addition & 1 deletion apps/TestSuite/CHERI/A/camoadd_w.S
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Original file line number Diff line number Diff line change
Expand Up @@ -20,7 +20,7 @@ RVTEST_CODE_BEGIN
#define ADDR (\
1 << (DRAMAddrWidth + DRAMBeatLogBytes) - \
1 << (SIMTLogLanes + SIMTLogWarps + SIMTLogBytesPerStack) - \
1 << (SIMTLogLanes + SIMTLogWordsPerSRAMBank + 2))
1 << (SIMTLogSRAMBanks + SIMTLogWordsPerSRAMBank + 2))

# Use only a single thread for this test
csrrw t3, 0xf14, zero
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2 changes: 1 addition & 1 deletion apps/TestSuite/CHERI/A/camoand_w.S
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Original file line number Diff line number Diff line change
Expand Up @@ -20,7 +20,7 @@ RVTEST_CODE_BEGIN
#define ADDR (\
1 << (DRAMAddrWidth + DRAMBeatLogBytes) - \
1 << (SIMTLogLanes + SIMTLogWarps + SIMTLogBytesPerStack) - \
1 << (SIMTLogLanes + SIMTLogWordsPerSRAMBank + 2))
1 << (SIMTLogSRAMBanks + SIMTLogWordsPerSRAMBank + 2))

# Use only a single thread for this test
csrrw t3, 0xf14, zero
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2 changes: 1 addition & 1 deletion apps/TestSuite/CHERI/A/camomax_w.S
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Original file line number Diff line number Diff line change
Expand Up @@ -20,7 +20,7 @@ RVTEST_CODE_BEGIN
#define ADDR (\
1 << (DRAMAddrWidth + DRAMBeatLogBytes) - \
1 << (SIMTLogLanes + SIMTLogWarps + SIMTLogBytesPerStack) - \
1 << (SIMTLogLanes + SIMTLogWordsPerSRAMBank + 2))
1 << (SIMTLogSRAMBanks + SIMTLogWordsPerSRAMBank + 2))

# Use only a single thread for this test
csrrw t3, 0xf14, zero
Expand Down
2 changes: 1 addition & 1 deletion apps/TestSuite/CHERI/A/camomaxu_w.S
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Original file line number Diff line number Diff line change
Expand Up @@ -20,7 +20,7 @@ RVTEST_CODE_BEGIN
#define ADDR (\
1 << (DRAMAddrWidth + DRAMBeatLogBytes) - \
1 << (SIMTLogLanes + SIMTLogWarps + SIMTLogBytesPerStack) - \
1 << (SIMTLogLanes + SIMTLogWordsPerSRAMBank + 2))
1 << (SIMTLogSRAMBanks + SIMTLogWordsPerSRAMBank + 2))

# Use only a single thread for this test
csrrw t3, 0xf14, zero
Expand Down
2 changes: 1 addition & 1 deletion apps/TestSuite/CHERI/A/camomin_w.S
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Original file line number Diff line number Diff line change
Expand Up @@ -20,7 +20,7 @@ RVTEST_CODE_BEGIN
#define ADDR (\
1 << (DRAMAddrWidth + DRAMBeatLogBytes) - \
1 << (SIMTLogLanes + SIMTLogWarps + SIMTLogBytesPerStack) - \
1 << (SIMTLogLanes + SIMTLogWordsPerSRAMBank + 2))
1 << (SIMTLogSRAMBanks + SIMTLogWordsPerSRAMBank + 2))

# Use only a single thread for this test
csrrw t3, 0xf14, zero
Expand Down
2 changes: 1 addition & 1 deletion apps/TestSuite/CHERI/A/camominu_w.S
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Original file line number Diff line number Diff line change
Expand Up @@ -20,7 +20,7 @@ RVTEST_CODE_BEGIN
#define ADDR (\
1 << (DRAMAddrWidth + DRAMBeatLogBytes) - \
1 << (SIMTLogLanes + SIMTLogWarps + SIMTLogBytesPerStack) - \
1 << (SIMTLogLanes + SIMTLogWordsPerSRAMBank + 2))
1 << (SIMTLogSRAMBanks + SIMTLogWordsPerSRAMBank + 2))

# Use only a single thread for this test
csrrw t3, 0xf14, zero
Expand Down
2 changes: 1 addition & 1 deletion apps/TestSuite/CHERI/A/camoor_w.S
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Original file line number Diff line number Diff line change
Expand Up @@ -20,7 +20,7 @@ RVTEST_CODE_BEGIN
#define ADDR (\
1 << (DRAMAddrWidth + DRAMBeatLogBytes) - \
1 << (SIMTLogLanes + SIMTLogWarps + SIMTLogBytesPerStack) - \
1 << (SIMTLogLanes + SIMTLogWordsPerSRAMBank + 2))
1 << (SIMTLogSRAMBanks + SIMTLogWordsPerSRAMBank + 2))

# Use only a single thread for this test
csrrw t3, 0xf14, zero
Expand Down
2 changes: 1 addition & 1 deletion apps/TestSuite/CHERI/A/camoswap_w.S
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Original file line number Diff line number Diff line change
Expand Up @@ -20,7 +20,7 @@ RVTEST_CODE_BEGIN
#define ADDR (\
1 << (DRAMAddrWidth + DRAMBeatLogBytes) - \
1 << (SIMTLogLanes + SIMTLogWarps + SIMTLogBytesPerStack) - \
1 << (SIMTLogLanes + SIMTLogWordsPerSRAMBank + 2))
1 << (SIMTLogSRAMBanks + SIMTLogWordsPerSRAMBank + 2))

# Use only a single thread for this test
csrrw t3, 0xf14, zero
Expand Down
2 changes: 1 addition & 1 deletion apps/TestSuite/CHERI/A/camoxor_w.S
View file
Original file line number Diff line number Diff line change
Expand Up @@ -20,7 +20,7 @@ RVTEST_CODE_BEGIN
#define ADDR (\
1 << (DRAMAddrWidth + DRAMBeatLogBytes) - \
1 << (SIMTLogLanes + SIMTLogWarps + SIMTLogBytesPerStack) - \
1 << (SIMTLogLanes + SIMTLogWordsPerSRAMBank + 2))
1 << (SIMTLogSRAMBanks + SIMTLogWordsPerSRAMBank + 2))

# Use only a single thread for this test
csrrw t3, 0xf14, zero
Expand Down

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