Use em dashes in x86 instruction headings, etc

CTSRD-CHERI · Sep 20, 2023 · 9302a32 · 9302a32
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diff --git a/chap-cheri-x86-64.tex b/chap-cheri-x86-64.tex
@@ -662,15 +662,15 @@ \subsubsection{Capability-Inspection Instructions}
 These instructions fetch a single field from a capability.
 
 \begin{itemize}
-  \item \insnxesref{GCPERM} - Get Capability Permissions
-  \item \insnxesref{GCTYPE} - Get Capability Object Type
-  \item \insnxesref{GCBASE} - Get Capability Base
-  \item \insnxesref{GCLEN} - Get Capability Length
-  \item \insnxesref{GCTAG} - Get Capability Tag
-  \item \insnxesref{GCOFF} - Get Capability Offset
-  \item \insnxesref{GCHI} - Get Capability High Half
-  \item \insnxesref{GCLIM} - Get Capability Limit
-  \item \insnxesref{GCFLAGS} - Get Capability Flags
+  \item \insnxesref{GCPERM} -- Get Capability Permissions
+  \item \insnxesref{GCTYPE} -- Get Capability Object Type
+  \item \insnxesref{GCBASE} -- Get Capability Base
+  \item \insnxesref{GCLEN} -- Get Capability Length
+  \item \insnxesref{GCTAG} -- Get Capability Tag
+  \item \insnxesref{GCOFF} -- Get Capability Offset
+  \item \insnxesref{GCHI} -- Get Capability High Half
+  \item \insnxesref{GCLIM} -- Get Capability Limit
+  \item \insnxesref{GCFLAGS} -- Get Capability Flags
 \end{itemize}
 
 \subsubsection{Capability-Modification Instructions}
@@ -679,34 +679,34 @@ \subsubsection{Capability-Modification Instructions}
 capability.
 
 \begin{itemize}
-  \item \insnxesref{SEAL} - Seal Capability
-  \item \insnxesref{UNSEAL} - Unseal Capability
-  \item \insnxesref{ANDCPERM} - Mask Capability Permissions
-  \item \insnxesref{SCOFF} - Set Capability Offset
-  \item \insnxesref{SCADDR} - Set Capability Address
-  \item \insnxesref{SCBND} - Set Capability Bounds
-  \item \insnxesref{SCBNDE} - Set Exact Capability Bounds
-  \item \insnxesref{SCHI} - Set Capability High Half
-  \item \insnxesref{SCFLAGS} - Set Capability Flags
-  \item \insnxesref{CLCTAG} - Clear Capability Tag
-  \item \insnxesref{BUILDCAP} - Construct Capability
-  \item \insnxesref{CPYTYPE} - Construct Sealing Capability
-  \item \insnxesref{CSEAL} - Conditional Capability Seal
-  \item \insnxesref{SENTRY} - Seal Capability as a Sentry
+  \item \insnxesref{SEAL} -- Seal Capability
+  \item \insnxesref{UNSEAL} -- Unseal Capability
+  \item \insnxesref{ANDCPERM} -- Mask Capability Permissions
+  \item \insnxesref{SCOFF} -- Set Capability Offset
+  \item \insnxesref{SCADDR} -- Set Capability Address
+  \item \insnxesref{SCBND} -- Set Capability Bounds
+  \item \insnxesref{SCBNDE} -- Set Exact Capability Bounds
+  \item \insnxesref{SCHI} -- Set Capability High Half
+  \item \insnxesref{SCFLAGS} -- Set Capability Flags
+  \item \insnxesref{CLCTAG} -- Clear Capability Tag
+  \item \insnxesref{BUILDCAP} -- Construct Capability
+  \item \insnxesref{CPYTYPE} -- Construct Sealing Capability
+  \item \insnxesref{CSEAL} -- Conditional Capability Seal
+  \item \insnxesref{SENTRY} -- Seal Capability as a Sentry
 \end{itemize}
 
 \subsubsection{Control-Flow Instructions}
 
 \begin{itemize}
-  \item \insnxesref{CINVOKE} - Invoke sealed capability pair
+  \item \insnxesref{CINVOKE} -- Invoke sealed capability pair
 \end{itemize}
 
 \subsubsection{Adjusting to Compressed Capability Precision
   Instructions}
 
 \begin{itemize}
-  \item \insnxesref{CRRL} - Round Representable Length
-  \item \insnxesref{CRAM} - Representable Alignment Mask
+  \item \insnxesref{CRRL} -- Round Representable Length
+  \item \insnxesref{CRAM} -- Representable Alignment Mask
 \end{itemize}
 
 \subsubsection{Tag-Memory Access Instructions}
@@ -720,8 +720,8 @@ \subsubsection{Tag-Memory Access Instructions}
 returned by an existing \insnnoref{CPUID} leaf.
 
 \begin{itemize}
-  \item \insnxesref{LCTAGS} - Load Capability Tags
-  \item \insnxesref{CLCTAGS} - Clear Capability Tags
+  \item \insnxesref{LCTAGS} -- Load Capability Tags
+  \item \insnxesref{CLCTAGS} -- Clear Capability Tags
 \end{itemize}
 
 \subsection{Interactions with Vector Extensions}
@@ -1258,5 +1258,5 @@ \subsection{Direct Memory-Offset MOVs}
 
 \subsection{XCHG [ER]AX Opcodes}
 
-If the \insnxesref{XCHG} instructions \texttt{91} - \texttt{97} are not
+If the \insnxesref{XCHG} instructions \texttt{91} -- \texttt{97} are not
 commonly used, they could be removed in capability mode.
diff --git a/insn-x86-64/add.tex b/insn-x86-64/add.tex
@@ -1,8 +1,8 @@
 \clearpage
 \phantomsection
-\addcontentsline{toc}{subsection}{ADD - Add}
+\addcontentsline{toc}{subsection}{ADD -- Add}
 \insnxeslabel{add}
-\subsection*{ADD - Add}
+\subsection*{ADD -- Add}
 
 \begin{x86opcodetable}
   \xopcode{CAP + 05 \emph{id}}{ADD CAX\emph{, imm32}}

diff --git a/insn-x86-64/and.tex b/insn-x86-64/and.tex
@@ -1,8 +1,8 @@
 \clearpage
 \phantomsection
-\addcontentsline{toc}{subsection}{AND - Logical AND}
+\addcontentsline{toc}{subsection}{AND -- Logical AND}
 \insnxeslabel{and}
-\subsection*{AND - Logical AND}
+\subsection*{AND -- Logical AND}
 
 \begin{x86opcodetable}
   \xopcode{CAP + 25 \emph{id}}{AND CAX\emph{, imm32}}

diff --git a/insn-x86-64/andcperm.tex b/insn-x86-64/andcperm.tex
@@ -1,8 +1,8 @@
 \clearpage
 \phantomsection
-\addcontentsline{toc}{subsection}{ANDCPERM - Mask Capability Permissions}
+\addcontentsline{toc}{subsection}{ANDCPERM -- Mask Capability Permissions}
 \insnxeslabel{andcperm}
-\subsection*{ANDCPERM - Mask Capability Permissions}
+\subsection*{ANDCPERM -- Mask Capability Permissions}
 
 \begin{x86opcodetable}
   \xopcode{NP 0F 0C \emph{/r}}{ANDCPERM \emph{r/mc, r64}}

diff --git a/insn-x86-64/buildcap.tex b/insn-x86-64/buildcap.tex
@@ -1,8 +1,8 @@
 \clearpage
 \phantomsection
-\addcontentsline{toc}{subsection}{BUILDCAP - Construct Capability}
+\addcontentsline{toc}{subsection}{BUILDCAP -- Construct Capability}
 \insnxeslabel{buildcap}
-\subsection*{BUILDCAP - Construct Capability}
+\subsection*{BUILDCAP -- Construct Capability}
 
 \begin{x86opcodetable}
   \xopcode{VEX.LZ.0F.W0 0E \emph{/r}}{BUILDCAP \emph{rca, r/mc, rcb}}

diff --git a/insn-x86-64/call.tex b/insn-x86-64/call.tex
@@ -1,8 +1,8 @@
 \clearpage
 \phantomsection
-\addcontentsline{toc}{subsection}{CALL - Call Procedure}
+\addcontentsline{toc}{subsection}{CALL -- Call Procedure}
 \insnxeslabel{call}
-\subsection*{CALL - Call Procedure}
+\subsection*{CALL -- Call Procedure}
 
 \begin{x86opcodetable}
   \xopcode{E8 \emph{cw}}{CALL \emph{rel16}}

diff --git a/insn-x86-64/cinvoke.tex b/insn-x86-64/cinvoke.tex
@@ -1,8 +1,8 @@
 \clearpage
 \phantomsection
-\addcontentsline{toc}{subsection}{CINVOKE - Invoke Sealed Capability Pair}
+\addcontentsline{toc}{subsection}{CINVOKE -- Invoke Sealed Capability Pair}
 \insnxeslabel{cinvoke}
-\subsection*{CINVOKE - Invoke Sealed Capability Pair}
+\subsection*{CINVOKE -- Invoke Sealed Capability Pair}
 
 \begin{x86opcodetable}
   \xopcode{EA \emph{/r}}{CINVOKE \emph{rc, r/mc}}

diff --git a/insn-x86-64/clctag.tex b/insn-x86-64/clctag.tex
@@ -1,8 +1,8 @@
 \clearpage
 \phantomsection
-\addcontentsline{toc}{subsection}{CLCTAG - Clear Capability Tag}
+\addcontentsline{toc}{subsection}{CLCTAG -- Clear Capability Tag}
 \insnxeslabel{clctag}
-\subsection*{CLCTAG - Clear Capability Tag}
+\subsection*{CLCTAG -- Clear Capability Tag}
 
 \begin{x86opcodetable}
   \xopcode{0E /1}{CLCTAG \emph{r/mc}}

diff --git a/insn-x86-64/clctags.tex b/insn-x86-64/clctags.tex
@@ -1,8 +1,8 @@
 \clearpage
 \phantomsection
-\addcontentsline{toc}{subsection}{CLCTAGS - Clear Capability Tags}
+\addcontentsline{toc}{subsection}{CLCTAGS -- Clear Capability Tags}
 \insnxeslabel{clctags}
-\subsection*{CLCTAGS - Clear Capability Tags}
+\subsection*{CLCTAGS -- Clear Capability Tags}
 
 \begin{x86opcodetable}
   \xopcode{0E /2}{CLCTAGS \emph{mcs}}

diff --git a/insn-x86-64/cmov.tex b/insn-x86-64/cmov.tex
@@ -1,8 +1,8 @@
 \clearpage
 \phantomsection
-\addcontentsline{toc}{subsection}{CMOVcc - Conditional Move}
+\addcontentsline{toc}{subsection}{CMOVcc -- Conditional Move}
 \insnxeslabel{cmov}
-\subsection*{CMOV\emph{cc} - Conditional Move}
+\subsection*{CMOV\emph{cc} -- Conditional Move}
 
 \begin{x86opcodetable}
   \xopcode{CAP + 0F 40 \emph{/r}}{CMOVO \emph{rc, r/mc}}

diff --git a/insn-x86-64/cmp.tex b/insn-x86-64/cmp.tex
@@ -1,8 +1,8 @@
 \clearpage
 \phantomsection
-\addcontentsline{toc}{subsection}{CMP - Compare Two Operands}
+\addcontentsline{toc}{subsection}{CMP -- Compare Two Operands}
 \insnxeslabel{cmp}
-\subsection*{CMP - Compare Two Operands}
+\subsection*{CMP -- Compare Two Operands}
 
 \begin{x86opcodetable}
   \xopcode{CAP + 39 \emph{/r}}{CMP \emph{r/mc, rc}}

diff --git a/insn-x86-64/cmpxchg.tex b/insn-x86-64/cmpxchg.tex
@@ -1,8 +1,8 @@
 \clearpage
 \phantomsection
-\addcontentsline{toc}{subsection}{CMPXCHG - Compare and Exchange}
+\addcontentsline{toc}{subsection}{CMPXCHG -- Compare and Exchange}
 \insnxeslabel{cmpxchg}
-\subsection*{CMPXCHG - Compare and Exchange}
+\subsection*{CMPXCHG -- Compare and Exchange}
 
 \begin{x86opcodetable}
   \xopcode{CAP + 0F B1 \emph{/r}}{CMPXCHG \emph{r/mc, rc}}

diff --git a/insn-x86-64/cmpxchg2c.tex b/insn-x86-64/cmpxchg2c.tex
@@ -1,8 +1,8 @@
 \clearpage
 \phantomsection
-\addcontentsline{toc}{subsection}{CMPXCHG2C - Compare and Exchange Pair}
+\addcontentsline{toc}{subsection}{CMPXCHG2C -- Compare and Exchange Pair}
 \insnxeslabel{cmpxchg2c}
-\subsection*{CMPXCHG2C - Compare and Exchange Pair}
+\subsection*{CMPXCHG2C -- Compare and Exchange Pair}
 
 \begin{x86opcodetable}
   \xopcode{CAP + 0F C7 /1}{CMPXCHG2C \emph{m2c}}

diff --git a/insn-x86-64/cpytype.tex b/insn-x86-64/cpytype.tex
@@ -1,8 +1,8 @@
 \clearpage
 \phantomsection
-\addcontentsline{toc}{subsection}{CPYTYPE - Construct Sealing Capability}
+\addcontentsline{toc}{subsection}{CPYTYPE -- Construct Sealing Capability}
 \insnxeslabel{cpytype}
-\subsection*{CPYTYPE - Construct Sealing Capability}
+\subsection*{CPYTYPE -- Construct Sealing Capability}
 
 \begin{x86opcodetable}
   \xopcode{VEX.LZ.66.0F.W0 0E \emph{/r}}{CPYTYPE \emph{rca, r/mc, rcb}}

diff --git a/insn-x86-64/cram.tex b/insn-x86-64/cram.tex
@@ -1,8 +1,8 @@
 \clearpage
 \phantomsection
-\addcontentsline{toc}{subsection}{CRAM - Representable Alignment Mask}
+\addcontentsline{toc}{subsection}{CRAM -- Representable Alignment Mask}
 \insnxeslabel{cram}
-\subsection*{CRAM - Representable Alignment Mask}
+\subsection*{CRAM -- Representable Alignment Mask}
 
 \begin{x86opcodetable}
   \xopcode{1F \emph{/r}}{CRAM \emph{r64, r/m64}}

diff --git a/insn-x86-64/crrl.tex b/insn-x86-64/crrl.tex
@@ -1,8 +1,8 @@
 \clearpage
 \phantomsection
-\addcontentsline{toc}{subsection}{CRRL - Round Representable Length}
+\addcontentsline{toc}{subsection}{CRRL -- Round Representable Length}
 \insnxeslabel{crrl}
-\subsection*{CRRL - Round Representable Length}
+\subsection*{CRRL -- Round Representable Length}
 
 \begin{x86opcodetable}
   \xopcode{1E \emph{/r}}{CRRL \emph{r64, r/m64}}

diff --git a/insn-x86-64/cseal.tex b/insn-x86-64/cseal.tex
@@ -1,8 +1,8 @@
 \clearpage
 \phantomsection
-\addcontentsline{toc}{subsection}{CSEAL - Conditional Capability Seal}
+\addcontentsline{toc}{subsection}{CSEAL -- Conditional Capability Seal}
 \insnxeslabel{cseal}
-\subsection*{CSEAL - Conditional Capability Seal}
+\subsection*{CSEAL -- Conditional Capability Seal}
 
 \begin{x86opcodetable}
   \xopcode{VEX.LZ.F2.0F.W0 0E \emph{/r}}{CSEAL \emph{rca, r/mc, rcb}}

diff --git a/insn-x86-64/dec.tex b/insn-x86-64/dec.tex
@@ -1,8 +1,8 @@
 \clearpage
 \phantomsection
-\addcontentsline{toc}{subsection}{DEC - Decrement by 1}
+\addcontentsline{toc}{subsection}{DEC -- Decrement by 1}
 \insnxeslabel{dec}
-\subsection*{DEC - Decrement by 1}
+\subsection*{DEC -- Decrement by 1}
 
 \begin{x86opcodetable}
   \xopcode{CAP + FF /1}{DEC \emph{r/mc}}

diff --git a/insn-x86-64/gcbase.tex b/insn-x86-64/gcbase.tex
@@ -1,8 +1,8 @@
 \clearpage
 \phantomsection
-\addcontentsline{toc}{subsection}{GCBASE - Get Capability Base}
+\addcontentsline{toc}{subsection}{GCBASE -- Get Capability Base}
 \insnxeslabel{gcbase}
-\subsection*{GCBASE - Get Capability Base}
+\subsection*{GCBASE -- Get Capability Base}
 
 \begin{x86opcodetable}
   \xopcode{F2 0F 7A \emph{/r}}{GCBASE \emph{r64, r/mc}}

diff --git a/insn-x86-64/gcflags.tex b/insn-x86-64/gcflags.tex
@@ -1,8 +1,8 @@
 \clearpage
 \phantomsection
-\addcontentsline{toc}{subsection}{GCFLAGS - Get Capability Flags}
+\addcontentsline{toc}{subsection}{GCFLAGS -- Get Capability Flags}
 \insnxeslabel{gcflags}
-\subsection*{GCFLAGS - Get Capability Flags}
+\subsection*{GCFLAGS -- Get Capability Flags}
 
 \begin{x86opcodetable}
   \xopcode{NP 0F 7B \emph{/r}}{GCFLAGS \emph{r64, r/mc}}

diff --git a/insn-x86-64/gchi.tex b/insn-x86-64/gchi.tex
@@ -1,8 +1,8 @@
 \clearpage
 \phantomsection
-\addcontentsline{toc}{subsection}{GCHI - Get Capability High Word}
+\addcontentsline{toc}{subsection}{GCHI -- Get Capability High Word}
 \insnxeslabel{gchi}
-\subsection*{GCHI - Get Capability High Word}
+\subsection*{GCHI -- Get Capability High Word}
 
 \begin{x86opcodetable}
   \xopcode{F2 0F 7B \emph{/r}}{GCHI \emph{r64, r/mc}}

diff --git a/insn-x86-64/gclen.tex b/insn-x86-64/gclen.tex
@@ -1,8 +1,8 @@
 \clearpage
 \phantomsection
-\addcontentsline{toc}{subsection}{GCLEN - Get Capability Length}
+\addcontentsline{toc}{subsection}{GCLEN -- Get Capability Length}
 \insnxeslabel{gclen}
-\subsection*{GCLEN - Get Capability Length}
+\subsection*{GCLEN -- Get Capability Length}
 
 \begin{x86opcodetable}
   \xopcode{F3 0F 7A \emph{/r}}{GCLEN \emph{r64, r/mc}}

diff --git a/insn-x86-64/gclim.tex b/insn-x86-64/gclim.tex
@@ -1,8 +1,8 @@
 \clearpage
 \phantomsection
-\addcontentsline{toc}{subsection}{GCLIM - Get Capability Limit}
+\addcontentsline{toc}{subsection}{GCLIM -- Get Capability Limit}
 \insnxeslabel{gclim}
-\subsection*{GCLIM - Get Capability Limit}
+\subsection*{GCLIM -- Get Capability Limit}
 
 \begin{x86opcodetable}
   \xopcode{F3 0F 7B \emph{/r}}{GCLIM \emph{r64, r/mc}}

diff --git a/insn-x86-64/gcoff.tex b/insn-x86-64/gcoff.tex
@@ -1,8 +1,8 @@
 \clearpage
 \phantomsection
-\addcontentsline{toc}{subsection}{GCOFF - Get Capability Offset}
+\addcontentsline{toc}{subsection}{GCOFF -- Get Capability Offset}
 \insnxeslabel{gcoff}
-\subsection*{GCOFF - Get Capability Offset}
+\subsection*{GCOFF -- Get Capability Offset}
 
 \begin{x86opcodetable}
   \xopcode{66 0F 7B \emph{/r}}{GCOFF \emph{r64, r/mc}}

diff --git a/insn-x86-64/gcperm.tex b/insn-x86-64/gcperm.tex
@@ -1,8 +1,8 @@
 \clearpage
 \phantomsection
-\addcontentsline{toc}{subsection}{GCPERM - Get Capability Permissions}
+\addcontentsline{toc}{subsection}{GCPERM -- Get Capability Permissions}
 \insnxeslabel{gcperm}
-\subsection*{GCPERM - Get Capability Permissions}
+\subsection*{GCPERM -- Get Capability Permissions}
 
 \begin{x86opcodetable}
   \xopcode{NP 0F 7A \emph{/r}}{GCPERM \emph{r64, r/mc}}

diff --git a/insn-x86-64/gctag.tex b/insn-x86-64/gctag.tex
@@ -1,8 +1,8 @@
 \clearpage
 \phantomsection
-\addcontentsline{toc}{subsection}{GCTAG - Get Capability Tag}
+\addcontentsline{toc}{subsection}{GCTAG -- Get Capability Tag}
 \insnxeslabel{gctag}
-\subsection*{GCTAG - Get Capability Tag}
+\subsection*{GCTAG -- Get Capability Tag}
 
 \begin{x86opcodetable}
   \xopcode{0E /3}{GCTAG \emph{r/mc}}

diff --git a/insn-x86-64/gctype.tex b/insn-x86-64/gctype.tex
@@ -1,8 +1,8 @@
 \clearpage
 \phantomsection
-\addcontentsline{toc}{subsection}{GCTYPE - Get Capability Object Type}
+\addcontentsline{toc}{subsection}{GCTYPE -- Get Capability Object Type}
 \insnxeslabel{gctype}
-\subsection*{GCTYPE - Get Capability Object Type}
+\subsection*{GCTYPE -- Get Capability Object Type}
 
 \begin{x86opcodetable}
   \xopcode{66 0F 7A \emph{/r}}{GCTYPE \emph{r64, r/mc}}

diff --git a/insn-x86-64/inc.tex b/insn-x86-64/inc.tex
@@ -1,8 +1,8 @@
 \clearpage
 \phantomsection
-\addcontentsline{toc}{subsection}{INC - Increment by 1}
+\addcontentsline{toc}{subsection}{INC -- Increment by 1}
 \insnxeslabel{inc}
-\subsection*{INC - Increment by 1}
+\subsection*{INC -- Increment by 1}
 
 \begin{x86opcodetable}
   \xopcode{CAP + FF /0}{INC \emph{r/mc}}