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Fix uninitialized cs_base value for RISC-V and MIPS targets
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This results in QEMU being extremely slow since the TCG tb hash lookups now
compare uninitialized values from the stack and are likely to fail.

This brings the CheriBSD kernel init benchmark
`~/cheri/output/sdk/bin/qemu-system-riscv64cheri.slow -M virt -m 2048 -nographic -kernel ~/cheri/output/kernel-riscv64-purecap.CHERI-QEMU-MFS-ROOT-NODEBUG.full -device virtio-net-device,netdev=net0  -netdev user,id=net0,ipv6=off,hostfwd=tcp::12345-:22 -append init_path=/sbin/startup-benchmark.sh`
back down to 2.5 seconds instead of around 60 seconds.
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arichardson committed Jan 2, 2025
1 parent f510623 commit dc53662
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Showing 2 changed files with 2 additions and 2 deletions.
1 change: 1 addition & 0 deletions target/mips/cpu.h
Original file line number Diff line number Diff line change
Expand Up @@ -1470,6 +1470,7 @@ mips_cpu_get_tb_cpu_state(CPUMIPSState *env, target_ulong *pc,
uint32_t *flags)
{
*pc = PC_ADDR(env); // We want the full virtual address here (no offset)
*cs_base = 0;
*flags = env->hflags &
(MIPS_HFLAG_TMASK | MIPS_HFLAG_BMASK | MIPS_HFLAG_HWRENA_ULR);
#ifdef TARGET_CHERI
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3 changes: 1 addition & 2 deletions target/riscv/cpu_helper.c
Original file line number Diff line number Diff line change
Expand Up @@ -106,9 +106,8 @@ void riscv_cpu_get_tb_cpu_state(CPURISCVState *env, target_ulong *pc,
#ifdef TARGET_CHERI
cheri_cpu_get_tb_cpu_state(&env->PCC, &env->DDC, pcc_base, pcc_top,
cheri_flags);
#else
*cs_base = 0;
#endif
*cs_base = 0;

if (riscv_has_ext(env, RVV)) {
uint32_t vlmax = vext_get_vlmax(env_archcpu(env), env->vtype);
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