12 (2 column) with alternating vertical density

Cal-Poly-RAMP · Oct 20, 2023 · 1f637c2 · 1f637c2
1 parent 19d22d9
commit 1f637c2
Show file tree

Hide file tree

Showing 3 changed files with 14 additions and 18 deletions.
diff --git a/openlane/soc/config.json b/openlane/soc/config.json
@@ -79,7 +79,7 @@
     "FP_PIN_ORDER_CFG": "dir::pin_order.cfg",
     "MAX_TRANSITION_CONSTRAINT": 1.0,
     "MAX_FANOUT_CONSTRAINT": 16,
-    "PL_TARGET_DENSITY": 0.30,
+    "PL_TARGET_DENSITY": 0.20,
     "GRT_OVERFLOW_ITERS": 100000,
     "PL_RESIZER_SETUP_SLACK_MARGIN": 0.4,
     "GLB_RESIZER_SETUP_SLACK_MARGIN": 0.2,

diff --git a/openlane/soc/macro.cfg b/openlane/soc/macro.cfg
@@ -1,17 +1,13 @@
-sram.sram_blocks\[0\].sram1 240 150 MXR90
-sram.sram_blocks\[1\].sram1 270 933.1 R270
-sram.sram_blocks\[2\].sram1 756.54 150 R90
-sram.sram_blocks\[3\].sram1 786.54 933.1 MYR90
+sram.sram_blocks\[0\].sram1 566.9 350 R180
+sram.sram_blocks\[1\].sram1 566.9 786.692 MY
+sram.sram_blocks\[2\].sram1 566.9 1253.384 R180
+sram.sram_blocks\[3\].sram1 566.9 1710.076 MY
+sram.sram_blocks\[4\].sram1 566.9 2196.768 R180
+sram.sram_blocks\[5\].sram1 566.9 2633.46 MY
 
-sram.sram_blocks\[4\].sram1 300 1783.8 MXR90
-sram.sram_blocks\[5\].sram1 330 2566.9 R270
-sram.sram_blocks\[6\].sram1 816.54 1783.8 R90
-sram.sram_blocks\[7\].sram1 846.54 2566.9 MYR90
-
-sram.sram_blocks\[8\].sram1 1476.92 150 MXR90
-sram.sram_blocks\[9\].sram1 1993.46 150 R90
-
-sram.sram_blocks\[10\].sram1 1536.92 1783.8 MXR90
-sram.sram_blocks\[11\].sram1 1566.92 2566.9 R270
-sram.sram_blocks\[12\].sram1 2053.46 1783.8 R90
-sram.sram_blocks\[13\].sram1 2083.46 2566.9 MYR90
+sram.sram_blocks\[6\].sram1 1550 350 MX
+sram.sram_blocks\[7\].sram1 1550 786.692 R0
+sram.sram_blocks\[8\].sram1 1550 1253.384 MX
+sram.sram_blocks\[9\].sram1 1550 1710.076 R0
+sram.sram_blocks\[10\].sram1 1550 2196.768 MX
+sram.sram_blocks\[11\].sram1 1550 2633.46 R0
diff --git a/verilog/rtl/rtl/soc/modules/sram_wrap.sv b/verilog/rtl/rtl/soc/modules/sram_wrap.sv
@@ -3,7 +3,7 @@
 
 module sram_wrap #(
     parameter SRAM_BASE_ADDR      = 32'h8000_0000,
-    parameter SRAM_NUM_BLOCKS     = 14,
+    parameter SRAM_NUM_BLOCKS     = 12,
     parameter SRAM_BLOCK_SIZE     = 512,
     parameter SRAM_LOG_BLOCK_SIZE = $clog2(SRAM_BLOCK_SIZE),
     parameter SRAM_END_ADDR       = (SRAM_BASE_ADDR + (SRAM_NUM_BLOCKS * SRAM_BLOCK_SIZE)),