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@wovo
wovo committed Jan 15, 2021
1 parent 38eae35 commit 637f046
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Showing 4 changed files with 130 additions and 32 deletions.
4 changes: 2 additions & 2 deletions library/targets/hwlib-gd32vf103c8.hpp
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Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,7 @@

#include HWLIB_INCLUDE(../hwlib-all.hpp)

namespace gd32v103xx {
namespace gd32vf103xx {

/// GPIO pin names
enum class pins {
Expand Down Expand Up @@ -108,7 +108,7 @@ namespace gd32v103xx {

#include HWLIB_INCLUDE( hwlib-gd32vf103xx.hpp )

namespace gd32vf103c8 = ::gd32vf1xx;
namespace gd32vf103c8 = ::gd32vf103xx;

namespace hwlib {

Expand Down
55 changes: 27 additions & 28 deletions library/targets/hwlib-gd32vf103xx.hpp
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Original file line number Diff line number Diff line change
Expand Up @@ -16,14 +16,12 @@
#ifndef HWLIB_GD32VF103XX_H
#define HWLIB_GD32VF103XX_H

#include HWLIB_INCLUDE(../hwlib-all.hpp)

// the STM header files use 'register' in the pre-C++17 sense
//#define register
#include "gd32vf103.h"
//#undef register

namespace gd32vf103c8 {
namespace gd32vf103xx {

// the
// - enum class pins
Expand Down Expand Up @@ -78,7 +76,8 @@ namespace gd32vf103c8 {
mask{ 0x1U << pin_number }
{
config( conf );


/*
// a15 = JTDI pin
if(( port_number == 0 ) && ( pin_number == 15 )){
RCC->APB2ENR |= RCC_APB2ENR_AFIOEN;
Expand All @@ -90,7 +89,9 @@ namespace gd32vf103c8 {
RCC->APB2ENR = RCC->APB2ENR | 0b01; // Enable AFIO clock
AFIO->MAPR = ( AFIO->MAPR & ( ~ ( 0b111 <<24 ))) | ( 0b001 << 24 ); // JTA+SW-DP, but without NJRST
}
}
*/

}

bool base_read() {
return ((port.IDR & mask) != 0);
Expand Down Expand Up @@ -242,6 +243,7 @@ namespace gd32vf103c8 {

};

/*
/// 36kHz output on pin chip PA6 (blue pill A6)
///
/// This class provides a 36 kHz output on chip pin PA6
Expand Down Expand Up @@ -287,7 +289,7 @@ namespace gd32vf103c8 {
void flush() override {};
}; // class a6_36kHz

*/

/// pin_oc implementation for an stm32f103c8
class pin_oc : public hwlib::pin_oc, private pin_base {
Expand Down Expand Up @@ -339,7 +341,7 @@ namespace gd32vf103c8 {

/// returns the number of ticks since some fixed starting point
uint_fast64_t HWLIB_WEAK now_ticks() {

/*
static bool init_done = false;
if (!init_done) {
Expand Down Expand Up @@ -408,7 +410,8 @@ namespace gd32vf103c8 {
// return the aggregated ticks value
// the counter runs at 1 MHz
return (low | high);

*/
return 0;
}

/// \cond INTERNAL
Expand All @@ -423,6 +426,7 @@ namespace gd32vf103c8 {

#ifdef _HWLIB_ONCE

/*
// If hwlib gets to cpp20 minimum make this consteval.
constexpr uint32_t calculateBoutRate(long long bout) {
long long fck = 64000000; // PCLK2 is getting 64 MHz
Expand All @@ -433,7 +437,7 @@ namespace gd32vf103c8 {
uint32_t baudrateReg = mantissa<<4u | devider;
return baudrateReg;
}

*/
void uart_init() {
static bool init_done = false;
if (init_done) {
Expand All @@ -448,47 +452,42 @@ namespace gd32vf103c8 {
GPIOA->CRH &= ~(GPIO_CRH_CNF9 | GPIO_CRH_MODE9); // reset PA9
GPIOA->CRH &= ~(GPIO_CRH_CNF10 | GPIO_CRH_MODE10); // reset PA10

GPIOA->CRH |= GPIO_CRH_MODE9_1 | GPIO_CRH_MODE9_0; // 0b11 50MHz output
GPIOA->CRH |= GPIO_CRH_CNF9_1; // PA9: output @ 50MHz - Alt-function Push-pull
GPIOA->CRH |= GPIO_CRH_CNF10_0; // PA10 RX - Mode = 0b00 (input) - CNF = 0b01 (input floating)
USART1->BRR = calculateBoutRate(HWLIB_BAUDRATE);
// GPIOA->CRH |= GPIO_CRH_MODE9_1 | GPIO_CRH_MODE9_0; // 0b11 50MHz output
// GPIOA->CRH |= GPIO_CRH_CNF9_1; // PA9: output @ 50MHz - Alt-function Push-pull
// GPIOA->CRH |= GPIO_CRH_CNF10_0; // PA10 RX - Mode = 0b00 (input) - CNF = 0b01 (input floating)
// USART1->BRR = calculateBoutRate(HWLIB_BAUDRATE);
// configure USART1 registers
USART1->CR1 = USART_CR1_TE | USART_CR1_RE | USART_CR1_UE;
// USART1->CR1 = USART_CR1_TE | USART_CR1_RE | USART_CR1_UE;

}


bool uart_char_available() {
uart_init();
return (USART1->SR & USART_SR_RXNE_Msk);
// return (USART1->SR & USART_SR_RXNE_Msk);
return 0;
}

char uart_getc() {
// uart_init() is not needed because uart_char_available does that
while (!uart_char_available()) {
hwlib::background::do_background_work();
}
return USART1->DR;
// return USART1->DR;
return 0;
}

void uart_putc(char c) {
uart_init();
while (!(USART1->SR & USART_SR_TXE_Msk)) {
hwlib::background::do_background_work();
}
USART1->DR = c;
// while (!(USART1->SR & USART_SR_TXE_Msk)) {
// hwlib::background::do_background_work();
// }
// USART1->DR = c;
}


#endif

}; // end namespace gd32vf103c8

namespace hwlib {

namespace target = ::gd32vf103c8;
const auto target_chip = target_chips::gd32vf103c8;

};
}; // end namespace gd32vf103xx

#endif // #ifdef HWLIB_GD32VF103XX_H
100 changes: 98 additions & 2 deletions library/targets/hwlib-longan-nano.hpp
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Original file line number Diff line number Diff line change
Expand Up @@ -14,12 +14,108 @@
#ifndef HWLIB_LONGAN_NANO_H
#define HWLIB_LONGAN_NANO_H

#include HWLIB_INCLUDE( hwlib-gd32vf103c8.hpp )
#include HWLIB_INCLUDE(../hwlib-all.hpp)

namespace gd32vf103xx {

/// GPIO pin names
enum class pins {
a0, a1, a2, a3, a4, a5, a6, a7, a8, a9, a10, a11, a12, a13, a14, a15,
b0, b1, b2, b3, b4, b5, b6, b7, b8, b9, b10, b11, b12, b13, b14, b15,
c0, c1, c2, c3, c4, c5, c6, c7, c8, c9, c10, c11, c12, c13, c14, c15,
led,
/// \cond INTERNAL
SIZE_THIS_IS_NOT_A_PIN
/// \endcond
};

/// \cond INTERNAL
struct pin_info_type {
uint8_t port;
uint8_t pin;
};

const HWLIB_WEAK pin_info_type &pin_info(pins name) {

static const pin_info_type pin_info_array[(int) pins::SIZE_THIS_IS_NOT_A_PIN] = {
{ 0, 0 }, // a0
{ 0, 1 }, // a1
{ 0, 2 }, // a2
{ 0, 3 }, // a3
{ 0, 4 }, // a4
{ 0, 5 }, // a5
{ 0, 6 }, // a6
{ 0, 7 }, // a7

{ 0, 8 }, // a8
{ 0, 9 }, // a9
{ 0, 10 }, // a10
{ 0, 11 }, // a11
{ 0, 12 }, // a12
{ 0, 13 }, // a13
{ 0, 14 }, // a14
{ 0, 15 }, // a15

{ 1, 0 }, // b0
{ 1, 1 }, // b1
{ 1, 2 }, // b2
{ 1, 3 }, // b3
{ 1, 4 }, // b4
{ 1, 5 }, // b5
{ 1, 6 }, // b6
{ 1, 7 }, // b7

{ 1, 8 }, // b8
{ 1, 9 }, // b9
{ 1, 10 }, // b10
{ 1, 11 }, // b11
{ 1, 12 }, // b12
{ 1, 13 }, // b13
{ 1, 14 }, // b14
{ 1, 15 }, // b15

{ 2, 0 }, // c0
{ 2, 1 }, // c1
{ 2, 2 }, // c2
{ 2, 3 }, // c3
{ 2, 4 }, // c4
{ 2, 5 }, // c5
{ 2, 6 }, // c6
{ 2, 7 }, // c7

{ 2, 8 }, // c8
{ 2, 9 }, // c9
{ 2, 10 }, // c10
{ 2, 11 }, // c11
{ 2, 12 }, // c12
{ 2, 13 }, // c13
{ 2, 14 }, // c14
{ 2, 15 }, // c15

};

uint_fast8_t n = static_cast< uint_fast8_t>( name );
if (n >= static_cast< uint_fast8_t>( pins::SIZE_THIS_IS_NOT_A_PIN )) {
HWLIB_PANIC_WITH_LOCATION;
}
return pin_info_array[ n ];

}

/// \endcond

}; // end namespace gd32vf103xx

#include HWLIB_INCLUDE( hwlib-gd32vf103xx.hpp )

namespace gd32vf103c8 = ::gd32vf103xx;

namespace hwlib {

namespace target = ::gd32vf103c8;
const auto target_chip = target_chips::gd32vf103c8;
const auto target_board = target_boards::longan_nano;

};
};

#endif // #ifdef HWLIB_LONGAN_NANO_H
3 changes: 3 additions & 0 deletions todo.md
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Original file line number Diff line number Diff line change
@@ -0,0 +1,3 @@
ToDo list
- longan nano: pin list, all pins, clock-104, systick, adc, dac, uart, uart download, SWI download??, oled, doxygen
- split targets into base, chips, and boards?

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