Releases: D-TACQ/AFHBA404
June 2023 #2
NO AI?. NO VI, generate empty stub. On branch master modified: HAPI/lsafhba.py
June 2023
March 2023
Proven to work with 3 AFHBA404 modules.
With working WR Example
Control a WR enabled UUT
Our test unit:
cat ACQPROC/configs/acq2106_wr_AI32.json
{
"AFHBA": {
"DEVNUM": 0,
"UUT": [
{ "name" : "acq2106_119",
"type": "pcs",
"sync_role": "master",
"VI" : {
"AI16" : 32,
"SP32" : 16
}
}
]
}
}Medley : edit to suit
[dt100@hoth AFHBA404]$ cat ACQPROC/configs/acq2106_wr_AI32_AO32_DIO32.json
{
"AFHBA": {
"DEVNUM": 0,
"UUT": [
{ "name" : "acq2106_119",
"type": "pcs",
"sync_role": "master",
"VI" : {
"AI16" : 32,
"DI32" : 1,
"SP32" : 15
},
"VO" : {
"AO16" : 32,
"DO32 : 1
}
}
]
}
}LLC with WR
prefer to use full pathnames rather than change of dir modified: scripts/acqproc_multi.sh
GPU Support final
v2.1 Merge triton:PROJECTS/AFHBA404
May 2021 : GPU support
compiles two ways:
make : regular x86 host
GPU=1 make : GPU nb, GPU requires an Xeon x86_64 host with intel_iommu=1; we tested with an NVidia TESLA GPU
fix race condition in acqproc_config_freerunning_acq435
v1.3 wait for CONTINUOUS_STATE to be ARM before proceeding, avoid trigger …
October 2020 #2
BUG Fix for rtm-t-stream-disk handle_buffer real time feed - was always buffer 0..
Updates to Thomson/ Sample On Demand.
Enhancement: patch to correct AO MUX mapping
scp ACQ2106_TOP_40_40_ff_ff_ff_ff_9011_WR.bit.gz root@acq2106_085:/tmp
on acq2106_085:
sha1sum ACQ2106_TOP_40_40_ff_ff_ff_ff_9011_WR.bit.gz # check with value below
mv /mnt/ACQ2106_TOP_40_40_ff_ff_ff_ff_9011_WR.bit.gz __ACQ210_TOP_40_40_ff_ff_ff_ff_9011_WR.bit.gz
mv /tmp/ACQ2106_TOP_40_40_ff_ff_ff_ff_9011_WR.bit.gz /mnt
sync;sync;reboot
sha1sum ACQ2106_TOP_40_40_ff_ff_ff_ff_9011_WR.bit.gz
b28b95261038dfc7874c245d204d2939426eb374 ACQ2106_TOP_40_40_ff_ff_ff_ff_9011_WR.bit.gz
AFHBA404 v1.0
Supports ABN for N > 20
a34fbbd
ABN mode now available for LLC with 256 buffers. See ACQPROC for details.
Also, doxygen inline code doc output now supported. From top level, run "doxygen".