Roundoff-level mods of prep_glc_map_lnd2glc#633
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This cast to real shouldn't be done since we are assigning an r8 to an r8.
The point of this is to make some minimal changes needed to get bit-for-bit results with an upcoming refactor, in which the elevation factors will be computed separately.
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Reassigning this to @Katetc as reviewer (rather than @mvertens ) because I just went through it with her (and I don't think this needs multiple reviews). @Katetc - here are some cases if you want to look more closely at the differences: /glade/derecho/scratch/sacks/ERS_Ly7.f09_g17_gris4.T1850Gg.derecho_intel.GC.20260223_065655_ox3af6 /glade/derecho/scratch/sacks/SMS_D_Ly1.f09_g17_ais8.T1850Ga.derecho_gnu.GC.20260223_065655_ox3af6 I compared against baselines in /glade/campaign/cesm/cesmdata/cesm_baselines/cesm3_0_alpha08e |
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Welll, it is interesting to look at where the results changed here. The smb saw almost no difference, but temperatures outside of the icesheet and along the margins had some pretty random noise introduced. This does seem to have some impact on thickness and velocity after a few years, but the differences are small. I'm going to tag @whlipscomb here just so that he is aware. I think the tag can go ahead. |
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Thanks very much for your careful look, @Katetc ! |
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Oh, I just realized that the bigger potential changes in this PR – the removal of the cast from r8 to r4 real – only apply in bare land regions, so it makes sense that you're seeing big differences outside of the ice sheet. I'd be curious what you see if you change the scale so smaller diffs (e.g., order 1e-13) show up: I expect double-precision-roundoff-level diffs everywhere in addition to the single-precision-roundoff-level diffs outside the ice sheet. |
Using strategy 'ours' to ignore changes coming from main (which are from ESCOMP#633) because they are already incorporated into this branch.
For water tracers: Add handling of rank-3 fields and refactor med_phases_prep_glc_map_lnd2glc ### Description of changes Two sets of changes that will be needed for water tracers - and in particular, for the tracer version of Flgl_qice_elev, which will be the first field in CMEPS that has two ungridded dimensions: (1) Extend various methods to support rank-3 fields (2) Refactor med_phases_prep_glc_map_lnd2glc to pre-compute vertical interpolation weights; this will be helpful when we introduce Flgl_qice_elev_wtracers to avoid duplicating this calculation of vertical interpolation weights between the non-tracer (rank-2 on the lnd grid and rank-1 on the glc grid) and tracer (rank-3 on the lnd grid and rank-2 on the glc grid) fields. ### Specific notes Contributors other than yourself, if any: Claude Code did a lot of the writing of this code, but I have reviewed it all carefully CMEPS Issues Fixed (include github issue #): Are changes expected to change answers? (specify if bfb, different at roundoff, more substantial) bfb when using #633 as a baseline Any User Interface Changes (namelist or namelist defaults changes)? No ### Testing performed In the context of cesm3_0_alpha08e, ran: (1) aux_glc on derecho plus a few extra tests, with comparisons against baselines generated with #633 . The extra tests beyond aux_glc were: ``` SMS_Ly2.f09_g17_gris20.T1850Gg.derecho_intel SMS_Ld5.f10_f10_ais8gris4_mg37.I1850Clm50SpGag.derecho_intel.cism-test_coupling SMS_Lm13.f10_f10_mg37.I1850Clm50SpG.derecho_intel ERS_Ld5.ne30pg3_t232.B1850C_LTso.derecho_intel.allactive-decstart ERS_Ld5.ne30pg3_t232.BHISTC_LTso.derecho_intel.allactive-decstart ``` All tests passed and were bit-for-bit, except for this failure that also failed in the baseline: `FAIL NCK_Ly3.f09_g17_gris20.T1850Gg.derecho_gnu COMPARE_base_multiinst` (2) Full prealpha testing on derecho and izumi with comparison against cesm3_0_alpha08e Tests passed except for tests that also failed in the baselines or seemed to have passed due to tweaks made in the baseline (e.g., increasing wallclock time for `SUB_D_Ln9.ne3pg3_ne3pg3_mt232.FHIST.izumi_nag.cam-outfrq9s`). Baseline failures were all as expected (except that a few B compset tests failed baseline comparison due to a difference in which cpl.hx.ww3 files were present in the run vs. baseline, which presumably is due to something outside of this PR): ``` ERS_Ld5.ne30pg3_t232.B1850C_LTso.derecho_intel.allactive-decstart ERS_Ld5.ne30pg3_t232.BHISTC_LTso.derecho_intel.allactive-decstart ERS_Ly7.f09_g17_gris4.T1850Gg.derecho_intel MULTINOAIS_Ly2.f10_f10_ais8gris4_mg37.I1850Clm50SpRsGag.derecho_intel.cism-change_params SMS_Lm13.f10_f10_mg37.I1850Clm50SpG.derecho_intel SMS_D_Ly1.f09_g17_ais8.T1850Ga.derecho_gnu SMS_D_Ld5_P24x1.f10_f10_ais8gris4_mg37.I1850Clm50SpGag.izumi_nag.cism-test_coupling ``` Note that I showed that these differences go away when comparing against baselines generated with #633 , for similar or identical tests. So I think it's safe to conclude that this is bit-for-bit with #633 .


Description of changes
Two roundoff-level modifications of prep_glc_map_lnd2glc to pave the way for a larger set of changes. I wanted to demonstrate that the larger set of changes is bit-for-bit, so here I have implemented the minimal set of answer-changing mods needed to get bit-for-bit results when running tests on my upcoming PR.
Specific notes
Contributors other than yourself, if any:
CMEPS Issues Fixed (include github issue #):
Are changes expected to change answers? (specify if bfb, different at roundoff, more substantial) - Single-precision-roundoff-level changes in configurations with CISM or DGLC (though diffs only show up in a small number of tests with DGLC)
Any User Interface Changes (namelist or namelist defaults changes)? No
Testing performed
In the context of cesm3_0_alpha08e, ran aux_glc plus these additional tests:
Tests passed (other than
FAIL NCK_Ly3.f09_g17_gris20.T1850Gg.derecho_gnu COMPARE_base_multiinstwhich is documented as failing in the CISM ChangeLog). I didn't perform baseline comparisons for most tests, but I expect baseline comparisons to fail for most / all of these tests.I did look at baseline comparisons for
ERS_Ly7.f09_g17_gris4.T1850Gg.derecho_intelandSMS_D_Ly1.f09_g17_ais8.T1850Ga.derecho_gnu. Looking at the cpl hist files, these had just single-precision-roundoff-level diffs, as expected. ForERS_Ly7.f09_g17_gris4.T1850Gg.derecho_intel, for example, these were:Based on testing on my upcoming branch - which effectively includes these changes (along with many other changes) - differences only show up in:
ERS_Ld5.ne30pg3_t232.B1850C_LTso.derecho_intel.allactive-decstartandERS_Ld5.ne30pg3_t232.BHISTC_LTso.derecho_intel.allactive-decstart)