AP_HAL_ChibiOS: increase clock frequency for QSPI

Icatme · Sep 1, 2021 · 1eb318c · 1eb318c
1 parent 2dc51d9
commit 1eb318c
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Showing 2 changed files with 4 additions and 4 deletions.
diff --git a/libraries/AP_HAL_ChibiOS/hwdef/H757I_EVAL/hwdef-bl.dat b/libraries/AP_HAL_ChibiOS/hwdef/H757I_EVAL/hwdef-bl.dat
@@ -74,7 +74,7 @@ PG6 QUADSPI_BK1_NCS QUADSPI1
 PB2 QUADSPI_CLK QUADSPI1
 
 # IFace     Device Name     Bus      QSPI Mode     Clk Freq  Size (Pow2)  NCS Delay
-QSPIDEV       mt25q       QUADSPI1      MODE1       50*MHZ      24            2
+QSPIDEV       mt25q       QUADSPI1      MODE1       120*MHZ      24            8
 
 PB13 VBUS INPUT OPENDRAIN
 

diff --git a/libraries/AP_HAL_ChibiOS/hwdef/H757I_EVAL/hwdef.dat b/libraries/AP_HAL_ChibiOS/hwdef/H757I_EVAL/hwdef.dat
@@ -23,10 +23,10 @@ APJ_BOARD_ID 146
 FLASH_SIZE_KB 2048
 
 # setup build for a peripheral firmware
-env AP_PERIPH 1
+# env AP_PERIPH 1
 
-define HAL_BUILD_AP_PERIPH
-define HAL_NO_GCS
+# define HAL_BUILD_AP_PERIPH
+# define HAL_NO_GCS
 
 # bootloader is installed at zero offset
 FLASH_RESERVE_START_KB 128