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IPC sensitivity to cache line size
This page is maintained by Alexandr Misevich
What is cache line size, what are expected effects and drawbacks? A cache is a hardware or software component that stores data so future requests for that data can be served faster; the data stored in a cache might be the result of an earlier computation, or the duplicate of data stored elsewhere. A cache hit occurs when the requested data can be found in a cache, while a cache miss occurs when it cannot. Cache hits are served by reading data from the cache, which is faster than recomputing a result or reading from a slower data store; thus, the more requests can be served from the cache, the faster the system performs.
What cache do we study, what trace do we use? How can one reproduce your results?
Provide table and performance You may also do one more study, varying cache miss latency as well
Your summary on your study
MIPT-V / MIPT-MIPS — Cycle-accurate pre-silicon simulation.