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Supported MIPS instructions
Pavel I. Kryukov edited this page Feb 28, 2018
·
31 revisions
Unfortunately, MIPT-MIPS supports reduced subset of MIPS instructions at the moment.
The list of unsupported instructions goes first as it may be more important. If instruction is not listed as supported or unsupported, it is not supported.
Accumulating multiplication (#282)
madd
maddu
msub
msubu
Unaligned memory access (#132)
lwl
lwr
swl
swr
System call (#122)
syscall
break
Double word arithmetic instructions (#214)
dadd
daddi
daddiu
daddu
dclo
dclz
ddiv
ddivu
dmult
dmultu
dsll
dsllv
dsll32
dsra
dsra32
dsrav
dsrl
dsrl32
dsrlv
dsub
dsubu
Double word memory instructions (#215)
ld
ldl
ldr
lld
lwu
scd
sd
sdl
sdr
MIPS IV Prefetches (#235)
pref
MIPS II conditional traps (#130)
These instructions don't cause actual traps now, they print a message to the screen
teq
teqi
tge
tgei
tgeiu
tgeu
tlt
tlti
tltiu
tltu
tne
tnei
MIPS II likely branches (#91)
These branches operate as usual branches, but they don't provide any hint to BPU
beql
bgezl
bgezall
bgtzl
blezl
bltzl
bltzall
bnel
No atomicity warranty provided
ll
sc
add
addi
addiu
addu
and
andi
beq
bgez
bgezal
bgtz
blez
bltz
bltzal
bne
clo
clz
div
divu
j
jal
jalr
jr
lb
lbu
lh
lhu
lui
lw
mfhi
mflo
movn
movz
mthi
mtlo
mul
mult
multu
nor
or
ori
sb
sh
sll
sllv
slt
slti
sltiu
sltu
sra
srav
srl
srlv
sub
subu
sw
xor
xori
MIPT-V / MIPT-MIPS — Cycle-accurate pre-silicon simulation.