Supported MIPS instructions

Unfortunately, MIPT-MIPS supports reduced subset of MIPS instructions at the moment.

The list of unsupported instructions goes first as it may be more important. If instruction is not listed as supported or unsupported, it is not supported.

Unsupported Instructions

Multiplication/Division (#21)

• mult
• multu
• div
• divu
• mthi
• mtlo
• mfhi
• mflo

REGIMM branches and traps (#93)

• bltz
• bgez
• bltzal
• bgezal
• bltzl
• bgezl
• bltzall
• bgezall
• tgei
• tgeiu
• tlti
• tltiu

Unaligned memory access (#132)

• lwl
• lwr
• swl
• swr

MIPS32 bit counts (#137)

• clo
• clz

System call (#122)

• syscall
• break

Double word arithmetic instructions (#214)

• dadd
• daddi
• daddiu
• daddu
• ddiv
• ddivu
• dmult
• dmultu
• dsll
• dsllv
• dsll32
• dsra
• dsra32
• dsrav
• dsrl
• dsrl32
• dsrlv
• dsub
• dsubu

Double word memory instructions (#215)

• ld
• ldl
• ldr
• lwu
• sd
• sdl
• sdr

Atomic operations

• ll
• lld
• sc
• scd

MIPS IV Prefetches (#235)

• pref

Partially supported instructions

MIPS II conditional traps (#130)

These instructions don't cause actual traps now, they print a message to the screen

• tge
• tgeu
• tlt
• tltu
• teq
• tne

MIPS II likely branches (#91)

These branches operate as usual branches, but they don't provide any hint to BPU

• beql
• bnel
• blezl
• bgtzl

Supported Instructions

• add
• addi
• addiu
• addu
• and
• andi
• beq
• bgtz
• blez
• bne
• j
• jal
• jalr
• jr
• lb
• lbu
• lh
• lhu
• lui
• lw
• movn
• movz
• nor
• or
• ori
• sb
• sh
• sll
• sllv
• slt
• slti
• sltiu
• sltu
• sra
• srav
• srl
• srlv
• sub
• subu
• sw
• xor
• xori