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Supported MIPS instructions
Pavel I. Kryukov edited this page Sep 28, 2017
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31 revisions
Unfortunately, MIPT-MIPS supports reduced subset of MIPS instructions at the moment.
We will start a list of unsupported instructions as it may be more important. If instruction is not listed as supported or unsupported, it is not supported.
Multiplication/Division (#21)
mult
multu
div
divu
mthi
mtlo
mfhi
mflo
REGIMM branches (#93)
bltz
bgez
bltzal
bgezal
Unaligned memory access (#132)
lwl
lwr
swl
swr
MIPS32 bit counts (#137)
clo
clz
MIPS IV conditional moves (#92)
movn
movz
System call (#122)
syscall
break
MIPS II conditional traps (#130)
These instructions does not cause actual traps now, they print a message to the screen
tge
tgeu
tlt
tltu
teq
tne
MIPS II likely branches (#91)
These branches operate as usual branches, but they don't provide any hint to BPU
beql
bnel
blezl
bgtzl
lui
add
addu
addi
addiu
sub
subu
sll
srl
sra
sllv
srlv
srav
slt
sltu
slti
sltiu
and
or
xor
nor
andi
ori
xori
beq
bne
blez
bgtz
j
jal
jr
jalr
lb
lh
lw
lbu
lhu
sb
sh
sw
MIPT-V / MIPT-MIPS — Cycle-accurate pre-silicon simulation.