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Supported MIPS instructions
Pavel I. Kryukov edited this page Sep 29, 2017
·
31 revisions
Unfortunately, MIPT-MIPS supports reduced subset of MIPS instructions at the moment.
We begin with a list of unsupported instructions as it may be more important. If instruction is not listed as supported or unsupported, it is not supported.
Multiplication/Division (#21)
mult
multu
div
divu
mthi
mtlo
mfhi
mflo
REGIMM branches (#93)
bltz
bgez
bltzal
bgezal
Unaligned memory access (#132)
lwl
lwr
swl
swr
MIPS32 bit counts (#137)
clo
clz
MIPS IV conditional moves (#92)
movn
movz
System call (#122)
syscall
break
MIPS II conditional traps (#130)
These instructions don't cause actual traps now, they print a message to the screen
tge
tgeu
tlt
tltu
teq
tne
MIPS II likely branches (#91)
These branches operate as usual branches, but they don't provide any hint to BPU
beql
bnel
blezl
bgtzl
add
addi
addiu
addu
and
andi
beq
bgtz
blez
bne
j
jal
jalr
jr
lb
lbu
lh
lhu
lui
lw
nor
or
ori
sb
sh
sll
sllv
slt
slti
sltiu
sltu
sra
srav
srl
srlv
sub
subu
sw
xor
xori
MIPT-V / MIPT-MIPS — Cycle-accurate pre-silicon simulation.