Revert iommu patch series from 24.04_linux-nvidia-6.14-next

drivers/pci/ats.c

@@ -416,9 +416,7 @@ int pci_enable_pasid(struct pci_dev *pdev, int features)
 	if (!pasid)
 		return -EINVAL;
 
-	if (!pci_acs_path_enabled(pdev, NULL,
-				  PCI_ACS_RR | PCI_ACS_UF | PCI_ACS_USP_MT_RR |
-				  PCI_ACS_DSP_MT_RR | PCI_ACS_UNCLAIMED_RR))
+	if (!pci_acs_path_enabled(pdev, NULL, PCI_ACS_RR | PCI_ACS_UF))
 		return -EINVAL;
 
 	pci_read_config_word(pdev, pasid + PCI_PASID_CAP, &supported);

drivers/pci/pci.c

@@ -957,7 +957,6 @@ static void __pci_config_acs(struct pci_dev *dev, struct pci_acs *caps,
 			     const char *p, const u16 acs_mask, const u16 acs_flags)
 {
 	u16 flags = acs_flags;
-	u16 supported_flags;
 	u16 mask = acs_mask;
 	char *delimit;
 	int ret = 0;
@@ -1002,14 +1001,8 @@ static void __pci_config_acs(struct pci_dev *dev, struct pci_acs *caps,
 			}
 		}
 
-		supported_flags = PCI_ACS_SV | PCI_ACS_TB | PCI_ACS_RR |
-				  PCI_ACS_CR | PCI_ACS_UF | PCI_ACS_EC |
-				  PCI_ACS_DT;
-		if (caps->cap & PCI_ACS_ENHANCED)
-			supported_flags |= PCI_ACS_USP_MT_RR |
-					   PCI_ACS_DSP_MT_RR |
-					   PCI_ACS_UNCLAIMED_RR;
-		if (mask & ~supported_flags) {
+		if (mask & ~(PCI_ACS_SV | PCI_ACS_TB | PCI_ACS_RR | PCI_ACS_CR |
+			    PCI_ACS_UF | PCI_ACS_EC | PCI_ACS_DT)) {
 			pci_err(dev, "Invalid ACS flags specified\n");
 			return;
 		}
@@ -1069,14 +1062,6 @@ static void pci_std_enable_acs(struct pci_dev *dev, struct pci_acs *caps)
 	/* Upstream Forwarding */
 	caps->ctrl |= (caps->cap & PCI_ACS_UF);
 
-	/*
-	 * USP/DSP Memory Target Access Control and Unclaimed Request Redirect
-	 */
-	if (caps->cap & PCI_ACS_ENHANCED) {
-		caps->ctrl |= PCI_ACS_USP_MT_RR | PCI_ACS_DSP_MT_RR |
-			      PCI_ACS_UNCLAIMED_RR;
-	}
-
 	/* Enable Translation Blocking for external devices and noats */
 	if (pci_ats_disabled() || dev->external_facing || dev->untrusted)
 		caps->ctrl |= (caps->cap & PCI_ACS_TB);
@@ -3602,52 +3587,6 @@ void pci_configure_ari(struct pci_dev *dev)
 	}
 }
 
-
-/*
- * The spec is not clear what it means if the capability bit is 0. One view is
- * that the device acts as though the ctrl bit is zero, another view is the
- * device behavior is undefined.
- *
- * Historically Linux has taken the position that the capability bit as 0 means
- * the device supports the most favorable interpritation of the spec - ie that
- * things like P2P RR are always on. As this is security sensitive we expect
- * devices that do not follow this rule to be quirked.
- *
- * ACS Enhanced eliminated undefined areas of the spec around MMIO in root ports
- * and switch ports. If those ports have no MMIO then it is not relavent.
- * PCI_ACS_UNCLAIMED_RR eliminates the undefined area around an upstream switch
- * window that is not fully decoded by the downstream windows.
- *
- * This takes the same approach with ACS Enhanced, if the device does not
- * support it then we assume the ACS P2P RR has all the enhanced behaviors too.
- *
- * Due to ACS Enhanced bits being force set to 0 by older Linux kernels, and
- * those values would break old kernels on the edge cases they cover, the only
- * compatible thing for a new device to implement is ACS Enhanced supported with
- * the control bits (except PCI_ACS_IORB) wired to follow ACS_RR.
- */
-static u16 pci_acs_ctrl_mask(struct pci_dev *pdev, u16 hw_cap)
-{
-	/*
-	 * Egress Control enables use of the Egress Control Vector which is not
-	 * present without the cap.
-	 */
-	u16 mask = PCI_ACS_EC;
-
-	mask = hw_cap & (PCI_ACS_SV | PCI_ACS_TB | PCI_ACS_RR |
-				      PCI_ACS_CR | PCI_ACS_UF | PCI_ACS_DT);
-
-	/*
-	 * If ACS Enhanced is supported the device reports what it is doing
-	 * through these bits which may not be settable.
-	 */
-	if (hw_cap & PCI_ACS_ENHANCED)
-		mask |= PCI_ACS_IORB | PCI_ACS_DSP_MT_RB | PCI_ACS_DSP_MT_RR |
-			PCI_ACS_USP_MT_RB | PCI_ACS_USP_MT_RR |
-			PCI_ACS_UNCLAIMED_RR;
-	return mask;
-}
-
 static bool pci_acs_flags_enabled(struct pci_dev *pdev, u16 acs_flags)
 {
 	int pos;
@@ -3657,9 +3596,15 @@ static bool pci_acs_flags_enabled(struct pci_dev *pdev, u16 acs_flags)
 	if (!pos)
 		return false;
 
+	/*
+	 * Except for egress control, capabilities are either required
+	 * or only required if controllable.  Features missing from the
+	 * capability field can therefore be assumed as hard-wired enabled.
+	 */
 	pci_read_config_word(pdev, pos + PCI_ACS_CAP, &cap);
+	acs_flags &= (cap | PCI_ACS_EC);
+
 	pci_read_config_word(pdev, pos + PCI_ACS_CTRL, &ctrl);
-	acs_flags &= pci_acs_ctrl_mask(pdev, cap);
 	return (ctrl & acs_flags) == acs_flags;
 }
 

drivers/pci/pci.h

@@ -714,7 +714,6 @@ int pci_dev_specific_acs_enabled(struct pci_dev *dev, u16 acs_flags);
 int pci_dev_specific_enable_acs(struct pci_dev *dev);
 int pci_dev_specific_disable_acs_redir(struct pci_dev *dev);
 int pcie_failed_link_retrain(struct pci_dev *dev);
-bool pci_dev_specific_mfd_isolated(struct pci_dev *dev);
 #else
 static inline int pci_dev_specific_acs_enabled(struct pci_dev *dev,
 					       u16 acs_flags)
@@ -733,10 +732,6 @@ static inline int pcie_failed_link_retrain(struct pci_dev *dev)
 {
 	return -ENOTTY;
 }
-static inline bool pci_dev_specific_mfd_isolated(struct pci_dev *dev)
-{
-	return false;
-}
 #endif
 
 /* PCI error reporting and recovery */