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gmahadevan
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Upstream/dynamic tables smbios #6
gmahadevan
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NVIDIA:main-edk2-stable202205
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gmahadevan:upstream/DynamicTablesSmbios
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The python BaseTools/Edk2ToolsBuild.py creates files in BaseTools/BaseToolsBuild and should be ignored. Change-Id: I9af2f9a798858087ef6b69d72d58433ee65ae6e3 Signed-off-by: Jeff Brasen <[email protected]> Reviewed-by: Liming Gao <[email protected]> Reviewed-on: https://git-master.nvidia.com/r/c/3rdparty/edk2/+/2738035 Reviewed-by: svc-sw-mobile-l4t <[email protected]> Reviewed-by: svcacv <[email protected]> GVS: Gerrit_Virtual_Submit
The translation value in ACPI should be the difference between the CPU and PCIe address. Signed-off-by: Jeff Brasen <[email protected]> Change-Id: I3e58d10b9940ef9e99853c84128c03fea8effdb7 Reviewed-by: Pierre Gondois <[email protected]> Reviewed-on: https://git-master.nvidia.com/r/c/3rdparty/edk2/+/2735153 Reviewed-by: svcacv <[email protected]> Reviewed-by: Vidya Sagar <[email protected]> Reviewed-by: Ashish Singhal <[email protected]> GVS: Gerrit_Virtual_Submit
Add support for PCIe devices with UID > 0xF. This is done by using the next value in the name so PCI5, PC26, etc Signed-off-by: Jeff Brasen <[email protected]> Change-Id: I37f87c0ff0098862da1c735b0fa7c96516a10487 Reviewed-by: Pierre Gondois <[email protected]> Reviewed-on: https://git-master.nvidia.com/r/c/3rdparty/edk2/+/2735155 Reviewed-by: svcacv <[email protected]> Reviewed-by: Vidya Sagar <[email protected]> Reviewed-by: Ashish Singhal <[email protected]> GVS: Gerrit_Virtual_Submit
Add support library to allow for customization of _OSC and slot info. The functions in the library are unchanged, with the exception of adding PciInfo pointer to the APIs. Signed-off-by: Jeff Brasen <[email protected]> Change-Id: I8d58034d0bd1e5ffc0da914b001d0c87d6d60435 Reviewed-by: Pierre Gondois <[email protected]> Reviewed-on: https://git-master.nvidia.com/r/c/3rdparty/edk2/+/2742069 Reviewed-by: svcacv <[email protected]> Reviewed-by: Vidya Sagar <[email protected]> Reviewed-by: Ashish Singhal <[email protected]> GVS: Gerrit_Virtual_Submit
This syncs with upstream version of this patch. Add support library to allow for customization of _OSC and slot info. The functions in the library are unchanged, with the exception of adding PciInfo pointer to the APIs. Signed-off-by: Jeff Brasen <[email protected]> Reviewed-by: Pierre Gondois <[email protected]> Reviewed-by: Sami Mujawar <[email protected]> Change-Id: Ic259c3f4dda23be855e769681c907249945b0ecf Reviewed-on: https://git-master.nvidia.com/r/c/3rdparty/edk2/+/2747602 Reviewed-by: svc-sw-mobile-l4t <[email protected]> Reviewed-by: svcacv <[email protected]> GVS: Gerrit_Virtual_Submit
Add APIs needed to build _DSD with different UUIDs. This is per ACPI specification 6.4 s6.2.5. Adds support for building data packages with format Package {"Name", Integer} Change-Id: Icb39be4db323cbe5320ff7c08ecde64ef32b882f Signed-off-by: Jeff Brasen <[email protected]> Reviewed-on: https://git-master.nvidia.com/r/c/3rdparty/edk2/+/2752251 Reviewed-by: svcacv <[email protected]> Reviewed-by: svc-sw-mobile-l4t <[email protected]> GVS: Gerrit_Virtual_Submit
Current code will generate duplicate UID if there are nested processor containers in the topology. For example if there is a socket/cluster/core layout. Change references to processor container from cluster to be more accurate on what is being created. Signed-off-by: Jeff Brasen <[email protected]> Change-Id: Ied904e39951d250de31320890f3e3794a73e0cea Reviewed-on: https://git-master.nvidia.com/r/c/3rdparty/edk2/+/2761910 Reviewed-by: svcacv <[email protected]> Reviewed-by: svc-sw-mobile-l4t <[email protected]> GVS: Gerrit_Virtual_Submit <[email protected]>
Expose the UID value to GeneratePciSlots(). This is needed for some cases for example: https://docs.microsoft.com/en-us/windows-hardware/drivers/pci/dsd-for-pcie-root-ports#identifying-externally-exposed-pcie-root-ports Name (_DSD, Package () { ToUUID("EFCC06CC-73AC-4BC3-BFF0-76143807C389"), Package () { Package (2) {"ExternalFacingPort", 1}, Package (2) {"UID", 0}, } }) Signed-off-by: Jeff Brasen <[email protected]> Change-Id: I6d74228b7c733891030bb35138a5264233c84d72 Reviewed-on: https://git-master.nvidia.com/r/c/3rdparty/edk2/+/2752664 Reviewed-by: svcacv <[email protected]> Reviewed-by: svc-sw-mobile-l4t <[email protected]> GVS: Gerrit_Virtual_Submit <[email protected]>
Add the SMBIOS Table generator code to the DynamicTablesPkg. This change includes adding new logic to the DynamicTableManager to process and add SMBIOS tables and augmenting the existing SMBIOS Factory generator to include installing multiple SMBIOS tables. Also included is running the SMBIOS and ACPI table generation as part of the SMBIOS and ACPI protocol GUID callback notifications respectively. Change-Id: I41a0a7e67efdfddedb450d8c13f38cb7439bb50e Signed-off-by: Girish Mahadevan <[email protected]>
Add a new library to register the SMBIOS Type17 Table Generator Library. Change-Id: Ibdad0fd1533219d09d781e802e777b1644eea833 Signed-off-by: Girish Mahadevan <[email protected]>
Duplicate of #10 |
jgarver
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Feb 7, 2024
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4539 Bug Details: PixieFail Bug #6 CVE-2023-45234 CVSS 8.3 : CVSS:3.1/AV:A/AC:L/PR:N/UI:N/S:U/C:H/I:L/A:H CWE-119 Improper Restriction of Operations within the Bounds of a Memory Buffer Buffer overflow when processing DNS Servers option in a DHCPv6 Advertise message Change Overview: Introduces a function to cache the Dns Server and perform sanitizing on the incoming DnsServerLen to ensure that the length is valid > + EFI_STATUS > + PxeBcCacheDnsServerAddresses ( > + IN PXEBC_PRIVATE_DATA *Private, > + IN PXEBC_DHCP6_PACKET_CACHE *Cache6 > + ) Additional code cleanup Cc: Saloni Kasbekar <[email protected]> Cc: Zachary Clark-williams <[email protected]> Signed-off-by: Doug Flick [MSFT] <[email protected]> Reviewed-by: Saloni Kasbekar <[email protected]>
jgarver
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Feb 9, 2024
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4539 PixieFail Bug #6 CVE-2023-45234 CVSS 8.3 : CVSS:3.1/AV:A/AC:L/PR:N/UI:N/S:U/C:H/I:L/A:H CWE-119 Improper Restriction of Operations within the Bounds of a Memory Buffer Buffer overflow when processing DNS Servers option in a DHCPv6 Advertise message Change Overview: Introduces a function to cache the Dns Server and perform sanitizing on the incoming DnsServerLen to ensure that the length is valid > + EFI_STATUS > + PxeBcCacheDnsServerAddresses ( > + IN PXEBC_PRIVATE_DATA *Private, > + IN PXEBC_DHCP6_PACKET_CACHE *Cache6 > + ) Additional code cleanup Cc: Saloni Kasbekar <[email protected]> Cc: Zachary Clark-williams <[email protected]> Signed-off-by: Doug Flick [MSFT] <[email protected]> Reviewed-by: Saloni Kasbekar <[email protected]> Reviewed-by: Jeff Brasen <[email protected]> Tested-by: Jeff Brasen <[email protected]>
jgarver
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Feb 29, 2024
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4539 Bug Details: PixieFail Bug #6 CVE-2023-45234 CVSS 8.3 : CVSS:3.1/AV:A/AC:L/PR:N/UI:N/S:U/C:H/I:L/A:H CWE-119 Improper Restriction of Operations within the Bounds of a Memory Buffer Buffer overflow when processing DNS Servers option in a DHCPv6 Advertise message Change Overview: Introduces a function to cache the Dns Server and perform sanitizing on the incoming DnsServerLen to ensure that the length is valid > + EFI_STATUS > + PxeBcCacheDnsServerAddresses ( > + IN PXEBC_PRIVATE_DATA *Private, > + IN PXEBC_DHCP6_PACKET_CACHE *Cache6 > + ) Additional code cleanup Cc: Saloni Kasbekar <[email protected]> Cc: Zachary Clark-williams <[email protected]> Signed-off-by: Doug Flick [MSFT] <[email protected]> Reviewed-by: Saloni Kasbekar <[email protected]> Reviewed-by: Jeff Brasen <[email protected]> Tested-by: Jeff Brasen <[email protected]>
jgarver
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Sep 18, 2024
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4539 PixieFail Bug #6 CVE-2023-45234 CVSS 8.3 : CVSS:3.1/AV:A/AC:L/PR:N/UI:N/S:U/C:H/I:L/A:H CWE-119 Improper Restriction of Operations within the Bounds of a Memory Buffer Buffer overflow when processing DNS Servers option in a DHCPv6 Advertise message Change Overview: Introduces a function to cache the Dns Server and perform sanitizing on the incoming DnsServerLen to ensure that the length is valid > + EFI_STATUS > + PxeBcCacheDnsServerAddresses ( > + IN PXEBC_PRIVATE_DATA *Private, > + IN PXEBC_DHCP6_PACKET_CACHE *Cache6 > + ) Additional code cleanup Cc: Saloni Kasbekar <[email protected]> Cc: Zachary Clark-williams <[email protected]> Signed-off-by: Doug Flick [MSFT] <[email protected]> Reviewed-by: Saloni Kasbekar <[email protected]> Reviewed-by: Jeff Brasen <[email protected]> Tested-by: Jeff Brasen <[email protected]>
jgarver
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Oct 12, 2024
This patch does not impact functionality. It aims to clarify the synchronization flow between the BSP and APs to enhance code readability and understanding: Steps #6 and #11 are the basic synchronization requirements for all cases. Steps #1 is additional requirements if the MmCpuSyncModeTradition mode is selected. Steps #1, #2, #3, #4, #5, #7, #8, #9, and #10 are additional requirements if the system needs to configure the MTRR. Steps #9 and #10 are additional requirements if the system needs to support the mSmmDebugAgentSupport. Signed-off-by: Jiaxin Wu <[email protected]>
jgarver
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Jun 21, 2025
…eEntry This patch introduces a synchronization point between the BSP and APs to ensure all APs have entered their SMM wait-loop (while (TRUE) in APHandler ()) before the BSP calls into the SMI handler logic via gSmmCpuPrivate ->SmmCoreEntry(). Previously, the BSP would invoke ReleaseAllAPs() and immediately proceed to SmmCoreEntry() without confirming whether APs had reached the stable waiting state. If SmmStartupThisAp() was called inside the SMI handler shortly after ReleaseAllAPs(), it might lead to a race condition: APs are issued two consecutive wait signals (SmmCpuSyncWaitForBsp()). BSP sends two consecutive releases (ReleaseAllAPs() + SmmStartupThisAp()) If an AP has not yet responded to the first release, the second release may overwrite the semaphore state, and the AP might miss the notification, causing it to hang or behave unpredictably. To address this: A SmmCpuSyncWaitForAPs() is added in BSP after mmCpuPlatformHookBeforeMmiHandler() and before entering SmmCoreEntry(). A matching SmmCpuSyncReleaseBsp() is added in AP immediately after its own SmmCpuPlatformHookBeforeMmiHandler() This ensures that BSP does not enter SMI handler logic or dispatch any AP-related requests before all APs are confirmed to be idle and ready. Debug sync point markers (e.g., /// #6, #7) are updated accordingly. This change eliminates a subtle but critical race condition in multi-processor/multi-socket systems during SMM entry and improves overall synchronization safety. Signed-off-by: Wei6 Xu <[email protected]>
jgarver
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Jul 2, 2025
…eEntry This patch introduces a synchronization point between the BSP and APs to ensure all APs have entered their SMM wait-loop (while (TRUE) in APHandler ()) before the BSP calls into the SMI handler logic via gSmmCpuPrivate ->SmmCoreEntry(). Previously, the BSP would invoke ReleaseAllAPs() and immediately proceed to SmmCoreEntry() without confirming whether APs had reached the stable waiting state. If SmmStartupThisAp() was called inside the SMI handler shortly after ReleaseAllAPs(), it might lead to a race condition: APs are issued two consecutive wait signals (SmmCpuSyncWaitForBsp()). BSP sends two consecutive releases (ReleaseAllAPs() + SmmStartupThisAp()) If an AP has not yet responded to the first release, the second release may overwrite the semaphore state, and the AP might miss the notification, causing it to hang or behave unpredictably. To address this: A SmmCpuSyncWaitForAPs() is added in BSP after mmCpuPlatformHookBeforeMmiHandler() and before entering SmmCoreEntry(). A matching SmmCpuSyncReleaseBsp() is added in AP immediately after its own SmmCpuPlatformHookBeforeMmiHandler() This ensures that BSP does not enter SMI handler logic or dispatch any AP-related requests before all APs are confirmed to be idle and ready. Debug sync point markers (e.g., /// #6, #7) are updated accordingly. This change eliminates a subtle but critical race condition in multi-processor/multi-socket systems during SMM entry and improves overall synchronization safety. Signed-off-by: Wei6 Xu <[email protected]>
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Enable SMBIOS Table Generation using Dynamic Tables Package.
There are 2 commits:
3239a7b
This patch makes changes to the DynamicTableManagerDxe to install SMBIOS tables and includes a change to enable installing multiple SMBIOS tables. Also we move the SMBIOS and ACPI table installations into their respective Protocol Ready callbacks as it is possible that ACPI isn't present on all platforms and in those cases SMBIOS tables won't be installed.
5bb1334)
This patch is an example of an SMBIOS table that can be installed using DynamicTablesPkg. A new CM object describing the memory device is added to the ARM CM Object space, The library Gets the CM Object and sets up the Type17 record using the CM Object describing the memory device.