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The register in timeloop is accessible to all PEs, right? #263

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ziyuhuang123 opened this issue Apr 27, 2024 · 1 comment
Open

The register in timeloop is accessible to all PEs, right? #263

ziyuhuang123 opened this issue Apr 27, 2024 · 1 comment

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@ziyuhuang123
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The register in timeloop is accessible to all PEs, right?
@angshuman-parashar
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Are you talking about a specific hardware configuration? Timeloop has no built-in notion of a "register" or a "PE" -- these are things that a user can name when designing an architecture for Timeloop to model.

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