Hardware implementation method
In this method we have used the Verilog language to implement the Karplus Strong algorithm. The verilog code was written based on the following block diagram.
Delay line and filter were first implemented as independent modules.Later, these modules were put together in the main module.Noise burst was provided in the main module Audio signal generated by the Verilog code is written to a text file. The text file is converted to audio file using python.