Merge branch 'master' into fix-ilator-mem

PrincetonUniversity · Jun 7, 2020 · 9e45511 · 9e45511
2 parents a809d84 + 6a1d7f1
commit 9e45511
Showing 1 changed file with 2 additions and 2 deletions.
diff --git a/test/t_vtarget_gen.cc b/test/t_vtarget_gen.cc
@@ -324,8 +324,8 @@ TEST(TestVlgTargetGen, Memory) {
   vg.GenerateTargets();
 }
 
-TEST(TestVlgTargetGen,
-     DISABLED_MemoryInternal) { // test the expansion of memory
+TEST(TestVlgTargetGen, MemoryInternal) { // test the expansion of memory
+
   auto ila_model = MemorySwap::BuildSimpleSwapModel();
 
   VerilogVerificationTargetGenerator::vtg_config_t