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update gitignore
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@WanHaoRan
WanHaoRan committed Jul 19, 2024
1 parent 80163ce commit 9bf1fbc
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Showing 7 changed files with 108 additions and 44 deletions.
2 changes: 1 addition & 1 deletion .gitignore
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@@ -1,3 +1,3 @@
build*
build/

.vscode/
14 changes: 14 additions & 0 deletions build_trial.sh
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@@ -0,0 +1,14 @@
#!/bin/bash

rm -rf sysroot && mkdir sysroot
cmake -DCMAKE_INSTALL_PREFIX="sysroot/" ../
make install
this="$(date +%Y-%m-%d_%H_%M_%S)"
trialdir="srsran_trial_${this}"
tar="srsran.build-${this}.tgz"
mkdir ${trialdir}
tar czf "${trialdir}/$tar" -C "sysroot" .
md5sum "${trialdir}/$tar" >>${trialdir}/checksums.md5

echo "Built ${trialdir}"

60 changes: 60 additions & 0 deletions lib/include/srsran/build_info.h.in
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/**
* Copyright 2013-2023 Software Radio Systems Limited
*
* This file is part of srsRAN.
*
* srsRAN is free software: you can redistribute it and/or modify
* it under the terms of the GNU Affero General Public License as
* published by the Free Software Foundation, either version 3 of
* the License, or (at your option) any later version.
*
* srsRAN is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Affero General Public License for more details.
*
* A copy of the GNU Affero General Public License can be found in
* the LICENSE file in the top-level directory of this distribution
* and at http://www.gnu.org/licenses/.
*
*/

#ifndef SRSRAN_BUILD_INFO_H_IN
#define SRSRAN_BUILD_INFO_H_IN

#include "srsran/config.h"

# ifdef __cplusplus
extern "C" {
# endif

#ifdef BUILD_TYPE_RELEASE
static char build_mode[] = "Release";
#else
#ifdef BUILD_TYPE_DEBUG
static char build_mode[] = "Debug";
#else
#ifdef BUILD_TYPE_RELWITHDEBINFO
static char build_mode[] = "RelWithDebInfo";
#else
static char build_mode[] = "unknown";
#endif
#endif
#endif

// the configured build options for srsRAN
static char build_info[] = "commit @GIT_COMMIT_HASH@ on branch @GIT_BRANCH@";

SRSRAN_API char* srsran_get_build_info() {
return build_info;
};

SRSRAN_API char* srsran_get_build_mode() {
return build_mode;
}

# ifdef __cplusplus
}
# endif

#endif // BUILD_INFO_
20 changes: 6 additions & 14 deletions lib/src/phy/dft/ofdm.c
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Expand Up @@ -380,9 +380,9 @@ static int ofdm_init_nr_nrscope_30khz(srsran_ofdm_t* q, srsran_ofdm_cfg_t* cfg,
q->window_offset_buffer[i] = cexpf(I * M_PI * 2.0f * (float)q->window_offset_n * (float)i / (float)symbol_sz);
}

for (uint32_t i = symbol_sz; i < 2*symbol_sz; i++){
q->window_offset_buffer[i] = cexpf(I * M_PI * 2.0f * (cp1 - cp2) * (float)(i-symbol_sz) / (float)symbol_sz);
}
// for (uint32_t i = symbol_sz; i < 2*symbol_sz; i++){
// q->window_offset_buffer[i] = cexpf(I * M_PI * 2.0f * (cp1 - cp2) * (float)(i-symbol_sz) / (float)symbol_sz);
// }
}

// Zero temporal and input buffers always
Expand Down Expand Up @@ -623,10 +623,6 @@ static int ofdm_init_nr_nrscope_15khz(srsran_ofdm_t* q, srsran_ofdm_cfg_t* cfg,
for (uint32_t i = 0; i < symbol_sz; i++) {
q->window_offset_buffer[i] = cexpf(I * M_PI * 2.0f * (float)q->window_offset_n * (float)i / (float)symbol_sz);
}

for (uint32_t i = symbol_sz; i < 2*symbol_sz; i++){
q->window_offset_buffer[i] = cexpf(I * M_PI * 2.0f * (cp2 - cp1) * (float)(i-symbol_sz) / (float)symbol_sz);
}
}

// Zero temporal and input buffers always
Expand Down Expand Up @@ -1133,10 +1129,6 @@ static void ofdm_rx_slot_nrscope_15khz(srsran_ofdm_t* q, int slot_in_sf, int cor
if (q->window_offset_n) {
srsran_vec_prod_ccc(tmp, q->window_offset_buffer, tmp, symbol_sz);

// if(scs_idx == 1 && slot_in_sf == 1) {
// srsran_vec_prod_ccc(tmp, &q->window_offset_buffer[symbol_sz], tmp, symbol_sz);
// }

// printf("q->window_offset_buffer:");
// srsran_vec_fprint_c(stdout, q->window_offset_buffer, symbol_sz);
}
Expand Down Expand Up @@ -1233,9 +1225,9 @@ static void ofdm_rx_slot_nrscope_30khz(srsran_ofdm_t* q, int slot_in_sf, int cor
if (q->window_offset_n) {
srsran_vec_prod_ccc(tmp, q->window_offset_buffer, tmp, symbol_sz);

if(scs_idx == 0 && i > 6) {
srsran_vec_prod_ccc(tmp, &q->window_offset_buffer[symbol_sz], tmp, symbol_sz);
}
// if(scs_idx == 0 && i > 6) {
// srsran_vec_prod_ccc(tmp, &q->window_offset_buffer[symbol_sz], tmp, symbol_sz);
// }
// printf("q->window_offset_buffer:");
// srsran_vec_fprint_c(stdout, q->window_offset_buffer, symbol_sz);
}
Expand Down
2 changes: 1 addition & 1 deletion nrscope/config/config.yaml
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Expand Up @@ -3,7 +3,7 @@ usrp_setting_0:
ssb_freq: 1989850000 #1989850000 #1970450000 #3489600000 #3649440000 #3650880000 # 1970450000 #2600040000 #3488160000 #3685440000 #3561600000 #1842050000 #2528550000 #3565920000 #2524950000 #2523750000 # 3565920000 # 2527350000 #3408960000 # should be set to the ssb frequency of the cell
rf_args: "clock=external,type=x300" #"type=x300" #"clock=external"
rx_gain: 30 # for x310, max rx gain is 31.5, for b210, it's around 80
srate_hz: 23040000 #11520000 #23040000
srate_hz: 11520000 #11520000 #23040000
nof_carriers: 1
nof_antennas: 1
scs_index: 0 #(0: 15kHz, 1: 30kHz, ..., the u in standard)
Expand Down
2 changes: 0 additions & 2 deletions nrscope/src/libs/dci_decoder.cc
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Expand Up @@ -615,8 +615,6 @@ int DCIDecoder::dci_decoder_and_reception_init(srsran_ue_dl_nr_sratescs_info arg
carrier_ul.max_mimo_layers = dci_cfg.nof_ul_layers;
printf("carrier_ul.max_mimo_layers: %d\n", carrier_ul.max_mimo_layers);

// update the nof_prb for carrier settings.

if (srsran_ue_dl_nr_init_nrscope(&ue_dl_dci, input, &ue_dl_args, arg_scs)) {
ERROR("Error UE DL");
return SRSRAN_ERROR;
Expand Down
52 changes: 26 additions & 26 deletions nrscope/src/libs/rach_decoder.cc
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Expand Up @@ -273,24 +273,24 @@ int RachDecoder::decode_and_parse_msg4_from_slot(srsran_slot_cfg_t* slot,
ERROR("RACHDecoder -- Error in blind search");
return SRSRAN_ERROR;
}
for (uint32_t pdcch_idx = 0; pdcch_idx < ue_dl_rach.pdcch_info_count; pdcch_idx++) {
const srsran_ue_dl_nr_pdcch_info_t* info = &(ue_dl_rach.pdcch_info[pdcch_idx]);
if(info->result.crc){ // Only print the RSRP result when the DCI's CRC is correct.
printf("PDCCH: %s-rnti=0x%x, crst_id=%d, ss_type=%s, ncce=%d, al=%d, EPRE=%+.2f, RSRP=%+.2f, corr=%.3f; "
"nof_bits=%d; crc=%s;\n",
srsran_rnti_type_str_short(info->dci_ctx.rnti_type),
info->dci_ctx.rnti,
info->dci_ctx.coreset_id,
srsran_ss_type_str(info->dci_ctx.ss_type),
info->dci_ctx.location.ncce,
info->dci_ctx.location.L,
info->measure.epre_dBfs,
info->measure.rsrp_dBfs,
info->measure.norm_corr,
info->nof_bits,
info->result.crc ? "OK" : "KO");
}
}
// for (uint32_t pdcch_idx = 0; pdcch_idx < ue_dl_rach.pdcch_info_count; pdcch_idx++) {
// const srsran_ue_dl_nr_pdcch_info_t* info = &(ue_dl_rach.pdcch_info[pdcch_idx]);
// if(info->result.crc){ // Only print the RSRP result when the DCI's CRC is correct.
// printf("PDCCH: %s-rnti=0x%x, crst_id=%d, ss_type=%s, ncce=%d, al=%d, EPRE=%+.2f, RSRP=%+.2f, corr=%.3f; "
// "nof_bits=%d; crc=%s;\n",
// srsran_rnti_type_str_short(info->dci_ctx.rnti_type),
// info->dci_ctx.rnti,
// info->dci_ctx.coreset_id,
// srsran_ss_type_str(info->dci_ctx.ss_type),
// info->dci_ctx.location.ncce,
// info->dci_ctx.location.L,
// info->measure.epre_dBfs,
// info->measure.rsrp_dBfs,
// info->measure.norm_corr,
// info->nof_bits,
// info->result.crc ? "OK" : "KO");
// }
// }

if (nof_found_dci < 1) {
printf("RACHDecoder -- No DCI found :'(\n");
Expand Down Expand Up @@ -337,8 +337,8 @@ int RachDecoder::decode_and_parse_msg4_from_slot(srsran_slot_cfg_t* slot,
return SRSRAN_ERROR;
}

printf("Decoded PDSCH (%d B)\n", pdsch_cfg.grant.tb[0].tbs / 8);
srsran_vec_fprint_byte(stdout, pdsch_res.tb[0].payload, pdsch_cfg.grant.tb[0].tbs / 8);
// printf("Decoded PDSCH (%d B)\n", pdsch_cfg.grant.tb[0].tbs / 8);
// srsran_vec_fprint_byte(stdout, pdsch_res.tb[0].payload, pdsch_cfg.grant.tb[0].tbs / 8);
uint32_t bytes_offset = 0;

for (uint32_t pdsch_res_idx = 0; pdsch_res_idx < (uint32_t)pdsch_cfg.grant.tb[0].tbs / 8 - 1; pdsch_res_idx ++){
Expand Down Expand Up @@ -400,19 +400,19 @@ int RachDecoder::decode_and_parse_msg4_from_slot(srsran_slot_cfg_t* slot,
break;
}

asn1::json_writer js_msg4;
task_scheduler_nrscope->rrc_setup.to_json(js_msg4);
printf("rrcSetup content: %s\n", js_msg4.to_string().c_str());
// asn1::json_writer js_msg4;
// task_scheduler_nrscope->rrc_setup.to_json(js_msg4);
// printf("rrcSetup content: %s\n", js_msg4.to_string().c_str());
asn1::cbit_ref bref_cg((task_scheduler_nrscope->rrc_setup).crit_exts.rrc_setup().master_cell_group.data(),
(task_scheduler_nrscope->rrc_setup).crit_exts.rrc_setup().master_cell_group.size());
if (task_scheduler_nrscope->master_cell_group.unpack(bref_cg) != asn1::SRSASN_SUCCESS) {
ERROR("Could not unpack master cell group config.");
return SRSRAN_ERROR;
}

asn1::json_writer js;
task_scheduler_nrscope->master_cell_group.to_json(js);
printf("masterCellGroup: %s\n", js.to_string().c_str());
// asn1::json_writer js;
// task_scheduler_nrscope->master_cell_group.to_json(js);
// printf("masterCellGroup: %s\n", js.to_string().c_str());

// Tells the task scheduler that the RACH is decoded and there are some entries in the know_rntis vector.
task_scheduler_nrscope->rach_found = true;
Expand Down

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