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debug checkpoint
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WanHaoRan committed Jun 19, 2024
1 parent a3201ff commit e69d2b2
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Showing 9 changed files with 112 additions and 49 deletions.
2 changes: 1 addition & 1 deletion lib/include/srsran/common/phy_cfg_nr.h
Original file line number Diff line number Diff line change
Expand Up @@ -41,7 +41,7 @@ struct phy_cfg_nr_t {
struct ssb_cfg_t {
uint32_t periodicity_ms = 0;
std::array<bool, SRSRAN_SSB_NOF_CANDIDATES> position_in_burst = {};
srsran_subcarrier_spacing_t scs = srsran_subcarrier_spacing_30kHz;
srsran_subcarrier_spacing_t scs = srsran_subcarrier_spacing_15kHz;
srsran_ssb_pattern_t pattern = SRSRAN_SSB_PATTERN_A;
};

Expand Down
14 changes: 10 additions & 4 deletions lib/src/phy/ch_estimation/dmrs_sch.c
Original file line number Diff line number Diff line change
Expand Up @@ -131,6 +131,8 @@ static uint32_t srsran_dmrs_get_lse(srsran_dmrs_sch_t* q,

// Generate sequence for the given pilots
srsran_sequence_state_gen_f(sequence_state, amplitude, (float*)q->temp, count * 2);
// printf("q->temp:");
// srsran_vec_fprint_c(stdout, q->temp, count);

// Calculate least square estimates
srsran_vec_prod_conj_ccc(least_square_estimates, q->temp, least_square_estimates, count);
Expand Down Expand Up @@ -931,7 +933,7 @@ int srsran_dmrs_sch_estimate(srsran_dmrs_sch_t* q,

cf_t* ce = q->temp;
uint32_t symbol_sz = q->carrier.nof_prb * SRSRAN_NRE; // Symbol size in resource elements
// printf("symbol_sz in dmrs_sch: %u\n", symbol_sz);
printf("symbol_sz in dmrs_sch: %u\n", symbol_sz);

// Get symbols indexes
uint32_t symbols[SRSRAN_DMRS_SCH_MAX_SYMBOLS] = {};
Expand All @@ -958,9 +960,12 @@ int srsran_dmrs_sch_estimate(srsran_dmrs_sch_t* q,
nof_pilots_x_symbol = srsran_dmrs_sch_get_symbol(
q, cfg, grant, cinit, delta, &sf_symbols[symbol_sz * l], &q->pilot_estimates[nof_pilots_x_symbol * i]);

// printf("nof_pilots_x_symbol: %u\n", nof_pilots_x_symbol);
// printf("pilot extimates:");
// srsran_vec_fprint_c(stdout, &q->pilot_estimates[nof_pilots_x_symbol * i], nof_pilots_x_symbol);
printf("nof_pilots_x_symbol: %u\n", nof_pilots_x_symbol);
printf("pilot extimates:");
srsran_vec_fprint_c(stdout, &q->pilot_estimates[nof_pilots_x_symbol * i], nof_pilots_x_symbol);
printf("original symbols:");
srsran_vec_fprint_c(stdout, &sf_symbols[symbol_sz * l], symbol_sz);

if (nof_pilots_x_symbol == 0) {
ERROR("Error, no pilots extracted (i=%d, l=%d)", i, l);
return SRSRAN_ERROR;
Expand Down Expand Up @@ -1057,6 +1062,7 @@ int srsran_dmrs_sch_estimate(srsran_dmrs_sch_t* q,
// Calculate CFO corrections
for (uint32_t l = 0; l < SRSRAN_NSYMB_PER_SLOT_NR; l++) {
float arg = arg0 + 2.0f * M_PI * cfo_avg_hz * srsran_symbol_distance_s(0, l, q->carrier.scs);
printf("srsran_symbol_distance_s(0, l, q->carrier.scs): %f\n", srsran_symbol_distance_s(0, l, q->carrier.scs));
cfo_correction[l] = cexpf(I * arg); //cexpf(I * arg);
}

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59 changes: 44 additions & 15 deletions lib/src/phy/dft/ofdm.c
Original file line number Diff line number Diff line change
Expand Up @@ -287,10 +287,10 @@ static int ofdm_init_nr_nrscope(srsran_ofdm_t* q, srsran_ofdm_cfg_t* cfg, srsran
q->slot_sz = (uint32_t)SRSRAN_SLOT_LEN_NR(q->cfg.symbol_sz);
q->sf_sz = (uint32_t)SRSRAN_SF_LEN_NR(q->cfg.symbol_sz, scs_idx);

// printf("q->slot_sz: %d\n", q->slot_sz);
// printf("q->sf_sz: %d\n", q->sf_sz);
// printf("symbol_sz: %d\n", symbol_sz);
// printf("q->nof_symbols: %d\n", q->nof_symbols);
printf("q->slot_sz: %d\n", q->slot_sz);
printf("q->sf_sz: %d\n", q->sf_sz);
printf("symbol_sz: %d\n", symbol_sz);
printf("q->nof_symbols: %d\n", q->nof_symbols);

// Set the CFR parameters related to OFDM symbol and FFT size
q->cfg.cfr_tx_cfg.symbol_sz = symbol_sz;
Expand Down Expand Up @@ -359,15 +359,21 @@ static int ofdm_init_nr_nrscope(srsran_ofdm_t* q, srsran_ofdm_cfg_t* cfg, srsran
uint32_t nof_prb = q->cfg.nof_prb;
cf_t* in_buffer = q->cfg.in_buffer;
cf_t* out_buffer = q->cfg.out_buffer;

// change the cp setting for 5G NR
int cp1 = SRSRAN_CP_ISNORM(cp) ? SRSRAN_CP_LEN_NORM_NR(symbol_sz) : SRSRAN_CP_LEN_EXT_NR(symbol_sz);
// int cp1 = SRSRAN_CP_ISNORM(cp) ? SRSRAN_CP_LEN_NORM_NR(symbol_sz) : SRSRAN_CP_LEN_EXT_NR(symbol_sz);

int cp1 = SRSRAN_CP_ISNORM(cp) ? SRSRAN_CP_LEN_NORM(0, symbol_sz) : SRSRAN_CP_LEN_EXT(symbol_sz);
int cp2 = SRSRAN_CP_ISNORM(cp) ? SRSRAN_CP_LEN_NORM(1, symbol_sz) : SRSRAN_CP_LEN_EXT(symbol_sz);


// printf("cp1: %d\n", cp1);
// Slides DFT window a fraction of cyclic prefix, it does not apply for the inverse-DFT
// we skip the window offset by setting cfg.rx_window_offset = 0;
if (isnormal(cfg->rx_window_offset)) {
cfg->rx_window_offset = SRSRAN_MAX(0, cfg->rx_window_offset); // Needs to be positive
cfg->rx_window_offset = SRSRAN_MIN(100, cfg->rx_window_offset); // Needs to be below 100
q->window_offset_n = (uint32_t)roundf((float)cp1 * cfg->rx_window_offset);
q->window_offset_n = (uint32_t)roundf((float)cp2 * cfg->rx_window_offset);

// printf()
for (uint32_t i = 0; i < symbol_sz; i++) {
Expand Down Expand Up @@ -401,7 +407,7 @@ static int ofdm_init_nr_nrscope(srsran_ofdm_t* q, srsran_ofdm_cfg_t* cfg, srsran
1,
1,
SRSRAN_CP_NSYMB_NR(cp),
symbol_sz + cp1,
symbol_sz + cp2,
symbol_sz)) {
ERROR("Creating Guru DFT plan (%d)", slot);
return SRSRAN_ERROR;
Expand Down Expand Up @@ -685,6 +691,8 @@ int srsran_ofdm_set_phase_compensation_nrscope(srsran_ofdm_t* q, double center_f
for (uint32_t l = 0; l < q->nof_symbols; l++) {
uint32_t cp_len =
SRSRAN_CP_ISNORM(q->cfg.cp) ? SRSRAN_CP_LEN_NORM_NR(symbol_sz) : SRSRAN_CP_LEN_EXT_NR(symbol_sz);
printf("cp_len: %d\n", cp_len);
printf("center_freq: %f\n", center_freq_hz);
// Advance CP
count += cp_len;

Expand All @@ -698,7 +706,7 @@ int srsran_ofdm_set_phase_compensation_nrscope(srsran_ofdm_t* q, double center_f
// Calculate compensation phase in double precision and then convert to single
q->phase_compensation[l] = (cf_t)cexp(I * phase_rad);
// q->phase_compensation[l+q->nof_symbols/2] = (cf_t)cexp(I * phase_rad);
// printf("phase_compensation: %f+%fi\n", creal(q->phase_compensation[l]), cimag(q->phase_compensation[l]));
printf("phase_compensation: %f+%fi\n", creal(q->phase_compensation[l]), cimag(q->phase_compensation[l]));

// the code multiplied first half frame some wierd phases, a very weird fix for that
// only for FDD currently.
Expand Down Expand Up @@ -739,7 +747,6 @@ int srsran_ofdm_set_freq_shift(srsran_ofdm_t* q, float freq_shift)

// Check if fft shift is required
if (!isnormal(q->cfg.freq_shift_f)) {
// printf("skiped set freq shift.\n");
srsran_dft_plan_set_dc(&q->fft_plan, true);
return SRSRAN_SUCCESS;
}
Expand Down Expand Up @@ -857,16 +864,24 @@ static void ofdm_rx_slot_nrscope(srsran_ofdm_t* q, int slot_in_sf, int coreset_o
float norm = 1.0f / sqrtf(q->fft_plan.size);
cf_t* tmp = q->tmp; // where the dft results store
uint32_t dc = (q->fft_plan.dc) ? 1 : 0;
// printf("symbol_sz: %d\n", symbol_sz);
printf("symbol_sz: %d\n", symbol_sz);
printf("nof_re: %d\n", nof_re);

printf("fft-input:");
srsran_vec_fprint_c(stdout, q->cfg.in_buffer, (symbol_sz + 54) * 14);

srsran_dft_run_guru_c(&q->fft_plan_sf[slot_in_sf]);
// printf("q->nof_symbols: %d\n", q->nof_symbols);

printf("fft-output:");
srsran_vec_fprint_c(stdout, tmp, (symbol_sz) * 14);

uint32_t re_count = 0;
for (int i = 0; i < q->nof_symbols; i++) {
// Apply frequency domain window offset
if (q->window_offset_n) {
srsran_vec_prod_ccc(tmp, q->window_offset_buffer, tmp, symbol_sz); // skipped for now
srsran_vec_prod_ccc(tmp, q->window_offset_buffer, tmp, symbol_sz);
// printf("q->window_offset_buffer:");
// srsran_vec_fprint_c(stdout, q->window_offset_buffer, symbol_sz);
}

// Perform FFT shift
Expand All @@ -877,14 +892,18 @@ static void ofdm_rx_slot_nrscope(srsran_ofdm_t* q, int slot_in_sf, int coreset_o
// memcpy(output, tmp + symbol_sz - nof_re / 2, sizeof(cf_t) * nof_re / 2);
// memcpy(output + nof_re / 2, &tmp[dc], sizeof(cf_t) * nof_re / 2);

// if(i == 2 || i == 7 || i == 11){
// printf("fft-output symbol %d:", i);
// srsran_vec_fprint_c(stdout, output, symbol_sz);
// }

// Normalize output
// q->cfg.phase_compensation_hz = 0;
if (isnormal(q->cfg.phase_compensation_hz)) {
// Get phase compensation
// Added by Haoran. A quick fix for the situation that first half and second half of slot has a phase shift.
cf_t phase_compensation = conjf(q->phase_compensation[slot_in_sf * q->nof_symbols + i]);

// printf("phase_compensation: %f+%fi\n", creal(phase_compensation), cimag(phase_compensation));
printf("phase_compensation: %f+%fi\n", creal(phase_compensation), cimag(phase_compensation));

// Apply normalization
if (q->fft_plan.norm) {
Expand All @@ -903,13 +922,23 @@ static void ofdm_rx_slot_nrscope(srsran_ofdm_t* q, int slot_in_sf, int coreset_o
// fp = fopen("SIB_debug.txt", "a");
// fwrite(output, sizeof(cf_t), nof_re, fp);
// fclose(fp);

// if(i == 2 || i == 7 || i == 11){
// printf("fft-output symbol %d:", i);
// srsran_vec_fprint_c(stdout, output, symbol_sz);
// }

tmp += symbol_sz;
output += nof_re;
re_count += nof_re;
}
#endif

// printf("original symbols:");
// srsran_vec_fprint_c(stdout, &q->cfg.out_buffer[nof_re * 2], nof_re);
// printf("original symbols:");
// srsran_vec_fprint_c(stdout, &q->cfg.out_buffer[nof_re * 7], nof_re);
// printf("original symbols:");
// srsran_vec_fprint_c(stdout, &q->cfg.out_buffer[nof_re * 11], nof_re);
}

static void ofdm_rx_slot_mbsfn(srsran_ofdm_t* q, cf_t* input, cf_t* output)
Expand Down
8 changes: 4 additions & 4 deletions nrscope/config/config.yaml
Original file line number Diff line number Diff line change
@@ -1,12 +1,12 @@
nof_usrp_dev: 1
usrp_setting_0:
ssb_freq: 3649440000 #3489600000 #3649440000 #3650880000 # 1970450000 #2600040000 #3488160000 #3685440000 #3561600000 #1842050000 #2528550000 #3565920000 #2524950000 #2523750000 # 3565920000 # 2527350000 #3408960000 # should be set to the ssb frequency of the cell
ssb_freq: 1970450000 #1970450000 #3489600000 #3649440000 #3650880000 # 1970450000 #2600040000 #3488160000 #3685440000 #3561600000 #1842050000 #2528550000 #3565920000 #2524950000 #2523750000 # 3565920000 # 2527350000 #3408960000 # should be set to the ssb frequency of the cell
rf_args: "clock=external,type=x300" #"type=x300" #"clock=external"
rx_gain: 30 # for x310, max rx gain is 31.5, for b210, it's around 80
srate_hz: 23040000 #11520000 #23040000
srate_hz: 11520000 #11520000 #23040000
nof_carriers: 1
nof_antennas: 1
scs_index: 1 #(0: 15kHz, 1: 30kHz, ..., the u in standard)
scs_index: 0 #(0: 15kHz, 1: 30kHz, ..., the u in standard)
rf_log_level: "debug"
nof_threads: 4

Expand All @@ -28,6 +28,6 @@ usrp_setting_0:

log_config:
local_log: true
push_to_google: true
push_to_google: false
google_service_account_credential: "/home/wanhr/Downloads/nsf-2223556-222187-02b924918c95.json"

3 changes: 3 additions & 0 deletions nrscope/hdr/sibs_decoder.h
Original file line number Diff line number Diff line change
Expand Up @@ -28,6 +28,9 @@ class SIBsDecoder{

cell_search_result_t cell;

long int file_position = 0;


SIBsDecoder();
~SIBsDecoder();

Expand Down
26 changes: 23 additions & 3 deletions nrscope/src/libs/radio_nr.cc
Original file line number Diff line number Diff line change
Expand Up @@ -192,15 +192,15 @@ static int slot_sync_recv_callback(void* ptr, cf_t** buffer, uint32_t nsamples,

int Radio::SyncandDownlinkInit(){
//***** DL args Config Start *****//
rf_buffer_t = srsran::rf_buffer_t(rx_buffer, SRSRAN_NOF_SLOTS_PER_SF_NR(task_scheduler_nrscope.args_t.ssb_scs) * slot_sz);
rf_buffer_t = srsran::rf_buffer_t(rx_buffer, SRSRAN_NOF_SLOTS_PER_SF_NR(task_scheduler_nrscope.args_t.ssb_scs) * slot_sz * 2);
// it appears the srsRAN is build on 15kHz scs, we need to use the srate and
// scs to calculate the correct subframe size
arg_scs.srate = task_scheduler_nrscope.args_t.srate_hz;
arg_scs.scs = task_scheduler_nrscope.cell.mib.scs_common;

arg_scs.coreset_offset_scs = (cs_args.ssb_freq_hz - task_scheduler_nrscope.coreset0_args_t.coreset0_center_freq_hz) / task_scheduler_nrscope.cell.abs_pdcch_scs;// + 12;
arg_scs.coreset_slot = (uint32_t)task_scheduler_nrscope.coreset0_args_t.n_0;
arg_scs.phase_diff_first_second_half = 0;
// arg_scs.phase_diff_first_second_half = 0;
//***** DL args Config End *****//

//***** Slot Sync Start *****//
Expand Down Expand Up @@ -248,8 +248,14 @@ int Radio::RadioCapture(){
std::cout << "SIB Decoder Initializing..." << std::endl;
}

// FILE *fp2;
// fp2 = fopen("/home/wanhr/Documents/codes/cpp/srsRAN_4G/build/srsue/src/SIB_debug_slot_idx.txt", "r");
// long int file_position = 0;
// long int slot_idx_position = 0;

while(true){
outcome.timestamp = last_rx_time.get(0);
outcome.timestamp = last_rx_time.get(0);

if (srsran_ue_sync_nr_zerocopy(&ue_sync_nr, rf_buffer_t.to_cf_t(), &outcome) < SRSRAN_SUCCESS) {
std::cout << "SYNC: error in zerocopy" << std::endl;
logger.error("SYNC: error in zerocopy");
Expand All @@ -265,6 +271,18 @@ int Radio::RadioCapture(){
slot.idx = (outcome.sf_idx) * SRSRAN_NSLOTS_PER_FRAME_NR(arg_scs.scs) / 10 + slot_idx;
// Move rx_buffer
srsran_vec_cf_copy(rx_buffer, rx_buffer + slot_idx*slot_sz, slot_sz);


// fseek(fp, file_position * sizeof(cf_t), SEEK_SET);
// // uint32_t a = fread(ue_dl.fft[0].cfg.in_buffer, sizeof(cf_t), ue_dl.fft[0].sf_sz, fp);
// uint32_t a = fread(&sibs_decoder.ue_dl_sibs.fft[0].cfg.in_buffer, sizeof(cf_t), sibs_decoder.ue_dl_sibs.fft[0].sf_sz, fp);
// file_position += sibs_decoder.ue_dl_sibs.fft[0].sf_sz;

// fseek(fp2, slot_idx_position * sizeof(uint32_t), SEEK_SET);
// // uint32_t a = fread(ue_dl.fft[0].cfg.in_buffer, sizeof(cf_t), ue_dl.fft[0].sf_sz, fp);
// uint32_t b = fread(&slot.idx, sizeof(uint32_t), 1, fp2);
// slot_idx_position += 1;


struct timeval t0, t1;
gettimeofday(&t0, NULL);
Expand Down Expand Up @@ -386,5 +404,7 @@ int Radio::RadioCapture(){
}
}
}
// fclose(fp);
// fclose(fp2);
return SRSRAN_SUCCESS;
}
39 changes: 23 additions & 16 deletions nrscope/src/libs/sibs_decoder.cc
Original file line number Diff line number Diff line change
Expand Up @@ -92,6 +92,13 @@ int SIBsDecoder::decode_and_parse_sib1_from_slot(srsran_slot_cfg_t* slot,
}

memset(&dci_sibs, 0, sizeof(srsran_dci_dl_nr_t));

// FILE *fp;
// fp = fopen("/home/wanhr/Documents/codes/cpp/srsRAN_4G/build/srsue/src/SIB_debug.txt", "r");
// fseek(fp, file_position * sizeof(cf_t), SEEK_SET);
// uint32_t a = fread(ue_dl.fft[0].cfg.in_buffer, sizeof(cf_t), ue_dl.fft[0].sf_sz, fp);
// uint32_t a = fread(ue_dl_sibs.fft[0].cfg.in_buffer, sizeof(cf_t), ue_dl_sibs.fft[0].sf_sz, fp);
// file_position += ue_dl_sibs.fft[0].sf_sz;

// Check the fft plan and how does it manipulate the buffer
srsran_ue_dl_nr_estimate_fft_nrscope(&ue_dl_sibs, slot, arg_scs);
Expand All @@ -103,22 +110,22 @@ int SIBsDecoder::decode_and_parse_sib1_from_slot(srsran_slot_cfg_t* slot,
return SRSRAN_ERROR;
}
// Print PDCCH blind search candidates
for (uint32_t pdcch_idx = 0; pdcch_idx < ue_dl_sibs.pdcch_info_count; pdcch_idx++) {
const srsran_ue_dl_nr_pdcch_info_t* info = &(ue_dl_sibs.pdcch_info[pdcch_idx]);
printf("PDCCH: %s-rnti=0x%x, crst_id=%d, ss_type=%s, ncce=%d, al=%d, EPRE=%+.2f, RSRP=%+.2f, corr=%.3f; "
"nof_bits=%d; crc=%s;\n",
srsran_rnti_type_str_short(info->dci_ctx.rnti_type),
info->dci_ctx.rnti,
info->dci_ctx.coreset_id,
srsran_ss_type_str(info->dci_ctx.ss_type),
info->dci_ctx.location.ncce,
info->dci_ctx.location.L,
info->measure.epre_dBfs,
info->measure.rsrp_dBfs,
info->measure.norm_corr,
info->nof_bits,
info->result.crc ? "OK" : "KO");
}
// for (uint32_t pdcch_idx = 0; pdcch_idx < ue_dl_sibs.pdcch_info_count; pdcch_idx++) {
// const srsran_ue_dl_nr_pdcch_info_t* info = &(ue_dl_sibs.pdcch_info[pdcch_idx]);
// printf("PDCCH: %s-rnti=0x%x, crst_id=%d, ss_type=%s, ncce=%d, al=%d, EPRE=%+.2f, RSRP=%+.2f, corr=%.3f; "
// "nof_bits=%d; crc=%s;\n",
// srsran_rnti_type_str_short(info->dci_ctx.rnti_type),
// info->dci_ctx.rnti,
// info->dci_ctx.coreset_id,
// srsran_ss_type_str(info->dci_ctx.ss_type),
// info->dci_ctx.location.ncce,
// info->dci_ctx.location.L,
// info->measure.epre_dBfs,
// info->measure.rsrp_dBfs,
// info->measure.norm_corr,
// info->nof_bits,
// info->result.crc ? "OK" : "KO");
// }
if (nof_found_dci < 1) {
printf("SIBDecoder -- No DCI found :'(\n");
return SRSRAN_ERROR;
Expand Down
6 changes: 2 additions & 4 deletions srsue/src/phy/nr/slot_sync.cc
Original file line number Diff line number Diff line change
Expand Up @@ -190,8 +190,7 @@ bool slot_sync::run_sfn_sync()

// If in sync, update slot index
if (outcome.in_sync) {
slot_cfg.idx = outcome.sfn * SRSRAN_NSLOTS_PER_FRAME_NR(srsran_subcarrier_spacing_30kHz) + outcome.sf_idx;
// slot_cfg.idx = outcome.sfn * SRSRAN_NSLOTS_PER_FRAME_NR(srsran_subcarrier_spacing_15kHz) + outcome.sf_idx;
slot_cfg.idx = outcome.sfn * SRSRAN_NSLOTS_PER_FRAME_NR(srsran_subcarrier_spacing_15kHz) + outcome.sf_idx;
}

// Return true if the PHY in-sync
Expand All @@ -210,8 +209,7 @@ bool slot_sync::run_camping(srsran::rf_buffer_t& buffer, srsran::rf_timestamp_t&
// std::cout << "outcome.in_sync: " << outcome.in_sync << std::endl;
// If in sync, update slot index
if (outcome.in_sync) {
slot_cfg.idx = outcome.sfn * SRSRAN_NSLOTS_PER_FRAME_NR(srsran_subcarrier_spacing_30kHz) + outcome.sf_idx;
// slot_cfg.idx = outcome.sfn * SRSRAN_NSLOTS_PER_FRAME_NR(srsran_subcarrier_spacing_15kHz) + outcome.sf_idx;
slot_cfg.idx = outcome.sfn * SRSRAN_NSLOTS_PER_FRAME_NR(srsran_subcarrier_spacing_15kHz) + outcome.sf_idx;
}

// Set RF timestamp
Expand Down
4 changes: 2 additions & 2 deletions srsue/src/phy/sync_sa.cc
Original file line number Diff line number Diff line change
Expand Up @@ -283,10 +283,10 @@ void sync_sa::run_state_sfn_sync()
tti = slot_synchronizer.get_slot_cfg().idx;

logger.info("SYNC: SFN synchronised successfully (SFN=%d). Transitioning to IDLE...",
tti / SRSRAN_NSLOTS_PER_FRAME_NR(srsran_subcarrier_spacing_30kHz));
tti / SRSRAN_NSLOTS_PER_FRAME_NR(srsran_subcarrier_spacing_15kHz));
// std::cout << "run_state_sfn_sync success!" << std::endl;
printf("SYNC: SFN synchronised successfully (SFN=%d). Transitioning to IDLE...\n",
tti / SRSRAN_NSLOTS_PER_FRAME_NR(srsran_subcarrier_spacing_30kHz));
tti / SRSRAN_NSLOTS_PER_FRAME_NR(srsran_subcarrier_spacing_15kHz));
phy_state.state_exit(true);
return;
}
Expand Down

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