MOS65xx: Include mos65xx.h (WIP)

[paulmcquad]

Starting to build a plugin around Capstone

Signed-off-by: Paul McQuade [email protected]

[Dax89]

This is used only in ARM, afaik is not neeed for MOS65XX, because it provides a single instruction set.

Tell REDasm to increase the view to the next possible instruction by calling

RDEmulateResult_SetSize(result, insn->size); // Next time "emulate" is called is after insn->size bytes

After that you need to classify instructions in order to have a detailed listing (more case you handle and more detailed will become), see here (it just a big switch case statement): https://github.com/REDasmOrg/REDasm-Assemblers/blob/db0d698029d6776f4b9f3612498439621b473987/capstonebundle/plugin/arm32/common.cpp

The easiest way is to begin to catch return, call and jump statement

[Dax89]

You can remove the lifter part, is not mandatory

[Dax89]

Try to show the instruction's mnemonic with RDRenderer_MnemonicWord API:

Like here:

REDasm-Assemblers/capstonebundle/plugin/arm32/common.cpp

Line 68 in db0d698

RDRenderer_MnemonicWord(rp->renderer, insn->mnemonic, ARM32Common::mnemonicTheme(insn));

[paulmcquad]

@Dax89
I tried to remove the lifter part but it crashes the build below:

MOS65xx Plugin 5 - Remove Lifter Part

[Dax89]

Mmmmh, it's a bug.

So restore the lifter part, I will investigate when I have some free time

[paulmcquad]

@Dax89 Please see my first attempt at adding in support for branching emulation code.
Can you provide more details around emulation support? Am i doing it right?

47c8c3b

[Dax89]

Yes, it looks ok.

I have checked for "BVS" instruction (this one? https://www.c64-wiki.com/wiki/BVS): is it a conditional jump?
It must be handled like this: https://github.com/REDasmOrg/REDasm-Assemblers/blob/master/capstonebundle/plugin/arm32/common.cpp#L13

RDEmulateResult_AddBranchTrue(result, jump_target);
RDEmulateResult_AddBranchFalse(result, address + insn->size); // If not jumps, try to emulate the next instruction

It is very important to check for "return" type instructions too

Can you provide more details around emulation support?

With the emulate callback you are creating a control flow similar to a real cpu (well...an ideal one, we can't emulate everything).
Every jump/call is queued and marked to be disassembled (a jump symbol or function is generated automatically), the engine stops the when RDEmulateResult_AddReturn() is called, in this case a new address is extracted from the queue, if the queue is empty the emulation step is completed.

If the decoded instruction is not a jump, call or return, the engine relies to the decoded instruction's size which is set by calling RDEmulateResult_SetSize(result, m_insn->size).

For example:

• emulate address 0x00401000 with size 4
• emulate address 0x00401004 with size 4
• emulate address 0x00401008 with size 4
• ...

[paulmcquad]

@Dax89 - Thanks for your help but for the MOS65XX_INS_BVS instruction code. There doesn't seem to be a conditional jump code available like ARM_CC_AL. There are operand type code like MOS65XX_OP_IMM but noting like a ARM_INS_BLX case available.

[Dax89]

It was just for reference: all ARM_XYZ prefixed values are ARM specific for Capstone.

The only APIs you need are RDEmulateResult_AddBranchTrue() and RDEmulateResult_AddBranchFalse() instead of RDEmulateResult_AddBranch() which is used for unconditional jumps

[paulmcquad]

@Dax89
So what do you think i put in instead of ARM_CC_AL?
https://github.com/REDasmOrg/REDasm-Assemblers/blob/master/capstonebundle/plugin/arm32/common.cpp#L12

[Dax89]

Nothing, BVS is a conditional jump without checking anything else:

case MOS65XX_INS_BVS: {
    RDEmulateResult_AddBranchTrue(result, mos65xx.operands[0].imm);
    RDEmulateResult_AddBranchFalse(result, address + insn->size);
    return;
}

[paulmcquad]

@Dax89 Am i doing this the right way, the Render Part?

https://github.com/paulmcquad/REDasm-Assemblers/blob/MOS65xx/capstonebundle/plugin/mos65xx/mos65xx.cpp#L33

RDRenderer_MnemonicWord() API

[Dax89]

Yes, but you need to call auto* insn = this->decode(rp->address, &rp->view); again and use insn variable (instructions aren't stored anywhere because decoding is pretty past)