argon2: align blocks to 128-byte boundaries for modern x86-64 and aar…

…ch64

Based on notes in crossbeam-utils::CachePadded:

https://github.com/crossbeam-rs/crossbeam/blob/17fb8417a83a/crossbeam-utils/src/cache_padded.rs#L63-L79

In summary:

- while x86-64 cache lines are still 64 bytes, modern prefetchers pull
  them in pairs, so for the purpose of preventing false sharing, we need
  128-byte alignment.

- on aarch64 big.LITTLE, the "big" cores use 128-byte cache lines.

argon2/src/block.rs

@@ -46,8 +46,12 @@ macro_rules! permute {
 }
 
 /// Structure for the (1 KiB) memory block implemented as 128 64-bit words.
+//
+// Blocks are 128-byte aligned to prevent false sharing. The specific alignment value is based on
+// the notes in `crossbeam-utils::CachePadded` for modern architectures, which either use 128-byte
+// cache lines (aarch64) or pull 64-byte cache lines in pairs (x86-64).
 #[derive(Copy, Clone, Debug)]
-#[repr(align(64))]
+#[repr(align(128))]
 pub struct Block([u64; Self::SIZE / 8]);
 
 impl Block {