A ripple carry adder is a digital circuit that produces the arithmetic sum of two binary numbers. It. can be constructed with full adders connected in cascaded with the carry output from each full adder connected to the carry input of the next full adder in the chain. This kind of adder is called Ripple Carry Adder, since each carry bit "ripples" to the next full adder.
Here is a top level view of a 4-bit Ripple Carry Adder for reference :
The layout of ripple carry adder is simple, which allows for fast design time; however, the ripple carry adder is relatively slow, since each full adder must wait for the carry bit to be calculated from the previous full adder. The gate delay can easily be calculated by inspection of the full adder circuit.
Total time taken for the 8bit Ripple Carry Adder is :
TRCA = N * TFA
where, TFA = Propogation Delay of each Full Adder Circuit
Board Used - Intel MAX10 FPGA - 10M50DAF484C7G
This project was submitted for the final project of the course Computer Aided Digital Design (UE22EC252A) by Sahil S Prabhu.