PRJ: Unittest skip decorator for TDL-TDC

SiLab-Bonn · Nov 5, 2024 · 6ef5ead · 6ef5ead
1 parent c024c65
commit 6ef5ead
Showing 1 changed file with 4 additions and 2 deletions.
diff --git a/tests/test_SimTdl_Tdc.py b/tests/test_SimTdl_Tdc.py
@@ -91,7 +91,8 @@ def setUp(self):
         self.chip = Dut(cnfg_yaml)
         self.chip.init()
 
-    def skip_tdc(self):
+    @unittest.skip("Currently not compatible with Icarus Verilog")
+    def test_tdc(self):
         self.chip['TDC0'].ENABLE = 1
         self.chip['TDC0'].EN_TRIGGER_DIST = 1
         self.chip['SEQ'].REPEAT = 1
@@ -120,7 +121,8 @@ def skip_tdc(self):
                     self.assertEqual(data[3]['word_type'], 'TIMESTAMP')
                     self.asserEqual(data[3]['timestamp'], 42)
 
-    def skip_broadcasting(self):
+    @unittest.skip("Currently not compatible with Icarus Verilog")
+    def test_broadcasting(self):
         self.chip['TDC0'].ENABLE = 1
         self.chip['TDC1'].ENABLE = 1
         self.chip['TDC2'].ENABLE = 1