rcx: fix docs

Signed-off-by: Eder Monteiro <[email protected]>
The-OpenROAD-Project · Jan 15, 2025 · 9d64a34 · 9d64a34
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diff --git a/src/rcx/README.md b/src/rcx/README.md
@@ -263,6 +263,218 @@ write_rules
 | `-name` | Name of rule. |
 | `-db` | DB tbc. |
 
+### Write RCX Model
+
+The `write_rcx_model` command write the model file after reading capacitance/resistance
+Tables from Field Solver.
+
+```tcl
+write_rcx_model
+  [-file filename]
+```
+
+#### Options
+
+| Switch Name | Description |
+| ----- | ----- |
+| `-file` | Output file name. |
+
+### Init RCX Model
+
+The `init_rcx_model` command is used for initialization for creating the model file.
+
+```tcl
+init_rcx_model
+  [-corner_names names]
+  [-met_cnt met_cnt]
+```
+
+#### Options
+
+| Switch Name | Description |
+| ----- | ----- |
+| `-corner_names` | List of corner names. |
+| `-met_cnt` | Number of metal layers. |
+
+### Read RCX Tables
+
+The `read_rcx_tables` command reads the capacitance and resistance tables from Field
+Solver Output.
+
+```tcl
+read_rcx_tables
+  [-corner_name corner_name]
+  [-file in_file_name]
+  [-wire_index wire]
+  [-over]
+  [-under]
+  [-over_under]
+  [-diag]
+```
+
+#### Options
+
+| Switch Name | Description |
+| ----- | ----- |
+| `-corner_name` | Corner name. |
+| `-file` | Input file name. |
+| `-wire_index` | Target wire index. |
+| `-over` | Over pattern family only. |
+| `-under` | Under pattern family only. |
+| `-over_under` | OverUnder pattern family only. |
+| `-diag` | Diagonal pattern family only. |
+
+### Generate Solver Patterns
+
+The `gen_solver_patterns` command generates 3D wire patterns not targeting any particular
+Field Solver.
+
+```tcl
+gen_solver_patterns
+  [-process_file process_file]
+  [-process_name process_name]
+  [-version version]
+  [-wire_cnt wire_count]
+  [-len wire_len]
+  [-w_list widths]
+  [-s_list spacings]
+  [-over_dist dist]
+  [-under_dist dist]
+```
+
+#### Options
+
+| Switch Name | Description |
+| ----- | ----- |
+| `-process_file` | File that contains full process stack with conductor and dielctric dimensions. |
+| `-process_name` | Name of the process. |
+| `-version` | 2 if normalized wires, 1 not normalized; deafult is 1. |
+| `-wire_cnt` | Number of wires. Default is 3. |
+| `-len` | Wire length in microns. Default is 10. |
+| `-w_list` | Min layer Width multiplier list. Default is 1. |
+| `-s_list` | Min layer spacing multiplier list. Default is "1.0 1.5 2.0 3 5". |
+| `-over_dist` | Max number of levels for Under patterns. Default is 4. |
+| `-under_dist` | Max number of levels for Over patterns. Default is 4. |
+
+### Define RCX Corners
+
+The `define_rcx_corners` command defines specific corners to extract parasitics.
+
+```tcl
+define_rcx_corners
+  [-corner_list corner_list]
+```
+
+#### Options
+
+| Switch Name | Description |
+| ----- | ----- |
+| `-corner_list` | List of corner names. |
+
+### Get Model Corners
+
+The `get_model_corners` command lists all the corner names from a model file.
+
+```tcl
+get_model_corners
+  [-ext_model_file file_name]
+```
+
+#### Options
+
+| Switch Name | Description |
+| ----- | ----- |
+| `-ext_model_file` | Input file name. |
+
+### Generate RCX Model
+
+The `gen_rcx_model` command 
+
+```tcl
+gen_rcx_model
+  [-spef_file_list spefList]
+  [-corner_list cornerList]
+  [-out_file outfilename]
+  [-comment comment]
+  [-version version]
+  [-pattern pattern]
+```
+
+#### Options
+
+| Switch Name | Description |
+| ----- | ----- |
+| `-spef_file_list`| List of spef file names. |
+| `-corner_list`| List of corners. |
+| `-out_file`| Output file name. |
+| `-comment`| Comment on the model file. Default: "RCX Model File". |
+| `-version`| Version of the model file. |
+| `-pattern`| Pattern of the model file. |
+
+### Bench Wires Generation
+
+The `bench_wires_gen` command generates comprehensive benchmarking patterns
+(not for model generation).
+
+```tcl
+bench_wires_gen
+  [ -len length_in_min_widths ]
+  [ -met metal ]
+  [ -mlist metal_list ]
+  [ -width multiplier_width_list ]
+  [ -spacing multiplier_spacing_list ]
+  [ -couple_width multiplier_coupling_width_list ]
+  [ -couple_spacing multiplier_coupling_spacing_list ]
+  [ -over_width multiplier_over_width_list ]
+  [ -over_spacing multiplier_over_spacing_list ]
+  [ -under_width multiplier_under_width_list ]
+  [ -under_spacing multiplier_under_spacing_list ]
+  [ -over2_width multiplier_over2_width_list ]
+  [ -over2_spacing multiplier_over2_spacing_list ]
+  [ -under2_width multiplier_under2_width_list ]
+  [ -under2_spacing multiplier_under2_spacing_list ]
+  [ -dbg dbg_flag ]
+  [ -wire_cnt wire_count ]
+  [ -offset_over offset_over ]
+  [ -offset_under offset_under ]
+  [ -under_dist max_dist_to_under_met ]
+  [ -over_dist max_dist_to_over_met ]
+  [ -diag ]
+  [ -over ]
+  [ -under ]
+  [ -over_under ]
+```
+
+#### Options
+
+| Switch Name | Description |
+| ----- | ----- |
+| `-len` | length_in_min_widths.
+| `-met` | target metal.
+| `-mlist` | target metal_list.
+| `-width` | multiplier_width_list.
+| `-spacing` | multiplier_spacing_list.
+| `-couple_width` | multiplier_coupling_width_list.
+| `-couple_spacing` | multiplier_coupling_spacing_list.
+| `-over_width` | multiplier_over_width_list.
+| `-over_spacing` | multiplier_over_spacing_list.
+| `-under_width` | multiplier_under_width_list.
+| `-under_spacing` | multiplier_under_spacing_list.
+| `-over2_width` | multiplier_over2_width_list.
+| `-over2_spacing` | multiplier_over2_spacing_list.	 
+| `-under2_width` | multiplier_under2_width_list.
+| `-under2_spacing` | multiplier_under2_spacing_list.
+| `-dbg` |  dbg_flag.
+| `-wire_cnt` | wire_count.
+| `-offset_over` | offset_over.
+| `-offset_under` | offset_under.
+| `-under_dist` | max_dist_to_under_met.
+| `-over_dist` | max_dist_to_over_met.	  
+| `-diag` | Diag pattern family only.
+| `-over` | Over pattern family only.
+| `-under` | Under pattern family only.
+| `-over_under` | OverUnder pattern family only.
+
 ## Example scripts
 
 Example scripts demonstrating how to run OpenRCX in the OpenROAD environment

diff --git a/src/rcx/src/OpenRCX.tcl b/src/rcx/src/OpenRCX.tcl
@@ -51,11 +51,14 @@ proc define_process_corner { args } {
 
   rcx::define_process_corner $ext_model_index $filename
 }
+
 sta::define_cmd_args "define_rcx_corners" {
     [-corner_list cornerList]
 }
+
 proc define_rcx_corners { args } {
-  sta::parse_key_args "define_rcx_corners" args keys { -corner_list }
+  sta::parse_key_args "define_rcx_corners" args \
+    keys { -corner_list } flags {}
 
   set corner_list ""
   if { [info exists keys(-corner_list)] } {
@@ -65,17 +68,20 @@ proc define_rcx_corners { args } {
 }
 
 sta::define_cmd_args "get_model_corners" {
-    [-ext_model_file cornerList]
+    [-ext_model_file file_name]
 }
+
 proc get_model_corners { args } {
-  sta::parse_key_args "get_model_corners" args keys { -ext_model_file }
+  sta::parse_key_args "get_model_corners" args \
+    keys { -ext_model_file } flags {}
 
   set ext_model_file ""
   if { [info exists keys(-ext_model_file)] } {
     set ext_model_file $keys(-ext_model_file)
   }
   rcx::get_model_corners $ext_model_file
 }
+
 sta::define_cmd_args "extract_parasitics" {
     [-ext_model_file filename]
     [-corner cornerIndex]
@@ -367,8 +373,9 @@ sta::define_cmd_args "gen_rcx_model" {
 }
 
 proc gen_rcx_model { args } {
-  sta::parse_key_args "gen_rcx_model" args keys \
-    { -spef_file_list -corner_list -out_file -comment -version -pattern }
+  sta::parse_key_args "gen_rcx_model" args \
+  keys { -spef_file_list -corner_list -out_file -comment -version -pattern } \
+  flags {}
 
   set spef_file_list ""
   if { [info exists keys(-spef_file_list)] } {