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Add names for some instructions within groups #19

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Apr 9, 2024
Merged

Add names for some instructions within groups #19

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22 changes: 14 additions & 8 deletions model/riscv_insts_base.sail
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Original file line number Diff line number Diff line change
Expand Up @@ -148,7 +148,7 @@ mapping clause assembly = RISCV_JAL(imm, rd)
<-> "jal" ^ spc() ^ reg_name(rd) ^ sep() ^ hex_bits_21(imm)

/* ****************************************************************** */
$[name Jump And Link Register]
$[name jump and link register]
/*!
* The target address is obtained by adding the sign-extended 12-bit
* I-immediate to the register rs1, then setting the
Expand All @@ -169,7 +169,7 @@ mapping clause assembly = RISCV_JALR(imm, rs1, rd)
/* see riscv_jalr_seq.sail or riscv_jalr_rmem.sail for the execute clause. */

/* ****************************************************************** */
$[name Conditional Branch]
$[name conditional branch]
/*!
* The target address for this branch instruction is determined by combining
* the sign-extended 13-bit immediate value with the contents of register rs1.
Expand Down Expand Up @@ -292,12 +292,18 @@ function clause execute (ITYPE (imm, rs1, rd, op)) = {
}

mapping itype_mnemonic : iop <-> string = {
RISCV_ADDI <-> "addi",
RISCV_SLTI <-> "slti",
RISCV_SLTIU <-> "sltiu",
RISCV_XORI <-> "xori",
RISCV_ORI <-> "ori",
RISCV_ANDI <-> "andi"
$[name add immediate]
RISCV_ADDI <-> "addi",
$[name set less than immediate]
RISCV_SLTI <-> "slti",
$[name set less than immediate unsigned]
RISCV_SLTIU <-> "sltiu",
$[name XOR immediate]
RISCV_XORI <-> "xori",
$[name OR immediate]
RISCV_ORI <-> "ori",
$[name AND immediate]
RISCV_ANDI <-> "andi"
}

mapping clause assembly = ITYPE(imm, rs1, rd, op)
Expand Down
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