Whats included:

• Xilinx Design Tools 2021.2.1 (Vivado, Vitis, Vitis HLS)
• Siemens (Mentor Graphics) Questa Sim-64 2021.1
• Matlab R2022b
• Python 3.9

Checklist

• Building Vivado projects (PL)
• Building Vitis projects (PS)
• Building Vitis HLS projects
• Matlab support
• Running multiple copy of image on the single host
• Questa Sim precompiled Xilinx libraries from the box
• Questa Sim rtl simulation
• Questa Sim rtl simulation with UVM
• Questa Sim rtl simulation with DPI support
• cocotb support
• compatibility with Jenkins
• port forwarding (for remote uploading firmware)

Setting up

Building:

make build

Running:

make run

And cleaning:

make clean

For the tests run http server:

python3 -m http.server --bind 10.77.11.172