Add TMR CTRL1.async register field to allow asynchronous reads to PWM…

… and CNT registers
analogdevicesinc · Dec 12, 2024 · da091a8 · da091a8
1 parent eeb59b5
commit da091a8
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Showing 23 changed files with 3,787 additions and 3,720 deletions.
diff --git a/Libraries/CMSIS/Device/Maxim/MAX32655/Include/max32655.svd b/Libraries/CMSIS/Device/Maxim/MAX32655/Include/max32655.svd
@@ -11168,6 +11168,12 @@
        <bitOffset>14</bitOffset>
        <bitWidth>1</bitWidth>
       </field>
+      <field>
+       <name>ASYNC</name>
+       <description>Allows asynchronous reads of the PWM and CNT registers.</description>
+       <bitOffset>15</bitOffset>
+       <bitWidth>1</bitWidth>
+      </field>
       <field>
        <name>CLKSEL_B</name>
        <description>Timer Clock Select for Timer B</description>

diff --git a/Libraries/CMSIS/Device/Maxim/MAX32655/Include/tmr_regs.h b/Libraries/CMSIS/Device/Maxim/MAX32655/Include/tmr_regs.h
@@ -7,9 +7,7 @@
 
 /******************************************************************************
  *
- * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 
- * Analog Devices, Inc.),
- * Copyright (C) 2023-2024 Analog Devices, Inc.
+ * Copyright (C) 2024 Analog Devices, Inc.
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
  * you may not use this file except in compliance with the License.
@@ -383,6 +381,9 @@ typedef struct {
 #define MXC_F_TMR_CTRL1_OUTBEN_A_POS                   14 /**< CTRL1_OUTBEN_A Position */
 #define MXC_F_TMR_CTRL1_OUTBEN_A                       ((uint32_t)(0x1UL << MXC_F_TMR_CTRL1_OUTBEN_A_POS)) /**< CTRL1_OUTBEN_A Mask */
 
+#define MXC_F_TMR_CTRL1_ASYNC_POS                      15 /**< CTRL1_ASYNC Position */
+#define MXC_F_TMR_CTRL1_ASYNC                          ((uint32_t)(0x1UL << MXC_F_TMR_CTRL1_ASYNC_POS)) /**< CTRL1_ASYNC Mask */
+
 #define MXC_F_TMR_CTRL1_CLKSEL_B_POS                   16 /**< CTRL1_CLKSEL_B Position */
 #define MXC_F_TMR_CTRL1_CLKSEL_B                       ((uint32_t)(0x3UL << MXC_F_TMR_CTRL1_CLKSEL_B_POS)) /**< CTRL1_CLKSEL_B Mask */
 

diff --git a/Libraries/CMSIS/Device/Maxim/MAX32657/Include/max32657.svd b/Libraries/CMSIS/Device/Maxim/MAX32657/Include/max32657.svd
@@ -10081,6 +10081,12 @@
        <bitOffset>14</bitOffset>
        <bitWidth>1</bitWidth>
       </field>
+      <field>
+       <name>ASYNC</name>
+       <description>Allows asynchronous reads to the PWM and CNT registers.</description>
+       <bitOffset>15</bitOffset>
+       <bitWidth>1</bitWidth>
+      </field>
       <field>
        <name>CLKSEL_B</name>
        <description>Timer Clock Select for Timer B</description>

diff --git a/Libraries/CMSIS/Device/Maxim/MAX32657/Include/tmr_regs.h b/Libraries/CMSIS/Device/Maxim/MAX32657/Include/tmr_regs.h
@@ -381,6 +381,9 @@ typedef struct {
 #define MXC_F_TMR_CTRL1_OUTBEN_A_POS                   14 /**< CTRL1_OUTBEN_A Position */
 #define MXC_F_TMR_CTRL1_OUTBEN_A                       ((uint32_t)(0x1UL << MXC_F_TMR_CTRL1_OUTBEN_A_POS)) /**< CTRL1_OUTBEN_A Mask */
 
+#define MXC_F_TMR_CTRL1_ASYNC_POS                      15 /**< CTRL1_ASYNC Position */
+#define MXC_F_TMR_CTRL1_ASYNC                          ((uint32_t)(0x1UL << MXC_F_TMR_CTRL1_ASYNC_POS)) /**< CTRL1_ASYNC Mask */
+
 #define MXC_F_TMR_CTRL1_CLKSEL_B_POS                   16 /**< CTRL1_CLKSEL_B Position */
 #define MXC_F_TMR_CTRL1_CLKSEL_B                       ((uint32_t)(0x3UL << MXC_F_TMR_CTRL1_CLKSEL_B_POS)) /**< CTRL1_CLKSEL_B Mask */
 

diff --git a/Libraries/CMSIS/Device/Maxim/MAX32670/Include/max32670.svd b/Libraries/CMSIS/Device/Maxim/MAX32670/Include/max32670.svd
@@ -8541,6 +8541,12 @@
        <bitOffset>14</bitOffset>
        <bitWidth>1</bitWidth>
       </field>
+      <field>
+       <name>ASYNC</name>
+       <description>Allows asynchronous reads to the PWM and CNT registers.</description>
+       <bitOffset>15</bitOffset>
+       <bitWidth>1</bitWidth>
+      </field>
       <field>
        <name>CLKSEL_B</name>
        <description>Timer Clock Select for Timer B</description>

diff --git a/Libraries/CMSIS/Device/Maxim/MAX32670/Include/tmr_regs.h b/Libraries/CMSIS/Device/Maxim/MAX32670/Include/tmr_regs.h
@@ -7,9 +7,7 @@
 
 /******************************************************************************
  *
- * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 
- * Analog Devices, Inc.),
- * Copyright (C) 2023-2024 Analog Devices, Inc.
+ * Copyright (C) 2024 Analog Devices, Inc.
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
  * you may not use this file except in compliance with the License.
@@ -383,6 +381,9 @@ typedef struct {
 #define MXC_F_TMR_CTRL1_OUTBEN_A_POS                   14 /**< CTRL1_OUTBEN_A Position */
 #define MXC_F_TMR_CTRL1_OUTBEN_A                       ((uint32_t)(0x1UL << MXC_F_TMR_CTRL1_OUTBEN_A_POS)) /**< CTRL1_OUTBEN_A Mask */
 
+#define MXC_F_TMR_CTRL1_ASYNC_POS                      15 /**< CTRL1_ASYNC Position */
+#define MXC_F_TMR_CTRL1_ASYNC                          ((uint32_t)(0x1UL << MXC_F_TMR_CTRL1_ASYNC_POS)) /**< CTRL1_ASYNC Mask */
+
 #define MXC_F_TMR_CTRL1_CLKSEL_B_POS                   16 /**< CTRL1_CLKSEL_B Position */
 #define MXC_F_TMR_CTRL1_CLKSEL_B                       ((uint32_t)(0x3UL << MXC_F_TMR_CTRL1_CLKSEL_B_POS)) /**< CTRL1_CLKSEL_B Mask */
 

diff --git a/Libraries/CMSIS/Device/Maxim/MAX32672/Include/max32672.svd b/Libraries/CMSIS/Device/Maxim/MAX32672/Include/max32672.svd
@@ -11666,6 +11666,12 @@
        <bitOffset>14</bitOffset>
        <bitWidth>1</bitWidth>
       </field>
+      <field>
+       <name>ASYNC</name>
+       <description>Allows asynchronous reads to the PWM and CNT registers.</description>
+       <bitOffset>15</bitOffset>
+       <bitWidth>1</bitWidth>
+      </field>
       <field>
        <name>CLKSEL_B</name>
        <description>Timer Clock Select for Timer B</description>

diff --git a/Libraries/CMSIS/Device/Maxim/MAX32672/Include/tmr_regs.h b/Libraries/CMSIS/Device/Maxim/MAX32672/Include/tmr_regs.h
@@ -7,9 +7,7 @@
 
 /******************************************************************************
  *
- * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 
- * Analog Devices, Inc.),
- * Copyright (C) 2023-2024 Analog Devices, Inc.
+ * Copyright (C) 2024 Analog Devices, Inc.
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
  * you may not use this file except in compliance with the License.
@@ -383,6 +381,9 @@ typedef struct {
 #define MXC_F_TMR_CTRL1_OUTBEN_A_POS                   14 /**< CTRL1_OUTBEN_A Position */
 #define MXC_F_TMR_CTRL1_OUTBEN_A                       ((uint32_t)(0x1UL << MXC_F_TMR_CTRL1_OUTBEN_A_POS)) /**< CTRL1_OUTBEN_A Mask */
 
+#define MXC_F_TMR_CTRL1_ASYNC_POS                      15 /**< CTRL1_ASYNC Position */
+#define MXC_F_TMR_CTRL1_ASYNC                          ((uint32_t)(0x1UL << MXC_F_TMR_CTRL1_ASYNC_POS)) /**< CTRL1_ASYNC Mask */
+
 #define MXC_F_TMR_CTRL1_CLKSEL_B_POS                   16 /**< CTRL1_CLKSEL_B Position */
 #define MXC_F_TMR_CTRL1_CLKSEL_B                       ((uint32_t)(0x3UL << MXC_F_TMR_CTRL1_CLKSEL_B_POS)) /**< CTRL1_CLKSEL_B Mask */
 

diff --git a/Libraries/CMSIS/Device/Maxim/MAX32675/Include/max32675.svd b/Libraries/CMSIS/Device/Maxim/MAX32675/Include/max32675.svd
@@ -8547,6 +8547,12 @@
        <bitOffset>14</bitOffset>
        <bitWidth>1</bitWidth>
       </field>
+      <field>
+       <name>ASYNC</name>
+       <description>Allows asynchronous reads to the PWM and CNT registers.</description>
+       <bitOffset>15</bitOffset>
+       <bitWidth>1</bitWidth>
+      </field>
       <field>
        <name>CLKSEL_B</name>
        <description>Timer Clock Select for Timer B</description>

diff --git a/Libraries/CMSIS/Device/Maxim/MAX32675/Include/tmr_regs.h b/Libraries/CMSIS/Device/Maxim/MAX32675/Include/tmr_regs.h
@@ -7,9 +7,7 @@
 
 /******************************************************************************
  *
- * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 
- * Analog Devices, Inc.),
- * Copyright (C) 2023-2024 Analog Devices, Inc.
+ * Copyright (C) 2024 Analog Devices, Inc.
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
  * you may not use this file except in compliance with the License.
@@ -383,6 +381,9 @@ typedef struct {
 #define MXC_F_TMR_CTRL1_OUTBEN_A_POS                   14 /**< CTRL1_OUTBEN_A Position */
 #define MXC_F_TMR_CTRL1_OUTBEN_A                       ((uint32_t)(0x1UL << MXC_F_TMR_CTRL1_OUTBEN_A_POS)) /**< CTRL1_OUTBEN_A Mask */
 
+#define MXC_F_TMR_CTRL1_ASYNC_POS                      15 /**< CTRL1_ASYNC Position */
+#define MXC_F_TMR_CTRL1_ASYNC                          ((uint32_t)(0x1UL << MXC_F_TMR_CTRL1_ASYNC_POS)) /**< CTRL1_ASYNC Mask */
+
 #define MXC_F_TMR_CTRL1_CLKSEL_B_POS                   16 /**< CTRL1_CLKSEL_B Position */
 #define MXC_F_TMR_CTRL1_CLKSEL_B                       ((uint32_t)(0x3UL << MXC_F_TMR_CTRL1_CLKSEL_B_POS)) /**< CTRL1_CLKSEL_B Mask */
 

diff --git a/Libraries/CMSIS/Device/Maxim/MAX32690/Include/max32690.svd b/Libraries/CMSIS/Device/Maxim/MAX32690/Include/max32690.svd
@@ -19454,6 +19454,12 @@ signal(s) on transition(s) from low to high or high to low when PM.USBWKEN is se
        <bitOffset>14</bitOffset>
        <bitWidth>1</bitWidth>
       </field>
+      <field>
+       <name>ASYNC</name>
+       <description>Allows asynchronous reads of the PWM and CNT registers.</description>
+       <bitOffset>15</bitOffset>
+       <bitWidth>1</bitWidth>
+      </field>
       <field>
        <name>CLKSEL_B</name>
        <description>Timer Clock Select for Timer B</description>

diff --git a/Libraries/CMSIS/Device/Maxim/MAX32690/Include/tmr_regs.h b/Libraries/CMSIS/Device/Maxim/MAX32690/Include/tmr_regs.h
@@ -7,9 +7,7 @@
 
 /******************************************************************************
  *
- * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 
- * Analog Devices, Inc.),
- * Copyright (C) 2023-2024 Analog Devices, Inc.
+ * Copyright (C) 2024 Analog Devices, Inc.
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
  * you may not use this file except in compliance with the License.
@@ -383,6 +381,9 @@ typedef struct {
 #define MXC_F_TMR_CTRL1_OUTBEN_A_POS                   14 /**< CTRL1_OUTBEN_A Position */
 #define MXC_F_TMR_CTRL1_OUTBEN_A                       ((uint32_t)(0x1UL << MXC_F_TMR_CTRL1_OUTBEN_A_POS)) /**< CTRL1_OUTBEN_A Mask */
 
+#define MXC_F_TMR_CTRL1_ASYNC_POS                      15 /**< CTRL1_ASYNC Position */
+#define MXC_F_TMR_CTRL1_ASYNC                          ((uint32_t)(0x1UL << MXC_F_TMR_CTRL1_ASYNC_POS)) /**< CTRL1_ASYNC Mask */
+
 #define MXC_F_TMR_CTRL1_CLKSEL_B_POS                   16 /**< CTRL1_CLKSEL_B Position */
 #define MXC_F_TMR_CTRL1_CLKSEL_B                       ((uint32_t)(0x3UL << MXC_F_TMR_CTRL1_CLKSEL_B_POS)) /**< CTRL1_CLKSEL_B Mask */
 

diff --git a/Libraries/CMSIS/Device/Maxim/MAX78000/Include/max78000.svd b/Libraries/CMSIS/Device/Maxim/MAX78000/Include/max78000.svd
@@ -11101,6 +11101,12 @@
        <bitOffset>14</bitOffset>
        <bitWidth>1</bitWidth>
       </field>
+      <field>
+       <name>ASYNC</name>
+       <description>Allows asynchronous reads of the PWM and CNT registers.</description>
+       <bitOffset>15</bitOffset>
+       <bitWidth>1</bitWidth>
+      </field>
       <field>
        <name>CLKSEL_B</name>
        <description>Timer Clock Select for Timer B</description>

diff --git a/Libraries/CMSIS/Device/Maxim/MAX78000/Include/tmr_regs.h b/Libraries/CMSIS/Device/Maxim/MAX78000/Include/tmr_regs.h
@@ -7,9 +7,7 @@
 
 /******************************************************************************
  *
- * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 
- * Analog Devices, Inc.),
- * Copyright (C) 2023-2024 Analog Devices, Inc.
+ * Copyright (C) 2024 Analog Devices, Inc.
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
  * you may not use this file except in compliance with the License.
@@ -383,6 +381,9 @@ typedef struct {
 #define MXC_F_TMR_CTRL1_OUTBEN_A_POS                   14 /**< CTRL1_OUTBEN_A Position */
 #define MXC_F_TMR_CTRL1_OUTBEN_A                       ((uint32_t)(0x1UL << MXC_F_TMR_CTRL1_OUTBEN_A_POS)) /**< CTRL1_OUTBEN_A Mask */
 
+#define MXC_F_TMR_CTRL1_ASYNC_POS                      15 /**< CTRL1_ASYNC Position */
+#define MXC_F_TMR_CTRL1_ASYNC                          ((uint32_t)(0x1UL << MXC_F_TMR_CTRL1_ASYNC_POS)) /**< CTRL1_ASYNC Mask */
+
 #define MXC_F_TMR_CTRL1_CLKSEL_B_POS                   16 /**< CTRL1_CLKSEL_B Position */
 #define MXC_F_TMR_CTRL1_CLKSEL_B                       ((uint32_t)(0x3UL << MXC_F_TMR_CTRL1_CLKSEL_B_POS)) /**< CTRL1_CLKSEL_B Mask */
 

diff --git a/Libraries/CMSIS/Device/Maxim/MAX78002/Include/max78002.svd b/Libraries/CMSIS/Device/Maxim/MAX78002/Include/max78002.svd
@@ -16842,6 +16842,12 @@ signal(s) on transition(s) from low to high or high to low when PM.USBWKEN is se
        <bitOffset>14</bitOffset>
        <bitWidth>1</bitWidth>
       </field>
+      <field>
+       <name>ASYNC</name>
+       <description>Allows asynchronous reads of the PWM and CNT registers.</description>
+       <bitOffset>15</bitOffset>
+       <bitWidth>1</bitWidth>
+      </field>
       <field>
        <name>CLKSEL_B</name>
        <description>Timer Clock Select for Timer B</description>

diff --git a/Libraries/CMSIS/Device/Maxim/MAX78002/Include/tmr_regs.h b/Libraries/CMSIS/Device/Maxim/MAX78002/Include/tmr_regs.h
@@ -7,9 +7,7 @@
 
 /******************************************************************************
  *
- * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 
- * Analog Devices, Inc.),
- * Copyright (C) 2023-2024 Analog Devices, Inc.
+ * Copyright (C) 2024 Analog Devices, Inc.
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
  * you may not use this file except in compliance with the License.
@@ -383,6 +381,9 @@ typedef struct {
 #define MXC_F_TMR_CTRL1_OUTBEN_A_POS                   14 /**< CTRL1_OUTBEN_A Position */
 #define MXC_F_TMR_CTRL1_OUTBEN_A                       ((uint32_t)(0x1UL << MXC_F_TMR_CTRL1_OUTBEN_A_POS)) /**< CTRL1_OUTBEN_A Mask */
 
+#define MXC_F_TMR_CTRL1_ASYNC_POS                      15 /**< CTRL1_ASYNC Position */
+#define MXC_F_TMR_CTRL1_ASYNC                          ((uint32_t)(0x1UL << MXC_F_TMR_CTRL1_ASYNC_POS)) /**< CTRL1_ASYNC Mask */
+
 #define MXC_F_TMR_CTRL1_CLKSEL_B_POS                   16 /**< CTRL1_CLKSEL_B Position */
 #define MXC_F_TMR_CTRL1_CLKSEL_B                       ((uint32_t)(0x3UL << MXC_F_TMR_CTRL1_CLKSEL_B_POS)) /**< CTRL1_CLKSEL_B Mask */