FIX: edb cfg example (#950)

Co-authored-by: ring630 <@gmail.com>
ansys · Dec 17, 2024 · 9b5b48f · 9b5b48f
1 parent 574d18e
commit 9b5b48f
Showing 1 changed file with 0 additions and 8 deletions.
diff --git a/examples/use_configuration/pcb_dc_ir.py b/examples/use_configuration/pcb_dc_ir.py
@@ -245,14 +245,6 @@
     show_ruler=True,
 )
 
-# ## Compute power loss
-
-p_layers = h3d.post.compute_power_by_layer(layers=["Top"])
-print(p_layers)
-
-p_nets = h3d.post.compute_power_by_net(nets=["1V0"])
-print(p_nets)
-
 # ## Save HFSS 3D Layout project
 
 h3d.save_project()