A cache simulator for the HEVC Test Model.
This tool converts trace files generated by the HM encoder into read/write operations. These operations are interpreted by the cpu_cache_simulator module, providing the hit count and miss count as output.
Associativity: 2-way (associativity = 1)
Cache size: 64KB (size = 16)
Write policy: WT
Replacement policy: LRU
The simulations were performed for the first 9 frames of each video sequence.
| Video Sequence | Encoder Configuration | Hit Count | Miss Count |
|---|---|---|---|
| BasketballDrive | Low Delay | 17511443650 | 63039761 |
| BasketballDrive | Random Access | 14553596422 | 9593873 |
| BQTerrace | Low Delay | 5106887947 | 29055197 |
| BQTerrace | Random Access | 3926268540 | 26849252 |
| Kimono | Low Delay | 17626625034 | 67411213 |
| Kimono | Random Access | 13282709307 | 57489287 |
| Cactus | Low Delay | 5935797297 | 31586927 |
| Cactus | Random Access | 4743141739 | 31995577 |
| PeopleOnStreet | Low Delay | 33115019171 | 362846795 |
| PeopleOnStreet | Random Access | 29138887161 | 362210646 |
| Traffic | Low Delay | 7150900933 | 177086694 |
| Traffic | Random Access | 5307636671 | 145724066 |