Add support for RISC-V (rebased)

build.zig

@@ -6,6 +6,10 @@ const LazyPath = std.Build.LazyPath;
 
 const src = [_][]const u8{
     "src/guest.c",
+    "src/fault.c",
+    "src/linux.c",
+    "src/dtb.c",
+    "src/virq.c",
     "src/util/util.c",
     "src/util/printf.c",
     "src/virtio/mmio.c",
@@ -34,6 +38,16 @@ const src_aarch64 = [_][]const u8{
     "src/arch/aarch64/vcpu.c",
 };
 
+const src_riscv = [_][]const u8{
+    "src/arch/riscv/fault.c",
+    "src/arch/riscv/sbi.c",
+    "src/arch/riscv/linux.c",
+    "src/arch/riscv/tcb.c",
+    "src/arch/riscv/vcpu.c",
+    "src/arch/riscv/virq.c",
+    "src/arch/riscv/plic.c",
+};
+
 /// Convert the target for Microkit (e.g freestanding AArch64 or RISC-V) to the Linux
 /// equivalent. Assumes musllibc will be used.
 fn linuxTarget(b: *std.Build, target: std.Build.ResolvedTarget) std.Build.ResolvedTarget {
@@ -44,7 +58,7 @@ fn linuxTarget(b: *std.Build, target: std.Build.ResolvedTarget) std.Build.Resolv
     return b.resolveTargetQuery(query);
 }
 
-pub fn build(b: *std.Build) void {
+pub fn build(b: *std.Build) !void {
     const optimize = b.standardOptimizeOption(.{});
     const target = b.standardTargetOptions(.{});
 
@@ -69,23 +83,29 @@ pub fn build(b: *std.Build) void {
             .microkit_board_dir = microkit_board_dir
         });
 
-        const src_arch = switch (target.result.cpu.arch) {
-            .aarch64 => blk: {
+        var srcs = std.ArrayList([]const u8){};
+        defer srcs.deinit(b.allocator);
+
+        try srcs.appendSlice(b.allocator, &src);
+
+        switch (target.result.cpu.arch) {
+            .aarch64 => {
                 const vgic_src = switch (arm_vgic_version.?) {
                     2 => src_aarch64_vgic_v2,
                     3 => src_aarch64_vgic_v3,
                     else => @panic("Unsupported vGIC version given"),
                 };
-
-                break :blk src_aarch64 ++ vgic_src;
+                try srcs.appendSlice(b.allocator, &src_aarch64);
+                try srcs.appendSlice(b.allocator, &vgic_src);
             },
+            .riscv64 => try srcs.appendSlice(b.allocator, &src_riscv),
             else => {
                 std.log.err("Unsupported libvmm architecture given '{s}'", .{ @tagName(target.result.cpu.arch) });
                 std.posix.exit(1);
             }
-        };
+        }
         libvmm.addCSourceFiles(.{
-            .files = &(src ++ src_arch),
+            .files = srcs.items,
             .flags = &.{
                 "-Wall",
                 "-Werror",

examples/rust/src/vmm.rs

@@ -11,6 +11,7 @@ use core::ffi::{c_void};
 use sel4_microkit::{protection_domain, MessageInfo, Channel, Child, Handler, debug_println};
 
 const GUEST_RAM_VADDR: usize = 0x40000000;
+const GUEST_RAM_SIZE: usize = 0x10000000;
 const GUEST_DTB_VADDR: usize = 0x4f000000;
 const GUEST_INIT_RAM_DISK_VADDR: usize = 0x4d700000;
 const GUEST_VCPU_ID: usize = 0;
@@ -33,7 +34,7 @@ const UART_CH: Channel = Channel::new(1);
 #[link(name = "vmm", kind = "static")]
 #[link(name = "microkit", kind = "static")]
 extern "C" {
-    fn linux_setup_images(ram_start: usize,
+    fn linux_setup_images(ram_start: usize, ram_size: usize,
                           kernel: usize, kernel_size: usize,
                           dtb_src: usize, dtb_dest: usize, dtb_size: usize,
                           initrd_src: usize, initrd_dest: usize, initrd_size: usize) -> usize;
@@ -70,7 +71,7 @@ fn init() -> VmmHandler {
     let initrd_addr = initrd.as_ptr() as usize;
 
     unsafe {
-        let guest_pc = linux_setup_images(GUEST_RAM_VADDR,
+        let guest_pc = linux_setup_images(GUEST_RAM_VADDR, GUEST_RAM_SIZE,
                                             linux_addr, linux.len(),
                                             dtb_addr, GUEST_DTB_VADDR, dtb.len(),
                                             initrd_addr, GUEST_INIT_RAM_DISK_VADDR, initrd.len()