GepRC_Taker_F405AIO -fix motor pins and timers by pitts-mo · Pull Request #982 · betaflight/config

pitts-mo · 2025-12-14T18:50:51Z

After flashing 2025.12.0-RC4 onto the GepRC_Taker_F405AIO I found the pins and timers for Motors 3 and 4 are not correct.

CLI changes required were:
resource MOTOR 3 C08
resource MOTOR 4 C09
timer C08 AF3
timer C09 AF3
dma pin C08 1
dma pin C09 0

This PR attempts to address this.

Summary by CodeRabbit

Bug Fixes
- Corrected Motor 3 and Motor 4 output pin assignments on the flight controller board to their proper hardware connections
- Updated associated timer pin mappings to maintain proper synchronization between motor output channels and timer resources
- Resolves motor control functionality issues on this hardware variant

_{✏️ Tip: You can customize this high-level summary in your review settings.}

coderabbitai · 2025-12-14T18:51:00Z

Walkthrough

Motor pin assignments for the GEPRC_TAKER_F405AIO flight controller are updated: MOTOR3_PIN and MOTOR4_PIN remapped from PE13/PE14 to PC08/PC09 respectively, with corresponding timer pin mapping entries updated to match the new pin assignments.

Changes

Cohort / File(s)	Change Summary
Hardware Pin Configuration `configs/GEPRC_TAKER_F405AIO/config.h`	MOTOR3_PIN remapped from PE13 to PC08; MOTOR4_PIN remapped from PE14 to PC09. TIMER_PIN_MAPPING entries updated: TIMER_PIN_MAP(2, ...) now references PC08 (was PE13); TIMER_PIN_MAP(3, ...) now references PC09 (was PE14).

Estimated code review effort

🎯 1 (Trivial) | ⏱️ ~3 minutes

Single file with straightforward pin mapping updates
No logic changes or control flow alterations
Changes are mechanical and self-contained

Possibly related PRs

Add GEPRC_TAKER_F405AIO config.h #951: Introduced the original MOTOR3_PIN/MOTOR4_PIN and TIMER_PIN_MAPPING entries in the same config file now being updated.

Suggested labels

Bugfix

Suggested reviewers

haslinghuis
ot0tot
nerdCopter

Pre-merge checks and finishing touches

❌ Failed checks (1 warning)

Check name	Status	Explanation	Resolution
Description check	⚠️ Warning	The description is largely incomplete; it provides context about the issue but lacks the mandatory review checklist and hardware compliance information required by the template.	Complete the PR description by including the mandatory checklist items, confirming adherence to Betaflight design guidelines, and addressing the hardware compliance requirements specified in the template.

✅ Passed checks (2 passed)

Check name	Status	Explanation
Title check	✅ Passed	The title clearly and specifically describes the main change: fixing motor pins and timers for the GepRC_Taker_F405AIO board.
Docstring Coverage	✅ Passed	No functions found in the changed files to evaluate docstring coverage. Skipping docstring coverage check.

✨ Finishing touches

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🧪 Generate unit tests (beta)

Create PR with unit tests
Post copyable unit tests in a comment

📜 Recent review details

Configuration used: Path: .coderabbit.yaml

Review profile: CHILL

Plan: Pro

📥 Commits

Reviewing files that changed from the base of the PR and between 83ee891 and 1ab8151.

📒 Files selected for processing (1)

configs/GEPRC_TAKER_F405AIO/config.h (2 hunks)

🧰 Additional context used

🧠 Learnings (15)

📓 Common learnings

Learnt from: osirisinferi
Repo: betaflight/config PR: 972
File: configs/AXISFLYING_H743PRO/config.h:0-0
Timestamp: 2025-12-03T20:45:27.890Z
Learning: In Betaflight board configurations, always verify that TIMER_PIN_MAP entries do not use the same pin macro name multiple times. Each physical pin should appear only once in the TIMER_PIN_MAP definitions. For example, GYRO_1_CLKIN_PIN and GYRO_2_CLKIN_PIN should each appear exactly once, not have GYRO_1_CLKIN_PIN appear twice. This is a blocking issue that must be resolved before approval.

Learnt from: haslinghuis
Repo: betaflight/config PR: 0
File: :0-0
Timestamp: 2025-06-02T16:16:20.197Z
Learning: In STM32F405-based flight controller configurations, timer pin mappings must be carefully analyzed for DMA stream conflicts, especially between motor timers, LED strip timers, and SPI DMA assignments. Changes to TIMER_PIN_MAPPING should include verification that all required peripherals (motors, LED strip, blackbox SPI) can coexist without DMA conflicts.

Learnt from: osirisinferi
Repo: betaflight/config PR: 0
File: :0-0
Timestamp: 2025-09-26T16:32:46.694Z
Learning: When reviewing hardware configuration files like Betaflight configs, always check for pin assignment conflicts by verifying that no physical pins (like PB10, PB11, etc.) are assigned to multiple peripheral functions simultaneously.

Learnt from: ot0tot
Repo: betaflight/config PR: 834
File: configs/RADIOLINKF405/config.h:79-88
Timestamp: 2025-07-14T15:41:14.364Z
Learning: In STM32F405 configurations, PB1 typically maps to TIM3_CH4 and PC9 typically maps to TIM8_CH4. These are different timers and do not share DMA resources, so there is no conflict when both pins are used simultaneously (e.g., PB1 for LED_STRIP and PC9 for MOTOR4).

Learnt from: haslinghuis
Repo: betaflight/config PR: 798
File: configs/FURYF4OSD/config.h:88-88
Timestamp: 2025-05-31T17:01:39.423Z
Learning: For STM32F4xx platforms, PB1 pin timer definitions are:
1 = DEF_TIM(TIM1, CH3N, PB1, 0, 0)
2 = DEF_TIM(TIM3, CH4, PB1, 0, 0) 
3 = DEF_TIM(TIM8, CH3N, PB1, 0, 0)
Timer instance 2 (TIM3, CH4) is the correct mapping for PB1 motor control on STM32F4xx platforms as defined in src/platform/STM32/timer_stm32f4xx.c

Learnt from: haslinghuis
Repo: betaflight/config PR: 888
File: configs/ZEX_ATHENA_MINI/config.h:0-0
Timestamp: 2025-08-28T20:45:36.652Z
Learning: In STM32H743 Betaflight configurations, PB0 can use multiple timer options including TIM1_CH2N, TIM3_CH3, and TIM8_CH2N as defined in timer_stm32h7xx.c. For CAMERA_CONTROL_PIN assignments, TIM3_CH3 (timer index 3) is the appropriate choice.

Learnt from: haslinghuis
Repo: betaflight/config PR: 888
File: configs/ZEX_ATHENA_MINI/config.h:0-0
Timestamp: 2025-08-28T20:45:36.652Z
Learning: In STM32H743 Betaflight configurations, PA15 maps to TIM2_CH1 (timer index 2) as defined in timer_stm32h7xx.c. When used for GYRO_CLKIN functionality, it's recommended to use the macro name GYRO_1_CLKIN_PIN in TIMER_PIN_MAPPING for consistency with other pin definitions.

Learnt from: haslinghuis
Repo: betaflight/config PR: 870
File: configs/ZEX_ATHENA_STD_PRO/config.h:54-55
Timestamp: 2025-08-21T11:11:19.213Z
Learning: For STM32H743 in Betaflight, UART4 can use PB8 (UART4_RX) and PB9 (UART4_TX) with GPIO_AF8_UART4, as confirmed in the official Betaflight codebase at src/platform/STM32/serial_uart_stm32h7xx.c. This is a valid pin mapping despite what some generic STM32 documentation might suggest.

Learnt from: haslinghuis
Repo: betaflight/config PR: 881
File: configs/GEPRC_TAKER_H743MINI/config.h:86-99
Timestamp: 2025-09-01T19:58:52.049Z
Learning: For STM32H743 PB0 in Betaflight, there are three timer options: TIM1_CH2N, TIM3_CH3, and TIM8_CH2N. Only TIM3_CH3 (timer index 2) is suitable for GYRO_CLKIN as the other two are complementary (N) channels. This is confirmed in timer_stm32h7xx.c.

Learnt from: haslinghuis
Repo: betaflight/config PR: 883
File: configs/HGLRCF435_AIO/config.h:50-58
Timestamp: 2025-08-26T14:26:11.863Z
Learning: For AT32F435 in Betaflight, UART4 supports multiple pin options including PH2 (UART4_RX) and PH3 (UART4_TX) with GPIO_MUX_8, as confirmed in the official Betaflight codebase at src/platform/AT32/serial_uart_at32f43x.c. The AT32 platform has broader pin support than initially apparent from basic searches.

📚 Learning: 2025-06-02T16:16:20.197Z

Learnt from: haslinghuis
Repo: betaflight/config PR: 0
File: :0-0
Timestamp: 2025-06-02T16:16:20.197Z
Learning: In STM32F405-based flight controller configurations, timer pin mappings must be carefully analyzed for DMA stream conflicts, especially between motor timers, LED strip timers, and SPI DMA assignments. Changes to TIMER_PIN_MAPPING should include verification that all required peripherals (motors, LED strip, blackbox SPI) can coexist without DMA conflicts.

Applied to files:

configs/GEPRC_TAKER_F405AIO/config.h

📚 Learning: 2025-12-03T20:45:27.890Z

Learnt from: osirisinferi
Repo: betaflight/config PR: 972
File: configs/AXISFLYING_H743PRO/config.h:0-0
Timestamp: 2025-12-03T20:45:27.890Z
Learning: In Betaflight board configurations, always verify that TIMER_PIN_MAP entries do not use the same pin macro name multiple times. Each physical pin should appear only once in the TIMER_PIN_MAP definitions. For example, GYRO_1_CLKIN_PIN and GYRO_2_CLKIN_PIN should each appear exactly once, not have GYRO_1_CLKIN_PIN appear twice. This is a blocking issue that must be resolved before approval.

Applied to files:

configs/GEPRC_TAKER_F405AIO/config.h

📚 Learning: 2025-05-31T17:01:39.423Z

Learnt from: haslinghuis
Repo: betaflight/config PR: 798
File: configs/FURYF4OSD/config.h:88-88
Timestamp: 2025-05-31T17:01:39.423Z
Learning: For STM32F4xx platforms, PB1 pin timer definitions are:
1 = DEF_TIM(TIM1, CH3N, PB1, 0, 0)
2 = DEF_TIM(TIM3, CH4, PB1, 0, 0) 
3 = DEF_TIM(TIM8, CH3N, PB1, 0, 0)
Timer instance 2 (TIM3, CH4) is the correct mapping for PB1 motor control on STM32F4xx platforms as defined in src/platform/STM32/timer_stm32f4xx.c

Applied to files:

configs/GEPRC_TAKER_F405AIO/config.h

📚 Learning: 2025-07-14T15:41:14.364Z

Learnt from: ot0tot
Repo: betaflight/config PR: 834
File: configs/RADIOLINKF405/config.h:79-88
Timestamp: 2025-07-14T15:41:14.364Z
Learning: In STM32F405 configurations, PB1 typically maps to TIM3_CH4 and PC9 typically maps to TIM8_CH4. These are different timers and do not share DMA resources, so there is no conflict when both pins are used simultaneously (e.g., PB1 for LED_STRIP and PC9 for MOTOR4).

Applied to files:

configs/GEPRC_TAKER_F405AIO/config.h

📚 Learning: 2025-07-14T16:16:56.822Z

Learnt from: haslinghuis
Repo: betaflight/config PR: 835
File: configs/HDZERO_HALO_MPU6000/config.h:44-56
Timestamp: 2025-07-14T16:16:56.822Z
Learning: For Betaflight board configurations of boards already in production, pin assignments in config.h files reflect the actual hardware design and cannot be changed, even if they present potential conflicts with debug interfaces. The configuration must match the physical board layout, not ideal software design preferences.

Applied to files:

configs/GEPRC_TAKER_F405AIO/config.h

📚 Learning: 2025-08-28T20:45:36.652Z

Learnt from: haslinghuis
Repo: betaflight/config PR: 888
File: configs/ZEX_ATHENA_MINI/config.h:0-0
Timestamp: 2025-08-28T20:45:36.652Z
Learning: In STM32H743 Betaflight configurations, PB0 can use multiple timer options including TIM1_CH2N, TIM3_CH3, and TIM8_CH2N as defined in timer_stm32h7xx.c. For CAMERA_CONTROL_PIN assignments, TIM3_CH3 (timer index 3) is the appropriate choice.

Applied to files:

configs/GEPRC_TAKER_F405AIO/config.h

📚 Learning: 2025-08-28T20:45:36.652Z

Learnt from: haslinghuis
Repo: betaflight/config PR: 888
File: configs/ZEX_ATHENA_MINI/config.h:0-0
Timestamp: 2025-08-28T20:45:36.652Z
Learning: In STM32H743 Betaflight configurations, PA15 maps to TIM2_CH1 (timer index 2) as defined in timer_stm32h7xx.c. When used for GYRO_CLKIN functionality, it's recommended to use the macro name GYRO_1_CLKIN_PIN in TIMER_PIN_MAPPING for consistency with other pin definitions.

Applied to files:

configs/GEPRC_TAKER_F405AIO/config.h

📚 Learning: 2025-09-26T16:32:46.694Z

Learnt from: osirisinferi
Repo: betaflight/config PR: 0
File: :0-0
Timestamp: 2025-09-26T16:32:46.694Z
Learning: When reviewing hardware configuration files like Betaflight configs, always check for pin assignment conflicts by verifying that no physical pins (like PB10, PB11, etc.) are assigned to multiple peripheral functions simultaneously.

Applied to files:

configs/GEPRC_TAKER_F405AIO/config.h

📚 Learning: 2025-08-21T11:11:19.213Z

Learnt from: haslinghuis
Repo: betaflight/config PR: 870
File: configs/ZEX_ATHENA_STD_PRO/config.h:54-55
Timestamp: 2025-08-21T11:11:19.213Z
Learning: For STM32H743 in Betaflight, UART4 can use PB8 (UART4_RX) and PB9 (UART4_TX) as confirmed in the official Betaflight codebase at src/platform/STM32/serial_uart_stm32h7xx.c. This contradicts some generic STM32 documentation that might not show all supported pin configurations used by Betaflight.

Applied to files:

configs/GEPRC_TAKER_F405AIO/config.h

📚 Learning: 2025-08-21T11:11:19.213Z

Learnt from: haslinghuis
Repo: betaflight/config PR: 870
File: configs/ZEX_ATHENA_STD_PRO/config.h:54-55
Timestamp: 2025-08-21T11:11:19.213Z
Learning: For STM32H743 in Betaflight, UART4 can use PB8 (UART4_RX) and PB9 (UART4_TX) with GPIO_AF8_UART4, as confirmed in the official Betaflight codebase at src/platform/STM32/serial_uart_stm32h7xx.c. This is a valid pin mapping despite what some generic STM32 documentation might suggest.

Applied to files:

configs/GEPRC_TAKER_F405AIO/config.h

📚 Learning: 2025-08-26T14:26:11.863Z

Learnt from: haslinghuis
Repo: betaflight/config PR: 883
File: configs/HGLRCF435_AIO/config.h:50-58
Timestamp: 2025-08-26T14:26:11.863Z
Learning: For AT32F435 in Betaflight, UART4 supports multiple pin options including PH2 (UART4_RX) and PH3 (UART4_TX) with GPIO_MUX_8, as confirmed in the official Betaflight codebase at src/platform/AT32/serial_uart_at32f43x.c. The AT32 platform has broader pin support than initially apparent from basic searches.

Applied to files:

configs/GEPRC_TAKER_F405AIO/config.h

📚 Learning: 2025-07-23T13:43:50.456Z

Learnt from: ot0tot
Repo: betaflight/config PR: 0
File: :0-0
Timestamp: 2025-07-23T13:43:50.456Z
Learning: For Betaflight board configuration reviews, always verify that serial port defines (like ESC_SENSOR_UART, MSP_UART, GPS_UART, etc.) use valid SERIAL_PORT identifiers that match those defined in the Betaflight codebase at src/main/io/serial.h. Common valid identifiers include SERIAL_PORT_USART1, SERIAL_PORT_USART2, SERIAL_PORT_USART3, SERIAL_PORT_UART4, SERIAL_PORT_UART5, etc. Invalid identifiers like SERIAL_PORT_UART3 (should be SERIAL_PORT_USART3) will cause build failures.

Applied to files:

configs/GEPRC_TAKER_F405AIO/config.h

📚 Learning: 2025-09-01T19:58:52.049Z

Learnt from: haslinghuis
Repo: betaflight/config PR: 881
File: configs/GEPRC_TAKER_H743MINI/config.h:86-99
Timestamp: 2025-09-01T19:58:52.049Z
Learning: For STM32H743 in Betaflight, PB0 has multiple timer options but only timer index 2 provides a non-complementary output suitable for GYRO_CLKIN functionality. The other timer options for PB0 are N channels (complementary outputs) which are not appropriate for CLKIN usage.

Applied to files:

configs/GEPRC_TAKER_F405AIO/config.h

📚 Learning: 2025-09-01T19:58:52.049Z

Learnt from: haslinghuis
Repo: betaflight/config PR: 881
File: configs/GEPRC_TAKER_H743MINI/config.h:86-99
Timestamp: 2025-09-01T19:58:52.049Z
Learning: For STM32H743 PB0 in Betaflight, there are three timer options: TIM1_CH2N, TIM3_CH3, and TIM8_CH2N. Only TIM3_CH3 (timer index 2) is suitable for GYRO_CLKIN as the other two are complementary (N) channels. This is confirmed in timer_stm32h7xx.c.

Applied to files:

configs/GEPRC_TAKER_F405AIO/config.h

🔇 Additional comments (2)

configs/GEPRC_TAKER_F405AIO/config.h (2)

43-44: Pin changes align with hardware-tested CLI fix.

The motor pin assignments correctly update MOTOR3 and MOTOR4 from PE13/PE14 to PC08/PC09 as confirmed by the author's runtime testing.

84-91: Remove embedded scratchpad and non-functional tags from review comment before resubmitting.

The review comment contains internal task tracking syntax that should not be present in a public review. Additionally, the substantive verification question about timer instance mappings cannot be definitively answered in the config repository context, as timer platform definitions (timer_stm32f4xx.c) are in the main Betaflight firmware repository. If timer verification is essential, consult that source repository or provide CLI command context showing AF3 assignments for these pins.

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haslinghuis · 2025-12-14T18:57:35Z

@ot0tot please verify - or is this an copycat version ?

ot0tot · 2025-12-15T02:32:16Z

This was the original version they shipped test hardware for. After feedback, they revised the design and said they were modifying the hardware to what was in the approved config. (Discord ref: https://discord.com/channels/1201422947445907466/1399235158778974209/1417398072249552987 )

@pitts-mo How long ago did you purchase this FC, and where from?

pitts-mo · 2025-12-15T10:17:47Z

Purchased a Darkstar22 last month from Aliexpress "FPV Online Store"

The Darkstar22 dump files from GepRC.com appear to match the board I have.

pitts-mo · 2025-12-15T22:16:30Z

I am unable to access the specific discord conversation but it seems I should just close this PR.

@ot0tot , I am curios the reason and extent of changes. Are you in a position to help GepRC prepare a download FAQ notice for motors 3, 4, and anything else not working on early versions of the Taker_F405AIO board along with the minimal CLI changes to fully support the early version of the board?

These are the CLI changes I have so far :
resource MOTOR 3 C08
resource MOTOR 4 C09
timer C08 AF3
timer C09 AF3
dma pin C08 1
dma pin C09 0
save

Thank you,
-p

haslinghuis · 2025-12-15T22:19:38Z

@pitts-mo - IMO GEPRC should not have made this board available before approval. Make a request for replacement with final board.

pitts-mo · 2025-12-15T22:27:48Z

These changes were needed for the Taker_F405AIO in my Darkstar22 and are likely only needed for a limited number of initial Taker_F405AIO production units.

ot0tot · 2025-12-16T03:39:46Z

These changes were needed for the Taker_F405AIO in my Darkstar22 and are likely only needed for a limited number of initial Taker_F405AIO production units.

Thank you for the report, we are following up with the manufacturer.

BalzGuenat · 2026-01-21T23:54:37Z

Received a DarkStar22 today from AliExpress store "YSRC FPV Store" and it also uses pins C8 and C9 for motors 3 and 4.

Incidentally, this also cost me a few hours of frustration :(. It would be great if it was easier for those affected to find this information. Search terms that address the visible symptoms of this, such as "DarkStar22 two ESCs missing" did not yield useful results.

ot0tot · 2026-01-22T00:16:58Z

Received a DarkStar22 today from AliExpress store "YSRC FPV Store" and it also uses pins C8 and C9 for motors 3 and 4.

Incidentally, this also cost me a few hours of frustration :(. It would be great if it was easier for those affected to find this information. Search terms that address the visible symptoms of this, such as "DarkStar22 two ESCs missing" did not yield useful results.

Did it come configured properly from the factory, or were motors 3 and 4 not working?

BalzGuenat · 2026-01-22T09:20:09Z

Received a DarkStar22 today from AliExpress store "YSRC FPV Store" and it also uses pins C8 and C9 for motors 3 and 4.
Incidentally, this also cost me a few hours of frustration :(. It would be great if it was easier for those affected to find this information. Search terms that address the visible symptoms of this, such as "DarkStar22 two ESCs missing" did not yield useful results.

Did it come configured properly from the factory, or were motors 3 and 4 not working?

I can't be completely sure because one of the first things I did was update the Betaflight version from the stock unreleased dev build to 2025.12.1 and I only did a normal CLI backup, not a complete dump. So I never tested the motors with the stock config (an error, in hindsight). Presumably, it was configured correctly because the backup did still contain dma pin C08 1, which errored on 2025.12.1.

I've done a more detailed write-up here.

ot0tot · 2026-01-22T16:18:48Z

GEPRC opened a PR to address this also: #1017

Taker_F405AIO -fix motor pins and timers

1ab8151

coderabbitai bot approved these changes Dec 14, 2025

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pitts-mo closed this Dec 15, 2025

pitts-mo reopened this Dec 15, 2025

pitts-mo closed this Dec 15, 2025

pitts-mo reopened this Jan 22, 2026

ot0tot closed this Jan 22, 2026

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GepRC_Taker_F405AIO -fix motor pins and timers#982

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