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CI #5272

Re-run triggered September 13, 2024 12:32
Status Success
Total duration 11m 2s
Artifacts 43

ci.yml

on: schedule
Build dependencies
2m 15s
Build dependencies
bittide-instances hardware-in-the-loop test matrix generation
13s
bittide-instances hardware-in-the-loop test matrix generation
bittide-instances synthesis matrix generation
13s
bittide-instances synthesis matrix generation
license-check
9s
license-check
Basic linting
27s
Basic linting
bittide-experiments unittests
51s
bittide-experiments unittests
Bittide tests
6m 25s
Bittide tests
Rust Lints
41s
Rust Lints
Firmware Support Unit Tests
2m 14s
Firmware Support Unit Tests
Host Tools Unit Tests
26s
Host Tools Unit Tests
Firmware Limit Checks
37s
Firmware Limit Checks
bittide-instances doctests
46s
bittide-instances doctests
bittide-instances unittests
1m 27s
bittide-instances unittests
Matrix: synth
Matrix: HITL
Generate clock control report
4m 4s
Generate clock control report
All jobs finished
2s
All jobs finished
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Annotations

4 warnings
HITL (boardTestSimple, test)
No files were found with the provided path: _build/vivado/*/ila-data _build/hitl/*. No artifacts will be uploaded.
HITL (fincFdecTests, test)
No files were found with the provided path: _build/vivado/*/ila-data _build/hitl/*. No artifacts will be uploaded.
HITL (linkConfigurationTest, test)
No files were found with the provided path: _build/vivado/*/ila-data _build/hitl/*. No artifacts will be uploaded.
HITL (syncInSyncOut, test)
No files were found with the provided path: _build/vivado/*/ila-data _build/hitl/*. No artifacts will be uploaded.

Artifacts

Produced during runtime
Name Size
CC-HITLT Plot Sources Expired
1.28 MB
Clock Control Reports Expired
847 KB
_build-hwCcTopologyTest-debug Expired
24.4 MB