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Build instructions ‐ Saturn

Camel Coder edited this page Aug 20, 2024 · 5 revisions
# Dockerfile
FROM continuumio/miniconda3:latest

RUN apt-get update \
        && apt-get install -y build-essential wget git unzip python3 sudo file python3-vcstools libboost-dev vim cpio binutils \
        && apt-get clean \
        && rm -rf /var/lib/apt/lists/*

RUN conda install conda-lock

RUN git clone https://github.com/ucb-bar/chipyard.git chipyard
WORKDIR chipyard

COPY ./stage.sh ./stage.sh
RUN bash ./stage.sh 1 ; sed 's/conda activate/source activate/g' -i ./env.sh
RUN bash ./stage.sh 2
RUN bash ./stage.sh 3
RUN bash ./stage.sh 5
RUN bash ./stage.sh 10

RUN git pull; scripts/init-submodules-no-riscv-tools.sh

COPY ./build.sh ./build.sh
RUN bash ./build.sh

COPY ./build-bench.sh ./build-bench.sh
RUN bash ./build-bench.sh
#!/bin/sh
# stage.sh

[ $1 -gt 1 ] && source env.sh
case $1 in
        1)  ./build-setup.sh riscv-tools -s 2 -s 3 -s 4 -s 5 -s 6 -s 7 -s 8 -s 9 -s 10 -s 11 ;;
        2)  ./build-setup.sh riscv-tools -s 1 -s 3 -s 4 -s 5 -s 6 -s 7 -s 8 -s 9 -s 10 -s 11 ;;
        3)  ./build-setup.sh riscv-tools -s 1 -s 2 -s 4 -s 5 -s 6 -s 7 -s 8 -s 9 -s 10 -s 11 ;;
        5)  ./build-setup.sh riscv-tools -s 1 -s 2 -s 3 -s 4 -s 6 -s 7 -s 8 -s 9 -s 10 -s 11 ;;
        10) ./build-setup.sh riscv-tools -s 1 -s 2 -s 3 -s 4 -s 5 -s 6 -s 7 -s 8 -s 9  -s 11 ;;
esac
#!/bin/sh
# build.sh

CONF=GENV256D128ShuttleConfig
source env.sh
make -C sims/verilator CONFIG=$CONF -j$(nproc)
make -C tests
echo "source env.sh" >> $HOME/.bashrc
echo "echo \"make -C /chipyard/sims/verilator run-binary CONFIG=$CONF LOADMEM=1 EXTRA_SIM_FLAGS=+cospike-printf=0 BINARY=/chipyard/tests/hello.riscv\"" >> $HOME/.bashrc
#!/bin/sh
# build-bench.sh

source env.sh
cd tests
git clone --recursive https://github.com/camel-cdr/rvv-bench
cd rvv-bench
cat <<EOF >config.mk
CC=riscv64-unknown-elf-gcc
CFLAGS=-static -fno-common -fno-builtin-printf -march=rv64gcv_zfh_zba_zbb_zbs_zvbb -specs=htif_nano.specs -O3
EOF
cd bench
cat <<EOF >config.h
#define HAS_E64 (__riscv_v_elen >= 64)
#define HAS_F16 1
#define MAX_MEM (4024*8)
#define NEXT(c) (c + c/2 + 3)
#define MIN_REPEATS 1
#define MAX_REPEATS 1
#define STOP_CYCLES 1
#define VALIDATE 0
#define SCALE_mandelbrot(N) ((N)/10)
#define SCALE_mergelines(N) ((N)/10)
#define mandelbrot_ITER 100
EOF
make -j$(nproc)
$ docker build -t saturn . --progress=plain
$ docker run --rm -it saturn
$ make -C /chipyard/sims/verilator run-binary CONFIG=GENV256D128ShuttleConfig LOADMEM=1 EXTRA_SIM_FLAGS=+cospike-printf=0 TIMEOUT_CYCLES=999999999999999999 BINARY=/chipyard/tests/rvv-bench/bench/memcpy
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