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Merge pull request #15 from clash-lang/bump-ghc
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Add GHC 9.2 and 9.4 to CI
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martijnbastiaan authored Feb 28, 2024
2 parents 4d9eee4 + 7bf9a08 commit a81bd48
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28 changes: 20 additions & 8 deletions .github/workflows/ci.yml
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
# SPDX-FileCopyrightText: 2022 Google LLC
#
#
# SPDX-License-Identifier: Apache-2.0

name: CI
Expand Down Expand Up @@ -54,7 +54,7 @@ jobs:
with:
token: ${{ secrets.GITHUB_TOKEN }}
args: --target riscv32imc-unknown-none-elf --all-features

rust-build-programs:
name: Build Programs
runs-on: ubuntu-22.04
Expand All @@ -69,28 +69,32 @@ jobs:
run: |
apt-get update
apt-get install -y curl build-essential
- uses: actions-rs/toolchain@v1
with:
toolchain: 1.67.1 # See Note [Updating Rust versions]
profile: minimal
target: riscv32imc-unknown-none-elf
components: clippy, rustfmt

- name: Caching
uses: Swatinem/rust-cache@v2

- name: Build release binaries
uses: actions-rs/cargo@v1
with:
command: build
args: --release

- name: Build debug binaries
uses: actions-rs/cargo@v1
with:
command: build

- name: Archive Integration Test Binaries
run: |
cd clash-vexriscv-sim; sh bundle_test_binaries.sh
- name: Upload Integration Test Binaries
uses: actions/upload-artifact@v3
with:
Expand All @@ -103,8 +107,16 @@ jobs:
runs-on: ubuntu-22.04
needs: [rust-build-programs]

strategy:
fail-fast: false
matrix:
ghc:
- "9.0.2"
- "9.2.8"
- "9.4.8"

container:
image: ghcr.io/clash-lang/clash-ci-9.0.2:2022-12-13
image: ghcr.io/clash-lang/clash-ci:${{ matrix.ghc }}-20240221

steps:
- name: Checkout
Expand All @@ -120,8 +132,8 @@ jobs:
with:
path: |
~/.cabal/store
key: packages-cachebust-1-${{ hashFiles('cabal.project.freeze', 'cabal.project') }}
restore-keys: packages-cachebust-1-
key: packages-cachebust-2-${{ matrix.ghc }}-${{ hashFiles('cabal.project.freeze', 'cabal.project') }}
restore-keys: packages-cachebust-2-${{ matrix.ghc }}

- name: Install build deps
run: |
Expand Down
6 changes: 2 additions & 4 deletions cabal.project
Original file line number Diff line number Diff line change
Expand Up @@ -8,8 +8,6 @@ packages:

write-ghc-environment-files: always

with-compiler: ghc-9.0.2

tests: True


Expand Down Expand Up @@ -49,9 +47,9 @@ source-repository-package
source-repository-package
type: git
location: https://github.com/clash-lang/clash-protocols.git
tag: f7ea04834d396669fe4ef404b03541601a68b136
tag: eb76cd1be746ae91beff60c0f16d8c1dd888662c

source-repository-package
type: git
location: https://github.com/cchalmers/circuit-notation.git
tag: 618e37578e699df235f2e7150108b6401731919b
tag: 19b386c4aa3ff690758ae089c7754303f3500cc9
8 changes: 4 additions & 4 deletions clash-vexriscv-sim/clash-vexriscv-sim.cabal
Original file line number Diff line number Diff line change
Expand Up @@ -60,9 +60,9 @@ common common-options
-fno-worker-wrapper
-- clash-prelude will set suitable version bounds for the plugins
build-depends:
base >= 4.14 && < 4.16,
base >= 4.14 && < 4.19,
clash-prelude >= 1.6 && < 1.10,
containers >= 0.6 && < 0.7,
containers >= 0.6 && < 0.8,
ghc-typelits-natnormalise,
ghc-typelits-extra,
ghc-typelits-knownnat,
Expand All @@ -79,11 +79,11 @@ library
Utils.Storage
build-depends:
base,
bytestring >= 0.10 && < 0.13,
clash-prelude,
clash-protocols,
clash-vexriscv,
elf >= 0.31 && < 0.32,
bytestring >= 0.10 && < 0.11,

executable clash
import: common-options
Expand Down Expand Up @@ -132,6 +132,6 @@ test-suite unittests
containers,
directory,
temporary >=1.1 && <1.4,
tasty >= 1.2 && < 1.5,
tasty >= 1.2 && < 1.6,
tasty-hunit >= 0.10 && < 0.11,
filepath
3 changes: 2 additions & 1 deletion clash-vexriscv-sim/src/Utils/Cpu.hs
Original file line number Diff line number Diff line change
Expand Up @@ -11,6 +11,7 @@ import Clash.Prelude

import Protocols.Wishbone
import VexRiscv
import VexRiscv.VecToTuple (vecToTuple)

import GHC.Stack (HasCallStack)

Expand Down Expand Up @@ -61,7 +62,7 @@ cpu bootIMem bootDMem = (output, writes, iS2M, dS2M)
dummyS2M = dummy dummyM2S
bootDS2M = bootDMem bootDM2S

(dS2M, unbundle -> (dummyM2S :> bootDM2S :> Nil)) = interconnectTwo
(dS2M, vecToTuple . unbundle -> (dummyM2S, bootDM2S)) = interconnectTwo
(unBusAddr <$> dM2S)
((0x0000_0000, dummyS2M) :> (0x4000_0000, bootDS2M) :> Nil)

Expand Down
17 changes: 9 additions & 8 deletions clash-vexriscv-sim/src/Utils/ProgramLoad.hs
Original file line number Diff line number Diff line change
Expand Up @@ -33,8 +33,8 @@ loadProgram path = do

let
endianSwap dat =
L.concatMap (\[a, b, c, d] -> [d, c, b, a]) $
chunkFill 4 0 dat
L.concatMap (\(a, b, c, d) -> [d, c, b, a]) $
chunkFill4 0 dat

-- endian swap instructions
iMemContents = endianSwap $
Expand All @@ -51,9 +51,10 @@ loadProgram path = do
content :: BinaryData -> [BitVector 8]
content bin = L.map snd $ I.toAscList bin

chunkFill :: Int -> a -> [a] -> [[a]]
chunkFill _ _ [] = []
chunkFill n fill xs =
let (first0, rest) = L.splitAt n xs
first1 = first0 <> L.replicate (n - L.length first0) fill
in first1 : chunkFill n fill rest
chunkFill4 :: a -> [a] -> [(a, a, a, a)]
chunkFill4 fill = \case
[] -> []
[a] -> [(a, fill, fill, fill)]
[a, b] -> [(a, b, fill, fill)]
[a, b, c] -> [(a, b, c, fill)]
(a:b:c:d:rest) -> (a, b, c, d) : chunkFill4 fill rest
8 changes: 6 additions & 2 deletions clash-vexriscv/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -40,13 +40,17 @@ $(OUT_DIR)/impl.o: $(FFI_DIR)/impl.cpp $(FFI_DIR)/interface.h
$(OUT_DIR)/verilated.o: $(shell pkg-config --variable=includedir verilator)/verilated.cpp
$(CXX) $(FFI_CPPFLAGS) -c $(shell pkg-config --variable=includedir verilator)/verilated.cpp -o $(OUT_DIR)/verilated.o

$(OUT_DIR)/verilated_threads.o: $(shell pkg-config --variable=includedir verilator)/verilated_threads.cpp
$(CXX) $(FFI_CPPFLAGS) -c $(shell pkg-config --variable=includedir verilator)/verilated_threads.cpp -o $(OUT_DIR)/verilated_threads.o

$(OUT_DIR)/VVexRiscv__ALL.a: $(VERILATOR_DIR)/VVexRiscv__ALL.a
cp $(VERILATOR_DIR)/VVexRiscv__ALL.a $(OUT_DIR)/VVexRiscv__ALL.a

$(OUT_DIR)/libVexRiscvFFI.a: $(OUT_DIR)/VVexRiscv__ALL.a $(OUT_DIR)/impl.o $(OUT_DIR)/verilated.o
$(OUT_DIR)/libVexRiscvFFI.a: $(OUT_DIR)/VVexRiscv__ALL.a $(OUT_DIR)/impl.o $(OUT_DIR)/verilated.o $(OUT_DIR)/verilated_threads.o
rm -f $(OUT_DIR)/libVexRiscvFFI.a
cp $(OUT_DIR)/VVexRiscv__ALL.a $(OUT_DIR)/libVexRiscvFFI.a
ar r \
$(OUT_DIR)/libVexRiscvFFI.a \
$(OUT_DIR)/impl.o \
$(OUT_DIR)/verilated.o
$(OUT_DIR)/verilated.o \
$(OUT_DIR)/verilated_threads.o
21 changes: 12 additions & 9 deletions clash-vexriscv/clash-vexriscv.cabal
Original file line number Diff line number Diff line change
Expand Up @@ -87,9 +87,9 @@ common common-options
-fno-worker-wrapper
-- clash-prelude will set suitable version bounds for the plugins
build-depends:
base >= 4.14 && < 4.16,
base >= 4.14 && < 4.18,
clash-prelude >= 1.6 && < 1.10,
containers >= 0.6 && < 0.7,
containers >= 0.6 && < 0.8,
ghc-typelits-natnormalise,
ghc-typelits-extra,
ghc-typelits-knownnat,
Expand All @@ -105,18 +105,21 @@ library
VexRiscv.ClockTicks
VexRiscv.FFI
VexRiscv.TH
VexRiscv.VecToTuple

build-depends:
base,
bytestring >= 0.10 && < 0.13,
clash-prelude,
clash-protocols,
bytestring >= 0.10 && < 0.11,
process >= 1.6 && < 1.8,
containers,
directory >= 1.3 && < 1.4,
filepath,
containers,
Glob,
process >= 1.6 && < 1.8,
string-interpolate,
tagged,
template-haskell,
Glob,
extra-libraries: VexRiscvFFI, stdc++
include-dirs: src/

Expand All @@ -134,9 +137,9 @@ test-suite unittests
base,
clash-vexriscv,
bytestring,
hedgehog >= 1.0 && < 1.1,
tasty >= 1.4 && < 1.5,
tasty-hedgehog >= 1.2 && < 1.3,
hedgehog >= 1.0 && < 1.5,
tasty >= 1.4 && < 1.6,
tasty-hedgehog >= 1.2 && < 1.5,
tasty-hunit,
tasty-th,
template-haskell,
61 changes: 30 additions & 31 deletions clash-vexriscv/src/VexRiscv.hs
Original file line number Diff line number Diff line change
Expand Up @@ -25,6 +25,7 @@ import Language.Haskell.TH.Syntax
import Protocols.Wishbone
import VexRiscv.FFI
import VexRiscv.TH
import VexRiscv.VecToTuple


data Input = Input
Expand Down Expand Up @@ -282,39 +283,37 @@ vexRiscv# !_sourcePath !_clk rst0
let
primName = 'vexRiscv#
( _
:> srcPath
:> clk
:> rst
:> timerInterrupt
:> externalInterrupt
:> softwareInterrupt
:> iBus_ACK
:> iBus_ERR
:> iBus_DAT_MISO
:> dBus_ACK
:> dBus_ERR
:> dBus_DAT_MISO
:> Nil
) = indicesI @13
, srcPath
, clk
, rst
, timerInterrupt
, externalInterrupt
, softwareInterrupt
, iBus_ACK
, iBus_ERR
, iBus_DAT_MISO
, dBus_ACK
, dBus_ERR
, dBus_DAT_MISO
) = vecToTuple (indicesI @13)

( iBus_CYC
:> iBus_STB
:> iBus_WE
:> iBus_ADR
:> iBus_DAT_MOSI
:> iBus_SEL
:> iBus_CTI
:> iBus_BTE
:> dBus_CYC
:> dBus_STB
:> dBus_WE
:> dBus_ADR
:> dBus_DAT_MOSI
:> dBus_SEL
:> dBus_CTI
:> dBus_BTE
:> Nil
) = (\x -> extend @_ @16 @13 x + 1) <$> indicesI @16
, iBus_STB
, iBus_WE
, iBus_ADR
, iBus_DAT_MOSI
, iBus_SEL
, iBus_CTI
, iBus_BTE
, dBus_CYC
, dBus_STB
, dBus_WE
, dBus_ADR
, dBus_DAT_MOSI
, dBus_SEL
, dBus_CTI
, dBus_BTE
) = vecToTuple $ (\x -> extend @_ @16 @13 x + 1) <$> indicesI @16

cpu = extend @_ @_ @1 dBus_BTE + 1
in
Expand Down
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