Update arch spec

include/NeuraDialect/Architecture/Architecture.h

@@ -367,22 +367,31 @@ struct LinkOverride;
 class Architecture {
 public:
   // Single constructor - handles all cases internally.
-  Architecture(int width, int height, 
-               const TileDefaults& tile_defaults,
-               const std::vector<TileOverride>& tile_overrides,
-               const LinkDefaults& link_defaults,
-               const std::vector<LinkOverride>& link_overrides,
-               BaseTopology base_topology = BaseTopology::MESH);
+  Architecture(int multi_cgra_rows,
+               int multi_cgra_columns,
+               BaseTopology multi_cgra_base_topology = BaseTopology::MESH,
+               int per_cgra_rows = 4,
+               int per_cgra_columns = 4,
+               BaseTopology per_cgra_base_topology = BaseTopology::MESH,
+               const TileDefaults& tile_defaults = TileDefaults(),
+               const std::vector<TileOverride>& tile_overrides = std::vector<TileOverride>(),
+               const LinkDefaults& link_defaults = LinkDefaults(),
+               const std::vector<LinkOverride>& link_overrides = std::vector<LinkOverride>());
 
   Tile *getTile(int id);
   Tile *getTile(int x, int y);
 
-  int getWidth() const { return width; }
-  int getHeight() const { return height; }
+  int getMultiCgraRows() const { return multi_cgra_rows_; }
+  int getMultiCgraColumns() const { return multi_cgra_columns_; }
+  int getPerCgraRows() const { return per_cgra_rows_; }
+  int getPerCgraColumns() const { return per_cgra_columns_; }
 
   Link *getLink(int id);
+  Link *getLink(int src_tile_x, int src_tile_y, int dst_tile_x, int dst_tile_y);
   void removeLink(int link_id);
-
+  void removeLink(Tile *src_tile, Tile *dst_tile);
+  void removeLink(int src_tile_x, int src_tile_y, int dst_tile_x, int dst_tile_y);
+
   // Tile management.
   void removeTile(int tile_id);
 
@@ -392,7 +401,7 @@ class Architecture {
 
 private:
   // Helper methods for constructor initialization.
-  void initializeTiles(int width, int height);
+  void initializeTiles(int rows, int columns);
   void configureDefaultTileSettings(const TileDefaults& tile_defaults);
   void applyTileOverrides(const std::vector<TileOverride>& tile_overrides);
   void createLinks(const LinkDefaults& link_defaults, BaseTopology base_topology);
@@ -410,13 +419,15 @@ class Architecture {
 
   // Architecture components: tiles, links, and their mappings.
   // Ports and memory are now modeled as part of Tile class.
-  std::map<int, std::unique_ptr<Tile>> tile_storage;  // Owns tiles, key is unique tile_id.
-  std::map<int, std::unique_ptr<Link>> link_storage;  // Owns links, key is unique link_id.
-  std::unordered_map<int, Tile *> id_to_tile;  // Maps unique tile_id to Tile pointer.
-  std::unordered_map<std::pair<int, int>, Tile *, PairHash> coord_to_tile;  // Maps (x,y) coordinates to Tile pointer.
-
-  int width;
-  int height;
+  std::map<int, std::unique_ptr<Tile>> tile_storage_;  // Owns tiles, key is unique tile_id.
+  std::map<int, std::unique_ptr<Link>> link_storage_;  // Owns links, key is unique link_id.
+  std::unordered_map<int, Tile *> id_to_tile_;  // Maps unique tile_id to Tile pointer.
+  std::unordered_map<std::pair<int, int>, Tile *, PairHash> coord_to_tile_;  // Maps (x,y) coordinates to Tile pointer.
+
+  int multi_cgra_rows_;
+  int multi_cgra_columns_;
+  int per_cgra_rows_;
+  int per_cgra_columns_;
 };
 
 } // namespace neura

include/NeuraDialect/Architecture/ArchitectureSpec.h

@@ -17,34 +17,63 @@ enum class BaseTopology {
 // Structure for holding tile default configuration.
 struct TileDefaults {
   int num_registers = 64;  // default value.
-  std::vector<std::string> default_ports = {"N", "S", "W", "E"};  // default ports.
   std::vector<std::string> operations = {
-    "add", "mul", "sub", "div", "rem", 
-    "fadd", "fmul", "fsub", "fdiv", 
-    "or", "not", "icmp", "fcmp", "sel", 
-    "cast", "sext", "zext", "shl", 
-    "vfmul", "fadd_fadd", "fmul_fadd", 
-    "data_mov", "ctrl_mov", 
-    "reserve", "grant_predicate", "grant_once", "grant_always", 
-    "loop_control", "phi", "constant", 
-    "load", "store", "return", 
-    "load_indexed", "store_indexed", "alloca"
+    "add",
+    "mul",
+    "sub",
+    "div",
+    "rem", 
+    "fadd",
+    "fmul",
+    "fsub",
+    "fdiv", 
+    "or",
+    "not",
+    "icmp",
+    "fcmp",
+    "sel",
+    "cast",
+    "sext",
+    "zext",
+    "shl",
+    "vfmul",
+    "fadd_fadd",
+    "fmul_fadd",
+    "data_mov",
+    "ctrl_mov",
+    "reserve",
+    "grant_predicate",
+    "grant_once",
+    "grant_always",
+    "loop_control",
+    "phi",
+    "constant",
+    "load",
+    "store",
+    "return",
+    "load_indexed",
+    "store_indexed",
+    "alloca"
   };  // default operations - includes all supported operations for newbie convenience.
 };
 
 // Structure for holding memory configuration.
 struct MemoryConfig {
-  int capacity = -1;  // Memory capacity in bytes.
+  int capacity = 1024;  // Memory capacity in bytes.
+  int banks_per_cgra = 4;  // Number of banks per CGRA.
 };
 
 // Structure for holding tile override configuration.
 struct TileOverride {
-  int id = -1;
-  int x = -1, y = -1;
+  // CGRA coordinates.
+  int cgra_x = -1;
+  int cgra_y = -1;
+  // Tile coordinates within per-CGRA.
+  int tile_x = -1;
+  int tile_y = -1;
   std::vector<std::string> operations;
-  int num_registers = -1;
-  std::vector<std::string> ports;
-  MemoryConfig memory;
+  int num_registers = 4;
+  bool existence = true;
 };
 
 // Structure for holding link default configuration.
@@ -55,11 +84,16 @@ struct LinkDefaults {
 
 // Structure for holding link override configuration.
 struct LinkOverride {
-  int id = -1;
-  int latency = -1;
+  int latency = 1;
   int bandwidth = -1;
-  int src_tile_id = -1;
-  int dst_tile_id = -1;
+  int src_cgra_x = -1;
+  int src_cgra_y = -1;
+  int dst_cgra_x = -1;
+  int dst_cgra_y = -1;
+  int src_tile_x = -1;
+  int src_tile_y = -1;
+  int dst_tile_x = -1;
+  int dst_tile_y = -1;
   bool existence = true;
 };
 

include/NeuraDialect/Util/NeuraYamlKeys.h

@@ -0,0 +1,40 @@
+#pragma once
+
+#include "llvm/ADT/StringRef.h"
+
+namespace mlir {
+namespace neura {
+namespace yamlkeys {
+
+constexpr llvm::StringLiteral kArchitecture = "architecture";
+constexpr llvm::StringLiteral kMultiCgraDefaults = "multi_cgra_defaults";
+constexpr llvm::StringLiteral kPerCgraDefaults = "per_cgra_defaults";
+constexpr llvm::StringLiteral kTileDefaults = "tile_defaults";
+constexpr llvm::StringLiteral kTileOverrides = "tile_overrides";
+constexpr llvm::StringLiteral kLinkDefaults = "link_defaults";
+constexpr llvm::StringLiteral kLinkOverrides = "link_overrides";
+constexpr llvm::StringLiteral kOperations = "operations";
+constexpr llvm::StringLiteral kNumRegisters = "num_registers";
+constexpr llvm::StringLiteral kLatency = "latency";
+constexpr llvm::StringLiteral kBandwidth = "bandwidth";
+constexpr llvm::StringLiteral kExistence = "existence";
+constexpr llvm::StringLiteral kRows = "rows";
+constexpr llvm::StringLiteral kColumns = "columns";
+constexpr llvm::StringLiteral kBaseTopology = "base_topology";
+constexpr llvm::StringLiteral kCtrlMemItems = "ctrl_mem_items";
+constexpr llvm::StringLiteral kTileX = "tile_x";
+constexpr llvm::StringLiteral kTileY = "tile_y";
+constexpr llvm::StringLiteral kCgraX = "cgra_x";
+constexpr llvm::StringLiteral kCgraY = "cgra_y";
+constexpr llvm::StringLiteral kSrcTileX = "src_tile_x";
+constexpr llvm::StringLiteral kSrcTileY = "src_tile_y";
+constexpr llvm::StringLiteral kDstTileX = "dst_tile_x";
+constexpr llvm::StringLiteral kDstTileY = "dst_tile_y";
+constexpr llvm::StringLiteral kMesh = "mesh";
+constexpr llvm::StringLiteral kKingMesh = "king_mesh";
+constexpr llvm::StringLiteral kKingMeshAlt = "king mesh";
+constexpr llvm::StringLiteral kRing = "ring";
+
+} // namespace yamlkeys
+} // namespace neura
+} // namespace mlir